Attachment 90911 Details for Bug 54687 – dmesg of I-G-T/display DP calltrace

dmesg of I-G-T/display DP calltrace

dmesg_DP_pipeoff_ILK_e6510_qingshuai_20131218.txt (text/plain), 125.92 KB, created by Qingshuai Tian on 2013-12-18 09:03:11 UTC

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Creator: Qingshuai Tian

Created: 2013-12-18 09:03:11 UTC

Size: 125.92 KB

patch

obsolete

>[  226.971376]  [<f82279a9>] ? intel_set_mode+0x11/0x25 [i915]
>[  226.971391]  [<f8227ee3>] ? intel_crtc_set_config+0x526/0x6d9 [i915]
>[  226.971401]  [<f8054b78>] ? drm_mode_set_config_internal+0x36/0x8c [drm]
>[  226.971410]  [<f80567d2>] ? drm_mode_setcrtc+0x347/0x3f0 [drm]
>[  226.971419]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  226.971425]  [<f804c805>] ? drm_ioctl+0x229/0x31b [drm]
>[  226.971430]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  226.971438]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  226.971445]  [<f804c5dc>] ? drm_core_reclaim_buffers+0x52/0x52 [drm]
>[  226.971449]  [<c02c397d>] ? do_vfs_ioctl+0x3f6/0x43d
>[  226.971451]  [<c08937ef>] ? __schedule+0x5a5/0x6c5
>[  226.971455]  [<c02b752d>] ? vfs_write+0xf1/0x157
>[  226.971458]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  226.971460]  [<c02c3a0d>] ? SyS_ioctl+0x49/0x74
>[  226.971463]  [<c0899aba>] ? sysenter_do_call+0x12/0x22
>[  226.971466]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  226.971468] ---[ end trace 6c397be8849716a3 ]---
>[  226.975116] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  226.975127] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  226.975547] [drm:intel_update_fbc], no output, disabling
>[  226.975573] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  226.975579] [drm:intel_get_shared_dpll], CRTC:3 using pre-allocated PCH DPLL A
>[  226.975581] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  226.975583] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  226.975599] [drm:ironlake_update_plane], Writing base 07EBC000 00000000 0 0 3200
>[  226.975606] [drm:intel_crtc_mode_set], [ENCODER:20:TMDS-20] set [MODE:0:800x600]
>[  226.975609] [drm:intel_dp_mode_set], Enabling DP audio on pipe A
>[  226.975612] [drm:intel_write_eld], ELD on [CONNECTOR:21:DP-1], [ENCODER:20:TMDS-20]
>[  226.975614] [drm:ironlake_write_eld], ELD on pipe A
>[  226.975617] [drm:ironlake_write_eld], Audio directed to unknown port
>[  226.975619] [drm:ironlake_write_eld], ELD: DisplayPort detected
>[  227.028208] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  227.080240] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  227.080558] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[  227.080560] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[  227.080716] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x200
>[  227.080718] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[  227.080719] [drm:ironlake_fdi_link_train], FDI train done
>[  227.080721] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  227.080722] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  227.082101] [drm:intel_update_fbc], disabled per chip default
>[  227.082536] [drm:ibx_irq_handler], PCH transcoder A FIFO underrun
>[  227.082738] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  227.083404] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[  227.084037] [drm:intel_dp_start_link_train], clock recovery OK
>[  227.084965] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  227.085887] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  227.086820] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  227.087782] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  227.088791] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  227.104200] [drm:intel_connector_check_state], [CONNECTOR:21:DP-1]
>[  227.104216] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  227.104222] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  227.104227] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  227.104234] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  227.104240] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  227.104247] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  227.104253] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  227.104259] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  227.104265] [drm:check_crtc_state], [CRTC:3]
>[  227.104297] [drm:check_crtc_state], [CRTC:5]
>[  227.104301] [drm:check_shared_dpll_state], PCH DPLL A
>[  227.104309] [drm:check_shared_dpll_state], PCH DPLL B
>[  232.107508] [drm:drm_mode_addfb], [FB:40]
>[  232.230646] [drm:drm_mode_setcrtc], [CRTC:3]
>[  232.230658] [drm:drm_mode_setcrtc], [CONNECTOR:21:DP-1]
>[  232.230663] [drm:intel_crtc_set_config], [CRTC:3] [FB:40] #connectors=1 (x y) (0 0)
>[  232.230670] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  232.230674] [drm:drm_mode_debug_printmodeline], Modeline 41:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[  232.230681] [drm:drm_mode_debug_printmodeline], Modeline 41:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  232.230687] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  232.230692] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:3]
>[  232.230698] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  232.230704] [drm:connected_sink_compute_bpp], [CONNECTOR:21:DP-1] checking for sink bpp constrains
>[  232.230709] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 40000KHz
>[  232.230719] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  232.230723] [drm:intel_dp_compute_config], DP link bw required 96000 available 129600
>[  232.230729] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  232.230733] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  232.230737] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  232.230741] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  232.230743] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  232.230747] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1864135, gmch_n: 4194304, link_m: 77672, link_n: 524288, tu: 64
>[  232.230752] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 1553445, gmch_n: 2097152, link_m: 64726, link_n: 262144, tu: 64
>[  232.230757] [drm:intel_dump_pipe_config], requested mode:
>[  232.230759] [drm:drm_mode_debug_printmodeline], Modeline 0:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  232.230765] [drm:intel_dump_pipe_config], adjusted mode:
>[  232.230768] [drm:drm_mode_debug_printmodeline], Modeline 0:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  232.230774] [drm:intel_dump_crtc_timings], crtc timings: 40000 800 840 968 1056 600 601 605 628, type: 0x40 flags: 0x5
>[  232.230779] [drm:intel_dump_pipe_config], port clock: 162000
>[  232.230782] [drm:intel_dump_pipe_config], pipe src size: 800x600
>[  232.230785] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  232.230789] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  232.230792] [drm:intel_dump_pipe_config], ips: 0
>[  232.230795] [drm:intel_dump_pipe_config], double wide: 0
>[  232.230988] [drm:intel_dp_link_down], 
>[  232.285383] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  232.387448] ------------[ cut here ]------------
>[  232.387498] WARNING: CPU: 3 PID: 3855 at drivers/gpu/drm/i915/intel_display.c:857 intel_wait_for_pipe_off+0x131/0x138 [i915]()
>[  232.387501] pipe_off wait timed out
>[  232.387504] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt iTCO_wdt iTCO_vendor_support dcdbas snd_hda_intel firewire_ohci pcspkr snd_hda_codec lpc_ich snd_hwdep i2c_i801 mfd_core snd_pcm firewire_core snd_page_alloc crc_itu_t snd_timer snd soundcore wmi battery ppdev parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  232.387553] CPU: 3 PID: 3855 Comm: testdisplay Tainted: G        W    3.13.0-rc3_drm-intel-next-queued_820c19_20131218+ #3845
>[  232.387557] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  232.387561]  00000000 c0890e95 f8265b39 c022b5cf f821f691 f5be8000 00070008 fffef6e5
>[  232.387571]  00000000 c022b64a 00000009 f5787cc8 f8265b39 f5787ce0 f821f691 f82642c1
>[  232.387582]  00000359 f8265b39 f5be8000 f5b885c0 f5b62000 f82203f5 f612cc00 00000000
>[  232.387592] Call Trace:
>[  232.387602]  [<c0890e95>] ? dump_stack+0x3e/0x4e
>[  232.387612]  [<c022b5cf>] ? warn_slowpath_common+0x61/0x74
>[  232.387646]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  232.387653]  [<c022b64a>] ? warn_slowpath_fmt+0x29/0x2d
>[  232.387688]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  232.387724]  [<f82203f5>] ? ironlake_crtc_disable+0xc9/0x737 [i915]
>[  232.387745]  [<f805039e>] ? drm_ut_debug_printk+0x34/0x37 [drm]
>[  232.387779]  [<f821b4e4>] ? intel_dump_pipe_config+0x271/0x276 [i915]
>[  232.387814]  [<f8225d3f>] ? __intel_set_mode+0xbd6/0xf82 [i915]
>[  232.387822]  [<c024f997>] ? up+0x9/0x2a
>[  232.387830]  [<c0257f84>] ? console_unlock+0x309/0x33d
>[  232.387835]  [<c02572e3>] ? cont_flush+0x83/0xa4
>[  232.387872]  [<f82279a9>] ? intel_set_mode+0x11/0x25 [i915]
>[  232.387908]  [<f8227ee3>] ? intel_crtc_set_config+0x526/0x6d9 [i915]
>[  232.387931]  [<f8054b78>] ? drm_mode_set_config_internal+0x36/0x8c [drm]
>[  232.387952]  [<f80567d2>] ? drm_mode_setcrtc+0x347/0x3f0 [drm]
>[  232.387973]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  232.387989]  [<f804c805>] ? drm_ioctl+0x229/0x31b [drm]
>[  232.387997]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  232.388017]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  232.388035]  [<f804c5dc>] ? drm_core_reclaim_buffers+0x52/0x52 [drm]
>[  232.388041]  [<c02c397d>] ? do_vfs_ioctl+0x3f6/0x43d
>[  232.388048]  [<c08937ef>] ? __schedule+0x5a5/0x6c5
>[  232.388056]  [<c02b752d>] ? vfs_write+0xf1/0x157
>[  232.388062]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  232.388068]  [<c02c3a0d>] ? SyS_ioctl+0x49/0x74
>[  232.388075]  [<c0899aba>] ? sysenter_do_call+0x12/0x22
>[  232.388081]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  232.388086] ---[ end trace 6c397be8849716a4 ]---
>[  232.391537] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  232.391547] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  232.391967] [drm:intel_update_fbc], no output, disabling
>[  232.391999] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  232.392002] [drm:intel_get_shared_dpll], CRTC:3 using pre-allocated PCH DPLL A
>[  232.392004] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  232.392007] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  232.392026] [drm:ironlake_update_plane], Writing base 08091000 00000000 0 0 3200
>[  232.392034] [drm:intel_crtc_mode_set], [ENCODER:20:TMDS-20] set [MODE:0:800x600]
>[  232.392039] [drm:intel_dp_mode_set], Enabling DP audio on pipe A
>[  232.392043] [drm:intel_write_eld], ELD on [CONNECTOR:21:DP-1], [ENCODER:20:TMDS-20]
>[  232.392047] [drm:ironlake_write_eld], ELD on pipe A
>[  232.392050] [drm:ironlake_write_eld], Audio directed to unknown port
>[  232.392053] [drm:ironlake_write_eld], ELD: DisplayPort detected
>[  232.444547] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  232.496579] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  232.496898] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[  232.496901] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[  232.497059] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x200
>[  232.497062] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[  232.497064] [drm:ironlake_fdi_link_train], FDI train done
>[  232.497067] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  232.497070] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  232.498453] [drm:intel_update_fbc], disabled per chip default
>[  232.498648] [drm:ibx_irq_handler], PCH transcoder A FIFO underrun
>[  232.499039] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  232.499715] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  232.500339] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[  232.500981] [drm:intel_dp_start_link_train], clock recovery OK
>[  232.501922] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  232.502847] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  232.503775] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  232.504716] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  232.505659] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  232.523528] [drm:intel_connector_check_state], [CONNECTOR:21:DP-1]
>[  232.523538] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  232.523542] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  232.523544] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  232.523548] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  232.523551] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  232.523555] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  232.523559] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  232.523562] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  232.523565] [drm:check_crtc_state], [CRTC:3]
>[  232.523591] [drm:check_crtc_state], [CRTC:5]
>[  232.523593] [drm:check_shared_dpll_state], PCH DPLL A
>[  232.523599] [drm:check_shared_dpll_state], PCH DPLL B
>[  237.526843] [drm:drm_mode_addfb], [FB:39]
>[  237.590911] [drm:drm_mode_setcrtc], [CRTC:3]
>[  237.590919] [drm:drm_mode_setcrtc], [CONNECTOR:21:DP-1]
>[  237.590921] [drm:intel_crtc_set_config], [CRTC:3] [FB:39] #connectors=1 (x y) (0 0)
>[  237.590926] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  237.590928] [drm:drm_mode_debug_printmodeline], Modeline 41:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  237.590931] [drm:drm_mode_debug_printmodeline], Modeline 41:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  237.590934] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  237.590938] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:3]
>[  237.590941] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  237.590944] [drm:connected_sink_compute_bpp], [CONNECTOR:21:DP-1] checking for sink bpp constrains
>[  237.590947] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 36000KHz
>[  237.590953] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  237.590955] [drm:intel_dp_compute_config], DP link bw required 86400 available 129600
>[  237.590959] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  237.590960] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  237.590962] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  237.590964] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  237.590966] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  237.590968] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1677721, gmch_n: 4194304, link_m: 69905, link_n: 524288, tu: 64
>[  237.590970] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 1398101, gmch_n: 2097152, link_m: 58254, link_n: 262144, tu: 64
>[  237.590973] [drm:intel_dump_pipe_config], requested mode:
>[  237.590974] [drm:drm_mode_debug_printmodeline], Modeline 0:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  237.590977] [drm:intel_dump_pipe_config], adjusted mode:
>[  237.590978] [drm:drm_mode_debug_printmodeline], Modeline 0:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  237.590981] [drm:intel_dump_crtc_timings], crtc timings: 36000 800 824 896 1024 600 601 603 625, type: 0x40 flags: 0x5
>[  237.590984] [drm:intel_dump_pipe_config], port clock: 162000
>[  237.590985] [drm:intel_dump_pipe_config], pipe src size: 800x600
>[  237.590987] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  237.590989] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  237.590991] [drm:intel_dump_pipe_config], ips: 0
>[  237.590992] [drm:intel_dump_pipe_config], double wide: 0
>[  237.591207] [drm:intel_dp_link_down], 
>[  237.652691] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  237.754754] ------------[ cut here ]------------
>[  237.754803] WARNING: CPU: 0 PID: 3855 at drivers/gpu/drm/i915/intel_display.c:857 intel_wait_for_pipe_off+0x131/0x138 [i915]()
>[  237.754807] pipe_off wait timed out
>[  237.754809] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt iTCO_wdt iTCO_vendor_support dcdbas snd_hda_intel firewire_ohci pcspkr snd_hda_codec lpc_ich snd_hwdep i2c_i801 mfd_core snd_pcm firewire_core snd_page_alloc crc_itu_t snd_timer snd soundcore wmi battery ppdev parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  237.754858] CPU: 0 PID: 3855 Comm: testdisplay Tainted: G        W    3.13.0-rc3_drm-intel-next-queued_820c19_20131218+ #3845
>[  237.754862] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  237.754866]  00000000 c0890e95 f8265b39 c022b5cf f821f691 f5be8000 00070008 ffff0bd9
>[  237.754876]  00000000 c022b64a 00000009 f5787cc8 f8265b39 f5787ce0 f821f691 f82642c1
>[  237.754886]  00000359 f8265b39 f5be8000 f5b885c0 f5b62000 f82203f5 f612cc00 00000000
>[  237.754899] Call Trace:
>[  237.754905]  [<c0890e95>] ? dump_stack+0x3e/0x4e
>[  237.754910]  [<c022b5cf>] ? warn_slowpath_common+0x61/0x74
>[  237.754925]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  237.754928]  [<c022b64a>] ? warn_slowpath_fmt+0x29/0x2d
>[  237.754944]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  237.754960]  [<f82203f5>] ? ironlake_crtc_disable+0xc9/0x737 [i915]
>[  237.754970]  [<f805039e>] ? drm_ut_debug_printk+0x34/0x37 [drm]
>[  237.754985]  [<f821b4e4>] ? intel_dump_pipe_config+0x271/0x276 [i915]
>[  237.755001]  [<f8225d3f>] ? __intel_set_mode+0xbd6/0xf82 [i915]
>[  237.755006]  [<c024f997>] ? up+0x9/0x2a
>[  237.755009]  [<c0257f84>] ? console_unlock+0x309/0x33d
>[  237.755012]  [<c02572e3>] ? cont_flush+0x83/0xa4
>[  237.755029]  [<f82279a9>] ? intel_set_mode+0x11/0x25 [i915]
>[  237.755045]  [<f8227ee3>] ? intel_crtc_set_config+0x526/0x6d9 [i915]
>[  237.755056]  [<f8054b78>] ? drm_mode_set_config_internal+0x36/0x8c [drm]
>[  237.755065]  [<f80567d2>] ? drm_mode_setcrtc+0x347/0x3f0 [drm]
>[  237.755075]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  237.755082]  [<f804c805>] ? drm_ioctl+0x229/0x31b [drm]
>[  237.755088]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  237.755097]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  237.755105]  [<f804c5dc>] ? drm_core_reclaim_buffers+0x52/0x52 [drm]
>[  237.755108]  [<c02c397d>] ? do_vfs_ioctl+0x3f6/0x43d
>[  237.755112]  [<c08937ef>] ? __schedule+0x5a5/0x6c5
>[  237.755116]  [<c02b752d>] ? vfs_write+0xf1/0x157
>[  237.755119]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  237.755121]  [<c02c3a0d>] ? SyS_ioctl+0x49/0x74
>[  237.755125]  [<c0899aba>] ? sysenter_do_call+0x12/0x22
>[  237.755128]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  237.755130] ---[ end trace 6c397be8849716a5 ]---
>[  237.760764] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  237.760775] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  237.761194] [drm:intel_update_fbc], no output, disabling
>[  237.761218] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  237.761220] [drm:intel_get_shared_dpll], CRTC:3 using pre-allocated PCH DPLL A
>[  237.761222] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  237.761224] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  237.761240] [drm:ironlake_update_plane], Writing base 08266000 00000000 0 0 3200
>[  237.761247] [drm:intel_crtc_mode_set], [ENCODER:20:TMDS-20] set [MODE:0:800x600]
>[  237.761250] [drm:intel_dp_mode_set], Enabling DP audio on pipe A
>[  237.761253] [drm:intel_write_eld], ELD on [CONNECTOR:21:DP-1], [ENCODER:20:TMDS-20]
>[  237.761255] [drm:ironlake_write_eld], ELD on pipe A
>[  237.761258] [drm:ironlake_write_eld], Audio directed to unknown port
>[  237.761260] [drm:ironlake_write_eld], ELD: DisplayPort detected
>[  237.813790] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  237.865822] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  237.866139] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[  237.866141] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[  237.866298] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x200
>[  237.866300] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[  237.866301] [drm:ironlake_fdi_link_train], FDI train done
>[  237.866303] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  237.866305] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  237.867684] [drm:intel_update_fbc], disabled per chip default
>[  237.867853] [drm:ibx_irq_handler], PCH transcoder A FIFO underrun
>[  237.868285] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  237.868943] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[  237.869578] [drm:intel_dp_start_link_train], clock recovery OK
>[  237.870576] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  237.871507] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  237.872440] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  237.873390] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  237.874398] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  237.893886] [drm:intel_connector_check_state], [CONNECTOR:21:DP-1]
>[  237.893900] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  237.893906] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  237.893910] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  237.893916] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  237.893921] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  237.893926] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  237.893931] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  237.893937] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  237.893942] [drm:check_crtc_state], [CRTC:3]
>[  237.893971] [drm:check_crtc_state], [CRTC:5]
>[  237.893975] [drm:check_shared_dpll_state], PCH DPLL A
>[  237.893982] [drm:check_shared_dpll_state], PCH DPLL B
>[  242.897237] [drm:drm_mode_addfb], [FB:40]
>[  243.004544] [drm:drm_mode_setcrtc], [CRTC:3]
>[  243.004555] [drm:drm_mode_setcrtc], [CONNECTOR:21:DP-1]
>[  243.004560] [drm:intel_crtc_set_config], [CRTC:3] [FB:40] #connectors=1 (x y) (0 0)
>[  243.004567] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  243.004571] [drm:drm_mode_debug_printmodeline], Modeline 41:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  243.004577] [drm:drm_mode_debug_printmodeline], Modeline 41:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  243.004583] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  243.004589] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:3]
>[  243.004595] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  243.004600] [drm:connected_sink_compute_bpp], [CONNECTOR:21:DP-1] checking for sink bpp constrains
>[  243.004605] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 27000KHz
>[  243.004613] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  243.004617] [drm:intel_dp_compute_config], DP link bw required 64800 available 129600
>[  243.004622] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  243.004626] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  243.004630] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  243.004634] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  243.004637] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  243.004640] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1258291, gmch_n: 4194304, link_m: 52428, link_n: 524288, tu: 64
>[  243.004646] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 1048576, gmch_n: 2097152, link_m: 43690, link_n: 262144, tu: 64
>[  243.004650] [drm:intel_dump_pipe_config], requested mode:
>[  243.004653] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  243.004659] [drm:intel_dump_pipe_config], adjusted mode:
>[  243.004662] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  243.004667] [drm:intel_dump_crtc_timings], crtc timings: 27000 720 732 796 864 576 581 586 625, type: 0x40 flags: 0xa
>[  243.004673] [drm:intel_dump_pipe_config], port clock: 162000
>[  243.004675] [drm:intel_dump_pipe_config], pipe src size: 720x576
>[  243.004678] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  243.004682] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  243.004686] [drm:intel_dump_pipe_config], ips: 0
>[  243.004689] [drm:intel_dump_pipe_config], double wide: 0
>[  243.004876] [drm:intel_dp_link_down], 
>[  243.069030] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  243.171092] ------------[ cut here ]------------
>[  243.171140] WARNING: CPU: 3 PID: 3855 at drivers/gpu/drm/i915/intel_display.c:857 intel_wait_for_pipe_off+0x131/0x138 [i915]()
>[  243.171144] pipe_off wait timed out
>[  243.171147] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt iTCO_wdt iTCO_vendor_support dcdbas snd_hda_intel firewire_ohci pcspkr snd_hda_codec lpc_ich snd_hwdep i2c_i801 mfd_core snd_pcm firewire_core snd_page_alloc crc_itu_t snd_timer snd soundcore wmi battery ppdev parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  243.171196] CPU: 3 PID: 3855 Comm: testdisplay Tainted: G        W    3.13.0-rc3_drm-intel-next-queued_820c19_20131218+ #3845
>[  243.171200] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  243.171204]  00000000 c0890e95 f8265b39 c022b5cf f821f691 f5be8000 00070008 ffff20fe
>[  243.171214]  00000000 c022b64a 00000009 f5787cc8 f8265b39 f5787ce0 f821f691 f82642c1
>[  243.171224]  00000359 f8265b39 f5be8000 f5b885c0 f5b62000 f82203f5 f612cc00 00000000
>[  243.171235] Call Trace:
>[  243.171244]  [<c0890e95>] ? dump_stack+0x3e/0x4e
>[  243.171253]  [<c022b5cf>] ? warn_slowpath_common+0x61/0x74
>[  243.171288]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  243.171295]  [<c022b64a>] ? warn_slowpath_fmt+0x29/0x2d
>[  243.171330]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  243.171366]  [<f82203f5>] ? ironlake_crtc_disable+0xc9/0x737 [i915]
>[  243.171387]  [<f805039e>] ? drm_ut_debug_printk+0x34/0x37 [drm]
>[  243.171420]  [<f821b4e4>] ? intel_dump_pipe_config+0x271/0x276 [i915]
>[  243.171456]  [<f8225d3f>] ? __intel_set_mode+0xbd6/0xf82 [i915]
>[  243.171464]  [<c024f997>] ? up+0x9/0x2a
>[  243.171471]  [<c0257f84>] ? console_unlock+0x309/0x33d
>[  243.171477]  [<c02572e3>] ? cont_flush+0x83/0xa4
>[  243.171513]  [<f82279a9>] ? intel_set_mode+0x11/0x25 [i915]
>[  243.171549]  [<f8227ee3>] ? intel_crtc_set_config+0x526/0x6d9 [i915]
>[  243.171572]  [<f8054b78>] ? drm_mode_set_config_internal+0x36/0x8c [drm]
>[  243.171593]  [<f80567d2>] ? drm_mode_setcrtc+0x347/0x3f0 [drm]
>[  243.171614]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  243.171630]  [<f804c805>] ? drm_ioctl+0x229/0x31b [drm]
>[  243.171638]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  243.171658]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  243.171676]  [<f804c5dc>] ? drm_core_reclaim_buffers+0x52/0x52 [drm]
>[  243.171683]  [<c02c397d>] ? do_vfs_ioctl+0x3f6/0x43d
>[  243.171689]  [<c08937ef>] ? __schedule+0x5a5/0x6c5
>[  243.171697]  [<c02b752d>] ? vfs_write+0xf1/0x157
>[  243.171704]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  243.171710]  [<c02c3a0d>] ? SyS_ioctl+0x49/0x74
>[  243.171717]  [<c0899aba>] ? sysenter_do_call+0x12/0x22
>[  243.171723]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  243.171728] ---[ end trace 6c397be8849716a6 ]---
>[  243.175193] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  243.175203] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  243.175622] [drm:intel_update_fbc], no output, disabling
>[  243.175653] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  243.175655] [drm:intel_get_shared_dpll], CRTC:3 using pre-allocated PCH DPLL A
>[  243.175658] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  243.175661] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  243.175679] [drm:ironlake_update_plane], Writing base 0843B000 00000000 0 0 2880
>[  243.175688] [drm:intel_crtc_mode_set], [ENCODER:20:TMDS-20] set [MODE:0:720x576]
>[  243.175693] [drm:intel_dp_mode_set], Enabling DP audio on pipe A
>[  243.175697] [drm:intel_write_eld], ELD on [CONNECTOR:21:DP-1], [ENCODER:20:TMDS-20]
>[  243.175700] [drm:ironlake_write_eld], ELD on pipe A
>[  243.175704] [drm:ironlake_write_eld], Audio directed to unknown port
>[  243.175706] [drm:ironlake_write_eld], ELD: DisplayPort detected
>[  243.228126] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  243.280224] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  243.280542] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[  243.280545] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[  243.280703] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x200
>[  243.280706] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[  243.280708] [drm:ironlake_fdi_link_train], FDI train done
>[  243.280711] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  243.280714] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  243.282097] [drm:intel_update_fbc], disabled per chip default
>[  243.282367] [drm:ibx_irq_handler], PCH transcoder A FIFO underrun
>[  243.282693] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  243.283358] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[  243.283985] [drm:intel_dp_start_link_train], clock recovery OK
>[  243.284924] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  243.285843] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  243.286872] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  243.287809] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  243.288751] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  243.310188] [drm:intel_connector_check_state], [CONNECTOR:21:DP-1]
>[  243.310203] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  243.310210] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  243.310215] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  243.310221] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  243.310228] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  243.310234] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  243.310241] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  243.310247] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  243.310253] [drm:check_crtc_state], [CRTC:3]
>[  243.310284] [drm:check_crtc_state], [CRTC:5]
>[  243.310289] [drm:check_shared_dpll_state], PCH DPLL A
>[  243.310297] [drm:check_shared_dpll_state], PCH DPLL B
>[  248.313537] [drm:drm_mode_addfb], [FB:39]
>[  248.409154] [drm:drm_mode_setcrtc], [CRTC:3]
>[  248.409164] [drm:drm_mode_setcrtc], [CONNECTOR:21:DP-1]
>[  248.409169] [drm:intel_crtc_set_config], [CRTC:3] [FB:39] #connectors=1 (x y) (0 0)
>[  248.409177] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  248.409180] [drm:drm_mode_debug_printmodeline], Modeline 41:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[  248.409186] [drm:drm_mode_debug_printmodeline], Modeline 41:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  248.409193] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  248.409198] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:3]
>[  248.409204] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  248.409210] [drm:connected_sink_compute_bpp], [CONNECTOR:21:DP-1] checking for sink bpp constrains
>[  248.409215] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 27027KHz
>[  248.409220] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  248.409225] [drm:intel_dp_compute_config], DP link bw required 64865 available 129600
>[  248.409230] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  248.409233] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  248.409237] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  248.409242] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  248.409245] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  248.409248] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1259549, gmch_n: 4194304, link_m: 52481, link_n: 524288, tu: 64
>[  248.409253] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 1049624, gmch_n: 2097152, link_m: 43734, link_n: 262144, tu: 64
>[  248.409258] [drm:intel_dump_pipe_config], requested mode:
>[  248.409261] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  248.409267] [drm:intel_dump_pipe_config], adjusted mode:
>[  248.409269] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  248.409275] [drm:intel_dump_crtc_timings], crtc timings: 27027 720 736 798 858 480 489 495 525, type: 0x40 flags: 0xa
>[  248.409280] [drm:intel_dump_pipe_config], port clock: 162000
>[  248.409283] [drm:intel_dump_pipe_config], pipe src size: 720x480
>[  248.409286] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  248.409290] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  248.409294] [drm:intel_dump_pipe_config], ips: 0
>[  248.409296] [drm:intel_dump_pipe_config], double wide: 0
>[  248.409493] [drm:intel_dp_link_down], 
>[  248.466355] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  248.568418] ------------[ cut here ]------------
>[  248.568466] WARNING: CPU: 3 PID: 3855 at drivers/gpu/drm/i915/intel_display.c:857 intel_wait_for_pipe_off+0x131/0x138 [i915]()
>[  248.568469] pipe_off wait timed out
>[  248.568472] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt iTCO_wdt iTCO_vendor_support dcdbas snd_hda_intel firewire_ohci pcspkr snd_hda_codec lpc_ich snd_hwdep i2c_i801 mfd_core snd_pcm firewire_core snd_page_alloc crc_itu_t snd_timer snd soundcore wmi battery ppdev parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  248.568521] CPU: 3 PID: 3855 Comm: testdisplay Tainted: G        W    3.13.0-rc3_drm-intel-next-queued_820c19_20131218+ #3845
>[  248.568525] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  248.568529]  00000000 c0890e95 f8265b39 c022b5cf f821f691 f5be8000 00070008 ffff3610
>[  248.568539]  00000000 c022b64a 00000009 f5787cc8 f8265b39 f5787ce0 f821f691 f82642c1
>[  248.568549]  00000359 f8265b39 f5be8000 f5b885c0 f5b62000 f82203f5 f612cc00 00000000
>[  248.568560] Call Trace:
>[  248.568569]  [<c0890e95>] ? dump_stack+0x3e/0x4e
>[  248.568578]  [<c022b5cf>] ? warn_slowpath_common+0x61/0x74
>[  248.568612]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  248.568619]  [<c022b64a>] ? warn_slowpath_fmt+0x29/0x2d
>[  248.568654]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  248.568690]  [<f82203f5>] ? ironlake_crtc_disable+0xc9/0x737 [i915]
>[  248.568711]  [<f805039e>] ? drm_ut_debug_printk+0x34/0x37 [drm]
>[  248.568745]  [<f821b4e4>] ? intel_dump_pipe_config+0x271/0x276 [i915]
>[  248.568780]  [<f8225d3f>] ? __intel_set_mode+0xbd6/0xf82 [i915]
>[  248.568788]  [<c024f997>] ? up+0x9/0x2a
>[  248.568795]  [<c0257f84>] ? console_unlock+0x309/0x33d
>[  248.568801]  [<c02572e3>] ? cont_flush+0x83/0xa4
>[  248.568837]  [<f82279a9>] ? intel_set_mode+0x11/0x25 [i915]
>[  248.568873]  [<f8227ee3>] ? intel_crtc_set_config+0x526/0x6d9 [i915]
>[  248.568896]  [<f8054b78>] ? drm_mode_set_config_internal+0x36/0x8c [drm]
>[  248.568917]  [<f80567d2>] ? drm_mode_setcrtc+0x347/0x3f0 [drm]
>[  248.568938]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  248.568954]  [<f804c805>] ? drm_ioctl+0x229/0x31b [drm]
>[  248.568964]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  248.568984]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  248.569001]  [<f804c5dc>] ? drm_core_reclaim_buffers+0x52/0x52 [drm]
>[  248.569008]  [<c02c397d>] ? do_vfs_ioctl+0x3f6/0x43d
>[  248.569014]  [<c08937ef>] ? __schedule+0x5a5/0x6c5
>[  248.569022]  [<c02b752d>] ? vfs_write+0xf1/0x157
>[  248.569029]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  248.569035]  [<c02c3a0d>] ? SyS_ioctl+0x49/0x74
>[  248.569042]  [<c0899aba>] ? sysenter_do_call+0x12/0x22
>[  248.569048]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  248.569053] ---[ end trace 6c397be8849716a7 ]---
>[  248.570417] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  248.570424] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  248.570840] [drm:intel_update_fbc], no output, disabling
>[  248.570857] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  248.570859] [drm:intel_get_shared_dpll], CRTC:3 using pre-allocated PCH DPLL A
>[  248.570860] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  248.570863] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  248.570879] [drm:ironlake_update_plane], Writing base 085D0000 00000000 0 0 2880
>[  248.570885] [drm:intel_crtc_mode_set], [ENCODER:20:TMDS-20] set [MODE:0:720x480]
>[  248.570889] [drm:intel_dp_mode_set], Enabling DP audio on pipe A
>[  248.570891] [drm:intel_write_eld], ELD on [CONNECTOR:21:DP-1], [ENCODER:20:TMDS-20]
>[  248.570893] [drm:ironlake_write_eld], ELD on pipe A
>[  248.570896] [drm:ironlake_write_eld], Audio directed to unknown port
>[  248.570897] [drm:ironlake_write_eld], ELD: DisplayPort detected
>[  248.623518] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  248.675548] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  248.675865] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[  248.675868] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[  248.676026] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x200
>[  248.676029] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[  248.676031] [drm:ironlake_fdi_link_train], FDI train done
>[  248.676034] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  248.676037] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  248.677420] [drm:intel_update_fbc], disabled per chip default
>[  248.677668] [drm:ibx_irq_handler], PCH transcoder A FIFO underrun
>[  248.678043] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  248.678706] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[  248.679346] [drm:intel_dp_start_link_train], clock recovery OK
>[  248.680283] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  248.681208] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  248.682140] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  248.683155] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  248.684096] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  248.701511] [drm:intel_connector_check_state], [CONNECTOR:21:DP-1]
>[  248.701527] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  248.701533] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  248.701538] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  248.701545] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  248.701551] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  248.701558] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  248.701564] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  248.701570] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  248.701576] [drm:check_crtc_state], [CRTC:3]
>[  248.701607] [drm:check_crtc_state], [CRTC:5]
>[  248.701612] [drm:check_shared_dpll_state], PCH DPLL A
>[  248.701620] [drm:check_shared_dpll_state], PCH DPLL B
>[  253.704873] [drm:drm_mode_addfb], [FB:40]
>[  253.800451] [drm:drm_mode_setcrtc], [CRTC:3]
>[  253.800462] [drm:drm_mode_setcrtc], [CONNECTOR:21:DP-1]
>[  253.800467] [drm:intel_crtc_set_config], [CRTC:3] [FB:40] #connectors=1 (x y) (0 0)
>[  253.800476] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  253.800479] [drm:drm_mode_debug_printmodeline], Modeline 41:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[  253.800485] [drm:drm_mode_debug_printmodeline], Modeline 41:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  253.800492] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  253.800497] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:3]
>[  253.800503] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  253.800509] [drm:connected_sink_compute_bpp], [CONNECTOR:21:DP-1] checking for sink bpp constrains
>[  253.800514] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 27000KHz
>[  253.800519] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  253.800524] [drm:intel_dp_compute_config], DP link bw required 64800 available 129600
>[  253.800529] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  253.800533] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  253.800537] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  253.800540] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  253.800543] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  253.800546] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1258291, gmch_n: 4194304, link_m: 52428, link_n: 524288, tu: 64
>[  253.800552] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 1048576, gmch_n: 2097152, link_m: 43690, link_n: 262144, tu: 64
>[  253.800556] [drm:intel_dump_pipe_config], requested mode:
>[  253.800559] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  253.800565] [drm:intel_dump_pipe_config], adjusted mode:
>[  253.800567] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  253.800573] [drm:intel_dump_crtc_timings], crtc timings: 27000 720 736 798 858 480 489 495 525, type: 0x40 flags: 0xa
>[  253.800578] [drm:intel_dump_pipe_config], port clock: 162000
>[  253.800581] [drm:intel_dump_pipe_config], pipe src size: 720x480
>[  253.800584] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  253.800588] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  253.800592] [drm:intel_dump_pipe_config], ips: 0
>[  253.800594] [drm:intel_dump_pipe_config], double wide: 0
>[  253.800793] [drm:intel_dp_link_down], 
>[  253.857679] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  253.959742] ------------[ cut here ]------------
>[  253.959791] WARNING: CPU: 3 PID: 3855 at drivers/gpu/drm/i915/intel_display.c:857 intel_wait_for_pipe_off+0x131/0x138 [i915]()
>[  253.959795] pipe_off wait timed out
>[  253.959798] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt iTCO_wdt iTCO_vendor_support dcdbas snd_hda_intel firewire_ohci pcspkr snd_hda_codec lpc_ich snd_hwdep i2c_i801 mfd_core snd_pcm firewire_core snd_page_alloc crc_itu_t snd_timer snd soundcore wmi battery ppdev parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  253.959847] CPU: 3 PID: 3855 Comm: testdisplay Tainted: G        W    3.13.0-rc3_drm-intel-next-queued_820c19_20131218+ #3845
>[  253.959851] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  253.959854]  00000000 c0890e95 f8265b39 c022b5cf f821f691 f5be8000 00070008 ffff4b1c
>[  253.959865]  00000000 c022b64a 00000009 f5787cc8 f8265b39 f5787ce0 f821f691 f82642c1
>[  253.959875]  00000359 f8265b39 f5be8000 f5b885c0 f5b62000 f82203f5 f612cc00 00000000
>[  253.959886] Call Trace:
>[  253.959895]  [<c0890e95>] ? dump_stack+0x3e/0x4e
>[  253.959905]  [<c022b5cf>] ? warn_slowpath_common+0x61/0x74
>[  253.959939]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  253.959946]  [<c022b64a>] ? warn_slowpath_fmt+0x29/0x2d
>[  253.959981]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  253.960017]  [<f82203f5>] ? ironlake_crtc_disable+0xc9/0x737 [i915]
>[  253.960038]  [<f805039e>] ? drm_ut_debug_printk+0x34/0x37 [drm]
>[  253.960071]  [<f821b4e4>] ? intel_dump_pipe_config+0x271/0x276 [i915]
>[  253.960106]  [<f8225d3f>] ? __intel_set_mode+0xbd6/0xf82 [i915]
>[  253.960115]  [<c024f997>] ? up+0x9/0x2a
>[  253.960122]  [<c0257f84>] ? console_unlock+0x309/0x33d
>[  253.960127]  [<c02572e3>] ? cont_flush+0x83/0xa4
>[  253.960164]  [<f82279a9>] ? intel_set_mode+0x11/0x25 [i915]
>[  253.960200]  [<f8227ee3>] ? intel_crtc_set_config+0x526/0x6d9 [i915]
>[  253.960223]  [<f8054b78>] ? drm_mode_set_config_internal+0x36/0x8c [drm]
>[  253.960244]  [<f80567d2>] ? drm_mode_setcrtc+0x347/0x3f0 [drm]
>[  253.960265]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  253.960281]  [<f804c805>] ? drm_ioctl+0x229/0x31b [drm]
>[  253.960291]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  253.960311]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  253.960328]  [<f804c5dc>] ? drm_core_reclaim_buffers+0x52/0x52 [drm]
>[  253.960335]  [<c02c397d>] ? do_vfs_ioctl+0x3f6/0x43d
>[  253.960342]  [<c08937ef>] ? __schedule+0x5a5/0x6c5
>[  253.960349]  [<c02b752d>] ? vfs_write+0xf1/0x157
>[  253.960356]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  253.960362]  [<c02c3a0d>] ? SyS_ioctl+0x49/0x74
>[  253.960369]  [<c0899aba>] ? sysenter_do_call+0x12/0x22
>[  253.960375]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  253.960380] ---[ end trace 6c397be8849716a8 ]---
>[  253.963827] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  253.963838] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  253.964261] [drm:intel_update_fbc], no output, disabling
>[  253.964299] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  253.964303] [drm:intel_get_shared_dpll], CRTC:3 using pre-allocated PCH DPLL A
>[  253.964306] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  253.964309] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  253.964329] [drm:ironlake_update_plane], Writing base 08722000 00000000 0 0 2880
>[  253.964339] [drm:intel_crtc_mode_set], [ENCODER:20:TMDS-20] set [MODE:0:720x480]
>[  253.964344] [drm:intel_dp_mode_set], Enabling DP audio on pipe A
>[  253.964349] [drm:intel_write_eld], ELD on [CONNECTOR:21:DP-1], [ENCODER:20:TMDS-20]
>[  253.964353] [drm:ironlake_write_eld], ELD on pipe A
>[  253.964357] [drm:ironlake_write_eld], Audio directed to unknown port
>[  253.964360] [drm:ironlake_write_eld], ELD: DisplayPort detected
>[  254.016848] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  254.068880] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  254.069199] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[  254.069203] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[  254.069362] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x200
>[  254.069365] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[  254.069368] [drm:ironlake_fdi_link_train], FDI train done
>[  254.069371] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  254.069375] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  254.070761] [drm:intel_update_fbc], disabled per chip default
>[  254.071008] [drm:ibx_irq_handler], PCH transcoder A FIFO underrun
>[  254.071300] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  254.071963] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[  254.072590] [drm:intel_dp_start_link_train], clock recovery OK
>[  254.073583] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  254.074517] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  254.075499] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  254.076455] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  254.077459] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  254.094836] [drm:intel_connector_check_state], [CONNECTOR:21:DP-1]
>[  254.094851] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  254.094858] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  254.094863] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  254.094870] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  254.094876] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  254.094882] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  254.094889] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  254.094895] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  254.094901] [drm:check_crtc_state], [CRTC:3]
>[  254.094932] [drm:check_crtc_state], [CRTC:5]
>[  254.094937] [drm:check_shared_dpll_state], PCH DPLL A
>[  254.094945] [drm:check_shared_dpll_state], PCH DPLL B
>[  259.098199] [drm:drm_mode_addfb], [FB:39]
>[  259.190699] [drm:drm_mode_setcrtc], [CRTC:3]
>[  259.190709] [drm:drm_mode_setcrtc], [CONNECTOR:21:DP-1]
>[  259.190714] [drm:intel_crtc_set_config], [CRTC:3] [FB:39] #connectors=1 (x y) (0 0)
>[  259.190721] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  259.190724] [drm:drm_mode_debug_printmodeline], Modeline 41:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[  259.190731] [drm:drm_mode_debug_printmodeline], Modeline 41:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  259.190737] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  259.190742] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:3]
>[  259.190748] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  259.190754] [drm:connected_sink_compute_bpp], [CONNECTOR:21:DP-1] checking for sink bpp constrains
>[  259.190759] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 31500KHz
>[  259.190770] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  259.190774] [drm:intel_dp_compute_config], DP link bw required 75600 available 129600
>[  259.190779] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  259.190783] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  259.190787] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  259.190790] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  259.190793] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  259.190796] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1468006, gmch_n: 4194304, link_m: 61166, link_n: 524288, tu: 64
>[  259.190801] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 1223338, gmch_n: 2097152, link_m: 50972, link_n: 262144, tu: 64
>[  259.190806] [drm:intel_dump_pipe_config], requested mode:
>[  259.190809] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  259.190814] [drm:intel_dump_pipe_config], adjusted mode:
>[  259.190817] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  259.190823] [drm:intel_dump_crtc_timings], crtc timings: 31500 640 656 720 840 480 481 484 500, type: 0x40 flags: 0xa
>[  259.190828] [drm:intel_dump_pipe_config], port clock: 162000
>[  259.190831] [drm:intel_dump_pipe_config], pipe src size: 640x480
>[  259.190834] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  259.190838] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  259.190841] [drm:intel_dump_pipe_config], ips: 0
>[  259.190844] [drm:intel_dump_pipe_config], double wide: 0
>[  259.191082] [drm:intel_dp_link_down], 
>[  259.256071] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  259.358133] ------------[ cut here ]------------
>[  259.358172] WARNING: CPU: 3 PID: 3855 at drivers/gpu/drm/i915/intel_display.c:857 intel_wait_for_pipe_off+0x131/0x138 [i915]()
>[  259.358175] pipe_off wait timed out
>[  259.358176] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt iTCO_wdt iTCO_vendor_support dcdbas snd_hda_intel firewire_ohci pcspkr snd_hda_codec lpc_ich snd_hwdep i2c_i801 mfd_core snd_pcm firewire_core snd_page_alloc crc_itu_t snd_timer snd soundcore wmi battery ppdev parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  259.358209] CPU: 3 PID: 3855 Comm: testdisplay Tainted: G        W    3.13.0-rc3_drm-intel-next-queued_820c19_20131218+ #3845
>[  259.358212] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  259.358214]  00000000 c0890e95 f8265b39 c022b5cf f821f691 f5be8000 00070008 ffff602f
>[  259.358221]  00000000 c022b64a 00000009 f5787cc8 f8265b39 f5787ce0 f821f691 f82642c1
>[  259.358228]  00000359 f8265b39 f5be8000 f5b885c0 f5b62000 f82203f5 f612cc00 00000000
>[  259.358234] Call Trace:
>[  259.358241]  [<c0890e95>] ? dump_stack+0x3e/0x4e
>[  259.358249]  [<c022b5cf>] ? warn_slowpath_common+0x61/0x74
>[  259.358275]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  259.358280]  [<c022b64a>] ? warn_slowpath_fmt+0x29/0x2d
>[  259.358306]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  259.358332]  [<f82203f5>] ? ironlake_crtc_disable+0xc9/0x737 [i915]
>[  259.358348]  [<f805039e>] ? drm_ut_debug_printk+0x34/0x37 [drm]
>[  259.358373]  [<f821b4e4>] ? intel_dump_pipe_config+0x271/0x276 [i915]
>[  259.358399]  [<f8225d3f>] ? __intel_set_mode+0xbd6/0xf82 [i915]
>[  259.358404]  [<c024f997>] ? up+0x9/0x2a
>[  259.358409]  [<c0257f84>] ? console_unlock+0x309/0x33d
>[  259.358413]  [<c02572e3>] ? cont_flush+0x83/0xa4
>[  259.358440]  [<f82279a9>] ? intel_set_mode+0x11/0x25 [i915]
>[  259.358466]  [<f8227ee3>] ? intel_crtc_set_config+0x526/0x6d9 [i915]
>[  259.358483]  [<f8054b78>] ? drm_mode_set_config_internal+0x36/0x8c [drm]
>[  259.358498]  [<f80567d2>] ? drm_mode_setcrtc+0x347/0x3f0 [drm]
>[  259.358513]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  259.358525]  [<f804c805>] ? drm_ioctl+0x229/0x31b [drm]
>[  259.358532]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  259.358547]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  259.358559]  [<f804c5dc>] ? drm_core_reclaim_buffers+0x52/0x52 [drm]
>[  259.358564]  [<c02c397d>] ? do_vfs_ioctl+0x3f6/0x43d
>[  259.358568]  [<c08937ef>] ? __schedule+0x5a5/0x6c5
>[  259.358574]  [<c02b752d>] ? vfs_write+0xf1/0x157
>[  259.358578]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  259.358582]  [<c02c3a0d>] ? SyS_ioctl+0x49/0x74
>[  259.358586]  [<c0899aba>] ? sysenter_do_call+0x12/0x22
>[  259.358590]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  259.358593] ---[ end trace 6c397be8849716a9 ]---
>[  259.362146] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  259.362158] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  259.362579] [drm:intel_update_fbc], no output, disabling
>[  259.362616] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  259.362620] [drm:intel_get_shared_dpll], CRTC:3 using pre-allocated PCH DPLL A
>[  259.362623] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  259.362627] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  259.362649] [drm:ironlake_update_plane], Writing base 08874000 00000000 0 0 2560
>[  259.362658] [drm:intel_crtc_mode_set], [ENCODER:20:TMDS-20] set [MODE:0:640x480]
>[  259.362664] [drm:intel_dp_mode_set], Enabling DP audio on pipe A
>[  259.362668] [drm:intel_write_eld], ELD on [CONNECTOR:21:DP-1], [ENCODER:20:TMDS-20]
>[  259.362673] [drm:ironlake_write_eld], ELD on pipe A
>[  259.362677] [drm:ironlake_write_eld], Audio directed to unknown port
>[  259.362680] [drm:ironlake_write_eld], ELD: DisplayPort detected
>[  259.415171] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  259.467202] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  259.467521] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[  259.467524] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[  259.467682] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x200
>[  259.467684] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[  259.467687] [drm:ironlake_fdi_link_train], FDI train done
>[  259.467689] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  259.467693] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  259.469076] [drm:intel_update_fbc], disabled per chip default
>[  259.469195] [drm:ibx_irq_handler], PCH transcoder A FIFO underrun
>[  259.469652] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  259.470311] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  259.470931] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[  259.471565] [drm:intel_dp_start_link_train], clock recovery OK
>[  259.472504] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  259.473426] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  259.474352] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  259.475289] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  259.476228] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  259.490160] [drm:intel_connector_check_state], [CONNECTOR:21:DP-1]
>[  259.490175] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  259.490182] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  259.490187] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  259.490194] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  259.490200] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  259.490206] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  259.490213] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  259.490219] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  259.490225] [drm:check_crtc_state], [CRTC:3]
>[  259.490256] [drm:check_crtc_state], [CRTC:5]
>[  259.490261] [drm:check_shared_dpll_state], PCH DPLL A
>[  259.490269] [drm:check_shared_dpll_state], PCH DPLL B
>[  264.493525] [drm:drm_mode_addfb], [FB:40]
>[  264.541545] [drm:drm_mode_setcrtc], [CRTC:3]
>[  264.541551] [drm:drm_mode_setcrtc], [CONNECTOR:21:DP-1]
>[  264.541554] [drm:intel_crtc_set_config], [CRTC:3] [FB:40] #connectors=1 (x y) (0 0)
>[  264.541558] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  264.541560] [drm:drm_mode_debug_printmodeline], Modeline 41:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  264.541563] [drm:drm_mode_debug_printmodeline], Modeline 41:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
>[  264.541566] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  264.541569] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:3]
>[  264.541573] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  264.541576] [drm:connected_sink_compute_bpp], [CONNECTOR:21:DP-1] checking for sink bpp constrains
>[  264.541579] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 31500KHz
>[  264.541585] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  264.541587] [drm:intel_dp_compute_config], DP link bw required 75600 available 129600
>[  264.541591] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  264.541592] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  264.541595] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  264.541596] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  264.541598] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  264.541599] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1468006, gmch_n: 4194304, link_m: 61166, link_n: 524288, tu: 64
>[  264.541602] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 1223338, gmch_n: 2097152, link_m: 50972, link_n: 262144, tu: 64
>[  264.541604] [drm:intel_dump_pipe_config], requested mode:
>[  264.541605] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
>[  264.541608] [drm:intel_dump_pipe_config], adjusted mode:
>[  264.541610] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
>[  264.541612] [drm:intel_dump_crtc_timings], crtc timings: 31500 640 664 704 832 480 489 491 520, type: 0x40 flags: 0xa
>[  264.541616] [drm:intel_dump_pipe_config], port clock: 162000
>[  264.541617] [drm:intel_dump_pipe_config], pipe src size: 640x480
>[  264.541619] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  264.541622] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  264.541624] [drm:intel_dump_pipe_config], ips: 0
>[  264.541625] [drm:intel_dump_pipe_config], double wide: 0
>[  264.541891] [drm:intel_dp_link_down], 
>[  264.600331] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  264.702432] ------------[ cut here ]------------
>[  264.702477] WARNING: CPU: 3 PID: 3855 at drivers/gpu/drm/i915/intel_display.c:857 intel_wait_for_pipe_off+0x131/0x138 [i915]()
>[  264.702480] pipe_off wait timed out
>[  264.702483] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt iTCO_wdt iTCO_vendor_support dcdbas snd_hda_intel firewire_ohci pcspkr snd_hda_codec lpc_ich snd_hwdep i2c_i801 mfd_core snd_pcm firewire_core snd_page_alloc crc_itu_t snd_timer snd soundcore wmi battery ppdev parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  264.702521] CPU: 3 PID: 3855 Comm: testdisplay Tainted: G        W    3.13.0-rc3_drm-intel-next-queued_820c19_20131218+ #3845
>[  264.702524] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  264.702527]  00000000 c0890e95 f8265b39 c022b5cf f821f691 f5be8000 00070008 ffff750c
>[  264.702536]  00000000 c022b64a 00000009 f5787cc8 f8265b39 f5787ce0 f821f691 f82642c1
>[  264.702544]  00000359 f8265b39 f5be8000 f5b885c0 f5b62000 f82203f5 f612cc00 00000000
>[  264.702552] Call Trace:
>[  264.702560]  [<c0890e95>] ? dump_stack+0x3e/0x4e
>[  264.702568]  [<c022b5cf>] ? warn_slowpath_common+0x61/0x74
>[  264.702599]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  264.702605]  [<c022b64a>] ? warn_slowpath_fmt+0x29/0x2d
>[  264.702637]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  264.702669]  [<f82203f5>] ? ironlake_crtc_disable+0xc9/0x737 [i915]
>[  264.702688]  [<f805039e>] ? drm_ut_debug_printk+0x34/0x37 [drm]
>[  264.702719]  [<f821b4e4>] ? intel_dump_pipe_config+0x271/0x276 [i915]
>[  264.702751]  [<f8225d3f>] ? __intel_set_mode+0xbd6/0xf82 [i915]
>[  264.702758]  [<c024f997>] ? up+0x9/0x2a
>[  264.702764]  [<c0257f84>] ? console_unlock+0x309/0x33d
>[  264.702768]  [<c02572e3>] ? cont_flush+0x83/0xa4
>[  264.702801]  [<f82279a9>] ? intel_set_mode+0x11/0x25 [i915]
>[  264.702834]  [<f8227ee3>] ? intel_crtc_set_config+0x526/0x6d9 [i915]
>[  264.702854]  [<f8054b78>] ? drm_mode_set_config_internal+0x36/0x8c [drm]
>[  264.702872]  [<f80567d2>] ? drm_mode_setcrtc+0x347/0x3f0 [drm]
>[  264.702891]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  264.702905]  [<f804c805>] ? drm_ioctl+0x229/0x31b [drm]
>[  264.702912]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  264.702930]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  264.702946]  [<f804c5dc>] ? drm_core_reclaim_buffers+0x52/0x52 [drm]
>[  264.702951]  [<c02c397d>] ? do_vfs_ioctl+0x3f6/0x43d
>[  264.702956]  [<c08937ef>] ? __schedule+0x5a5/0x6c5
>[  264.702962]  [<c02b752d>] ? vfs_write+0xf1/0x157
>[  264.702968]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  264.702972]  [<c02c3a0d>] ? SyS_ioctl+0x49/0x74
>[  264.702978]  [<c0899aba>] ? sysenter_do_call+0x12/0x22
>[  264.702983]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  264.702987] ---[ end trace 6c397be8849716aa ]---
>[  264.706382] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  264.706396] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  264.706820] [drm:intel_update_fbc], no output, disabling
>[  264.706881] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  264.706886] [drm:intel_get_shared_dpll], CRTC:3 using pre-allocated PCH DPLL A
>[  264.706891] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  264.706896] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  264.706918] [drm:ironlake_update_plane], Writing base 089A0000 00000000 0 0 2560
>[  264.706930] [drm:intel_crtc_mode_set], [ENCODER:20:TMDS-20] set [MODE:0:640x480]
>[  264.706940] [drm:intel_dp_mode_set], Enabling DP audio on pipe A
>[  264.706946] [drm:intel_write_eld], ELD on [CONNECTOR:21:DP-1], [ENCODER:20:TMDS-20]
>[  264.706951] [drm:ironlake_write_eld], ELD on pipe A
>[  264.706957] [drm:ironlake_write_eld], Audio directed to unknown port
>[  264.706961] [drm:ironlake_write_eld], ELD: DisplayPort detected
>[  264.759469] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  264.810097] [drm:intel_hpd_irq_handler], Received HPD interrupt on PIN 4 - cnt: 0
>[  264.811502] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  264.811822] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[  264.811825] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[  264.811984] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x200
>[  264.811987] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[  264.811990] [drm:ironlake_fdi_link_train], FDI train done
>[  264.811993] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  264.811997] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  264.813384] [drm:intel_update_fbc], disabled per chip default
>[  264.813597] [drm:ibx_irq_handler], PCH transcoder A FIFO underrun
>[  264.813914] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  264.814575] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  264.815190] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[  264.815955] [drm:intel_dp_start_link_train], clock recovery OK
>[  264.816892] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  264.817808] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  264.818739] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  264.819681] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  264.820618] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  264.834443] [drm:intel_connector_check_state], [CONNECTOR:21:DP-1]
>[  264.834453] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  264.834457] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  264.834460] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  264.834464] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  264.834467] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  264.834471] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  264.834475] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  264.834478] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  264.834482] [drm:check_crtc_state], [CRTC:3]
>[  264.834514] [drm:check_crtc_state], [CRTC:5]
>[  264.834516] [drm:check_shared_dpll_state], PCH DPLL A
>[  264.834522] [drm:check_shared_dpll_state], PCH DPLL B
>[  264.834575] [drm:i915_hotplug_work_func], running encoder hotplug functions
>[  264.834578] [drm:i915_hotplug_work_func], Connector HDMI-A-1 (pin 4) received hotplug event.
>[  264.834581] [drm:i915_hotplug_work_func], Connector DP-1 (pin 4) received hotplug event.
>[  264.834583] [drm:intel_hdmi_detect], [CONNECTOR:19:HDMI-A-1]
>[  264.834796] [drm:gmbus_xfer], GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  264.834800] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  264.835288] [drm:intel_dp_get_dpcd], DPCD: 11 0a 84 00 01 00 00 00 00 00 00 00 00 00 00
>[  264.836757] [drm:intel_dp_detect], [CONNECTOR:21:DP-1]
>[  264.837040] [drm:intel_dp_get_dpcd], DPCD: 11 0a 84 00 01 00 00 00 00 00 00 00 00 00 00
>[  264.837881] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  264.861239] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  264.884632] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  264.884635] [drm:drm_detect_monitor_audio], Monitor has basic audio support
>[  269.837762] [drm:drm_mode_addfb], [FB:39]
>[  269.886416] [drm:drm_mode_setcrtc], [CRTC:3]
>[  269.886422] [drm:drm_mode_setcrtc], [CONNECTOR:21:DP-1]
>[  269.886425] [drm:intel_crtc_set_config], [CRTC:3] [FB:39] #connectors=1 (x y) (0 0)
>[  269.886429] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  269.886431] [drm:drm_mode_debug_printmodeline], Modeline 41:"640x480" 73 31500 640 664 704 832 480 489 491 520 0x40 0xa
>[  269.886433] [drm:drm_mode_debug_printmodeline], Modeline 41:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  269.886437] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  269.886440] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:3]
>[  269.886443] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  269.886446] [drm:connected_sink_compute_bpp], [CONNECTOR:21:DP-1] checking for sink bpp constrains
>[  269.886449] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 30240KHz
>[  269.886455] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  269.886457] [drm:intel_dp_compute_config], DP link bw required 72576 available 129600
>[  269.886460] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  269.886462] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  269.886464] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  269.886466] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  269.886468] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  269.886469] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1409286, gmch_n: 4194304, link_m: 58720, link_n: 524288, tu: 64
>[  269.886472] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 1174405, gmch_n: 2097152, link_m: 48933, link_n: 262144, tu: 64
>[  269.886474] [drm:intel_dump_pipe_config], requested mode:
>[  269.886475] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  269.886478] [drm:intel_dump_pipe_config], adjusted mode:
>[  269.886480] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  269.886482] [drm:intel_dump_crtc_timings], crtc timings: 30240 640 704 768 864 480 483 486 525, type: 0x40 flags: 0xa
>[  269.886485] [drm:intel_dump_pipe_config], port clock: 162000
>[  269.886487] [drm:intel_dump_pipe_config], pipe src size: 640x480
>[  269.886488] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  269.886491] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  269.886493] [drm:intel_dump_pipe_config], ips: 0
>[  269.886495] [drm:intel_dump_pipe_config], double wide: 0
>[  269.886760] [drm:intel_dp_link_down], 
>[  269.945593] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  270.047657] ------------[ cut here ]------------
>[  270.047705] WARNING: CPU: 0 PID: 3855 at drivers/gpu/drm/i915/intel_display.c:857 intel_wait_for_pipe_off+0x131/0x138 [i915]()
>[  270.047709] pipe_off wait timed out
>[  270.047712] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt iTCO_wdt iTCO_vendor_support dcdbas snd_hda_intel firewire_ohci pcspkr snd_hda_codec lpc_ich snd_hwdep i2c_i801 mfd_core snd_pcm firewire_core snd_page_alloc crc_itu_t snd_timer snd soundcore wmi battery ppdev parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  270.047761] CPU: 0 PID: 3855 Comm: testdisplay Tainted: G        W    3.13.0-rc3_drm-intel-next-queued_820c19_20131218+ #3845
>[  270.047764] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  270.047768]  00000000 c0890e95 f8265b39 c022b5cf f821f691 f5be8000 00070008 ffff89ea
>[  270.047779]  00000000 c022b64a 00000009 f5787cc8 f8265b39 f5787ce0 f821f691 f82642c1
>[  270.047789]  00000359 f8265b39 f5be8000 f5b885c0 f5b62000 f82203f5 f612cc00 00000000
>[  270.047799] Call Trace:
>[  270.047811]  [<c0890e95>] ? dump_stack+0x3e/0x4e
>[  270.047816]  [<c022b5cf>] ? warn_slowpath_common+0x61/0x74
>[  270.047830]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  270.047833]  [<c022b64a>] ? warn_slowpath_fmt+0x29/0x2d
>[  270.047847]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  270.047862]  [<f82203f5>] ? ironlake_crtc_disable+0xc9/0x737 [i915]
>[  270.047871]  [<f805039e>] ? drm_ut_debug_printk+0x34/0x37 [drm]
>[  270.047885]  [<f821b4e4>] ? intel_dump_pipe_config+0x271/0x276 [i915]
>[  270.047900]  [<f8225d3f>] ? __intel_set_mode+0xbd6/0xf82 [i915]
>[  270.047904]  [<c024f997>] ? up+0x9/0x2a
>[  270.047908]  [<c0257f84>] ? console_unlock+0x309/0x33d
>[  270.047910]  [<c02572e3>] ? cont_flush+0x83/0xa4
>[  270.047925]  [<f82279a9>] ? intel_set_mode+0x11/0x25 [i915]
>[  270.047940]  [<f8227ee3>] ? intel_crtc_set_config+0x526/0x6d9 [i915]
>[  270.047950]  [<f8054b78>] ? drm_mode_set_config_internal+0x36/0x8c [drm]
>[  270.047958]  [<f80567d2>] ? drm_mode_setcrtc+0x347/0x3f0 [drm]
>[  270.047967]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  270.047974]  [<f804c805>] ? drm_ioctl+0x229/0x31b [drm]
>[  270.047978]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  270.047986]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  270.047993]  [<f804c5dc>] ? drm_core_reclaim_buffers+0x52/0x52 [drm]
>[  270.047996]  [<c02c397d>] ? do_vfs_ioctl+0x3f6/0x43d
>[  270.047999]  [<c08937ef>] ? __schedule+0x5a5/0x6c5
>[  270.048003]  [<c02b752d>] ? vfs_write+0xf1/0x157
>[  270.048005]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  270.048008]  [<c02c3a0d>] ? SyS_ioctl+0x49/0x74
>[  270.048011]  [<c0899aba>] ? sysenter_do_call+0x12/0x22
>[  270.048014]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  270.048015] ---[ end trace 6c397be8849716ab ]---
>[  270.051666] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  270.051677] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  270.052096] [drm:intel_update_fbc], no output, disabling
>[  270.052122] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  270.052124] [drm:intel_get_shared_dpll], CRTC:3 using pre-allocated PCH DPLL A
>[  270.052125] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  270.052127] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  270.052147] [drm:ironlake_update_plane], Writing base 08ACC000 00000000 0 0 2560
>[  270.052153] [drm:intel_crtc_mode_set], [ENCODER:20:TMDS-20] set [MODE:0:640x480]
>[  270.052157] [drm:intel_dp_mode_set], Enabling DP audio on pipe A
>[  270.052159] [drm:intel_write_eld], ELD on [CONNECTOR:21:DP-1], [ENCODER:20:TMDS-20]
>[  270.052161] [drm:ironlake_write_eld], ELD on pipe A
>[  270.052164] [drm:ironlake_write_eld], Audio directed to unknown port
>[  270.052166] [drm:ironlake_write_eld], ELD: DisplayPort detected
>[  270.104692] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  270.156725] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  270.157042] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[  270.157044] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[  270.157201] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x200
>[  270.157203] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[  270.157204] [drm:ironlake_fdi_link_train], FDI train done
>[  270.157206] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  270.157208] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  270.158588] [drm:intel_update_fbc], disabled per chip default
>[  270.158839] [drm:ibx_irq_handler], PCH transcoder A FIFO underrun
>[  270.159222] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  270.159884] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[  270.160522] [drm:intel_dp_start_link_train], clock recovery OK
>[  270.161455] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  270.162385] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  270.163375] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  270.164350] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  270.165317] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  270.180749] [drm:intel_connector_check_state], [CONNECTOR:21:DP-1]
>[  270.180765] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  270.180772] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  270.180777] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  270.180784] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  270.180790] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  270.180797] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  270.180803] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  270.180810] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  270.180816] [drm:check_crtc_state], [CRTC:3]
>[  270.180848] [drm:check_crtc_state], [CRTC:5]
>[  270.180853] [drm:check_shared_dpll_state], PCH DPLL A
>[  270.180862] [drm:check_shared_dpll_state], PCH DPLL B
>[  275.184117] [drm:drm_mode_addfb], [FB:40]
>[  275.276719] [drm:drm_mode_setcrtc], [CRTC:3]
>[  275.276729] [drm:drm_mode_setcrtc], [CONNECTOR:21:DP-1]
>[  275.276734] [drm:intel_crtc_set_config], [CRTC:3] [FB:40] #connectors=1 (x y) (0 0)
>[  275.276741] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  275.276744] [drm:drm_mode_debug_printmodeline], Modeline 41:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[  275.276751] [drm:drm_mode_debug_printmodeline], Modeline 41:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  275.276757] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  275.276762] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:3]
>[  275.276768] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  275.276773] [drm:connected_sink_compute_bpp], [CONNECTOR:21:DP-1] checking for sink bpp constrains
>[  275.276778] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 25200KHz
>[  275.276783] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  275.276787] [drm:intel_dp_compute_config], DP link bw required 60480 available 129600
>[  275.276792] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  275.276796] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  275.276800] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  275.276803] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  275.276806] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  275.276809] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1174405, gmch_n: 4194304, link_m: 48933, link_n: 524288, tu: 64
>[  275.276814] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 978670, gmch_n: 2097152, link_m: 40777, link_n: 262144, tu: 64
>[  275.276819] [drm:intel_dump_pipe_config], requested mode:
>[  275.276822] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  275.276828] [drm:intel_dump_pipe_config], adjusted mode:
>[  275.276831] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  275.276836] [drm:intel_dump_crtc_timings], crtc timings: 25200 640 656 752 800 480 490 492 525, type: 0x40 flags: 0xa
>[  275.276841] [drm:intel_dump_pipe_config], port clock: 162000
>[  275.276844] [drm:intel_dump_pipe_config], pipe src size: 640x480
>[  275.276847] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  275.276851] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  275.276855] [drm:intel_dump_pipe_config], ips: 0
>[  275.276857] [drm:intel_dump_pipe_config], double wide: 0
>[  275.277070] [drm:intel_dp_link_down], 
>[  275.338918] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  275.440981] ------------[ cut here ]------------
>[  275.441028] WARNING: CPU: 3 PID: 3855 at drivers/gpu/drm/i915/intel_display.c:857 intel_wait_for_pipe_off+0x131/0x138 [i915]()
>[  275.441032] pipe_off wait timed out
>[  275.441035] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt iTCO_wdt iTCO_vendor_support dcdbas snd_hda_intel firewire_ohci pcspkr snd_hda_codec lpc_ich snd_hwdep i2c_i801 mfd_core snd_pcm firewire_core snd_page_alloc crc_itu_t snd_timer snd soundcore wmi battery ppdev parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  275.441083] CPU: 3 PID: 3855 Comm: testdisplay Tainted: G        W    3.13.0-rc3_drm-intel-next-queued_820c19_20131218+ #3845
>[  275.441087] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  275.441091]  00000000 c0890e95 f8265b39 c022b5cf f821f691 f5be8000 00070008 ffff9ef8
>[  275.441101]  00000000 c022b64a 00000009 f5787cc8 f8265b39 f5787ce0 f821f691 f82642c1
>[  275.441111]  00000359 f8265b39 f5be8000 f5b885c0 f5b62000 f82203f5 f612cc00 00000000
>[  275.441122] Call Trace:
>[  275.441131]  [<c0890e95>] ? dump_stack+0x3e/0x4e
>[  275.441140]  [<c022b5cf>] ? warn_slowpath_common+0x61/0x74
>[  275.441174]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  275.441181]  [<c022b64a>] ? warn_slowpath_fmt+0x29/0x2d
>[  275.441216]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  275.441252]  [<f82203f5>] ? ironlake_crtc_disable+0xc9/0x737 [i915]
>[  275.441273]  [<f805039e>] ? drm_ut_debug_printk+0x34/0x37 [drm]
>[  275.441306]  [<f821b4e4>] ? intel_dump_pipe_config+0x271/0x276 [i915]
>[  275.441341]  [<f8225d3f>] ? __intel_set_mode+0xbd6/0xf82 [i915]
>[  275.441349]  [<c024f997>] ? up+0x9/0x2a
>[  275.441356]  [<c0257f84>] ? console_unlock+0x309/0x33d
>[  275.441362]  [<c02572e3>] ? cont_flush+0x83/0xa4
>[  275.441399]  [<f82279a9>] ? intel_set_mode+0x11/0x25 [i915]
>[  275.441435]  [<f8227ee3>] ? intel_crtc_set_config+0x526/0x6d9 [i915]
>[  275.441458]  [<f8054b78>] ? drm_mode_set_config_internal+0x36/0x8c [drm]
>[  275.441478]  [<f80567d2>] ? drm_mode_setcrtc+0x347/0x3f0 [drm]
>[  275.441499]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  275.441515]  [<f804c805>] ? drm_ioctl+0x229/0x31b [drm]
>[  275.441523]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  275.441543]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  275.441561]  [<f804c5dc>] ? drm_core_reclaim_buffers+0x52/0x52 [drm]
>[  275.441567]  [<c02c397d>] ? do_vfs_ioctl+0x3f6/0x43d
>[  275.441574]  [<c08937ef>] ? __schedule+0x5a5/0x6c5
>[  275.441581]  [<c02b752d>] ? vfs_write+0xf1/0x157
>[  275.441588]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  275.441594]  [<c02c3a0d>] ? SyS_ioctl+0x49/0x74
>[  275.441601]  [<c0899aba>] ? sysenter_do_call+0x12/0x22
>[  275.441607]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  275.441612] ---[ end trace 6c397be8849716ac ]---
>[  275.444991] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  275.445003] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  275.445426] [drm:intel_update_fbc], no output, disabling
>[  275.445480] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  275.445484] [drm:intel_get_shared_dpll], CRTC:3 using pre-allocated PCH DPLL A
>[  275.445488] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  275.445492] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  275.445513] [drm:ironlake_update_plane], Writing base 08BF8000 00000000 0 0 2560
>[  275.445523] [drm:intel_crtc_mode_set], [ENCODER:20:TMDS-20] set [MODE:0:640x480]
>[  275.445530] [drm:intel_dp_mode_set], Enabling DP audio on pipe A
>[  275.445535] [drm:intel_write_eld], ELD on [CONNECTOR:21:DP-1], [ENCODER:20:TMDS-20]
>[  275.445541] [drm:ironlake_write_eld], ELD on pipe A
>[  275.445546] [drm:ironlake_write_eld], Audio directed to unknown port
>[  275.445549] [drm:ironlake_write_eld], ELD: DisplayPort detected
>[  275.498016] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  275.550048] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  275.550367] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[  275.550371] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[  275.550531] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x200
>[  275.550535] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[  275.550539] [drm:ironlake_fdi_link_train], FDI train done
>[  275.550543] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  275.550548] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  275.551934] [drm:intel_update_fbc], disabled per chip default
>[  275.552163] [drm:ibx_irq_handler], PCH transcoder A FIFO underrun
>[  275.552551] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  275.553213] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  275.553842] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[  275.554477] [drm:intel_dp_start_link_train], clock recovery OK
>[  275.555416] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  275.556344] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  275.557273] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  275.558215] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  275.559151] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  275.577145] [drm:intel_connector_check_state], [CONNECTOR:21:DP-1]
>[  275.577160] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  275.577165] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  275.577170] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  275.577175] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  275.577180] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  275.577185] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  275.577190] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  275.577196] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  275.577201] [drm:check_crtc_state], [CRTC:3]
>[  275.577230] [drm:check_crtc_state], [CRTC:5]
>[  275.577234] [drm:check_shared_dpll_state], PCH DPLL A
>[  275.577241] [drm:check_shared_dpll_state], PCH DPLL B
>[  280.580484] [drm:drm_mode_addfb], [FB:39]
>[  280.673345] [drm:drm_mode_setcrtc], [CRTC:3]
>[  280.673355] [drm:drm_mode_setcrtc], [CONNECTOR:21:DP-1]
>[  280.673360] [drm:intel_crtc_set_config], [CRTC:3] [FB:39] #connectors=1 (x y) (0 0)
>[  280.673368] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  280.673371] [drm:drm_mode_debug_printmodeline], Modeline 41:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  280.673377] [drm:drm_mode_debug_printmodeline], Modeline 41:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  280.673384] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  280.673389] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:3]
>[  280.673395] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  280.673400] [drm:connected_sink_compute_bpp], [CONNECTOR:21:DP-1] checking for sink bpp constrains
>[  280.673406] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 25175KHz
>[  280.673411] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  280.673415] [drm:intel_dp_compute_config], DP link bw required 60420 available 129600
>[  280.673420] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  280.673424] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  280.673428] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  280.673431] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  280.673434] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  280.673437] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1173240, gmch_n: 4194304, link_m: 48885, link_n: 524288, tu: 64
>[  280.673442] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 977700, gmch_n: 2097152, link_m: 40737, link_n: 262144, tu: 64
>[  280.673447] [drm:intel_dump_pipe_config], requested mode:
>[  280.673450] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  280.673456] [drm:intel_dump_pipe_config], adjusted mode:
>[  280.673459] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  280.673464] [drm:intel_dump_crtc_timings], crtc timings: 25175 640 656 752 800 480 490 492 525, type: 0x40 flags: 0xa
>[  280.673470] [drm:intel_dump_pipe_config], port clock: 162000
>[  280.673473] [drm:intel_dump_pipe_config], pipe src size: 640x480
>[  280.673476] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  280.673480] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  280.673484] [drm:intel_dump_pipe_config], ips: 0
>[  280.673487] [drm:intel_dump_pipe_config], double wide: 0
>[  280.673751] [drm:intel_dp_link_down], 
>[  280.732243] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  280.834306] ------------[ cut here ]------------
>[  280.834353] WARNING: CPU: 3 PID: 3855 at drivers/gpu/drm/i915/intel_display.c:857 intel_wait_for_pipe_off+0x131/0x138 [i915]()
>[  280.834357] pipe_off wait timed out
>[  280.834360] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt iTCO_wdt iTCO_vendor_support dcdbas snd_hda_intel firewire_ohci pcspkr snd_hda_codec lpc_ich snd_hwdep i2c_i801 mfd_core snd_pcm firewire_core snd_page_alloc crc_itu_t snd_timer snd soundcore wmi battery ppdev parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  280.834408] CPU: 3 PID: 3855 Comm: testdisplay Tainted: G        W    3.13.0-rc3_drm-intel-next-queued_820c19_20131218+ #3845
>[  280.834412] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  280.834415]  00000000 c0890e95 f8265b39 c022b5cf f821f691 f5be8000 00070008 ffffb406
>[  280.834426]  00000000 c022b64a 00000009 f5787cc8 f8265b39 f5787ce0 f821f691 f82642c1
>[  280.834436]  00000359 f8265b39 f5be8000 f5b885c0 f5b62000 f82203f5 f612cc00 00000000
>[  280.834447] Call Trace:
>[  280.834456]  [<c0890e95>] ? dump_stack+0x3e/0x4e
>[  280.834465]  [<c022b5cf>] ? warn_slowpath_common+0x61/0x74
>[  280.834499]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  280.834506]  [<c022b64a>] ? warn_slowpath_fmt+0x29/0x2d
>[  280.834541]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  280.834577]  [<f82203f5>] ? ironlake_crtc_disable+0xc9/0x737 [i915]
>[  280.834598]  [<f805039e>] ? drm_ut_debug_printk+0x34/0x37 [drm]
>[  280.834631]  [<f821b4e4>] ? intel_dump_pipe_config+0x271/0x276 [i915]
>[  280.834666]  [<f8225d3f>] ? __intel_set_mode+0xbd6/0xf82 [i915]
>[  280.834675]  [<c024f997>] ? up+0x9/0x2a
>[  280.834682]  [<c0257f84>] ? console_unlock+0x309/0x33d
>[  280.834687]  [<c02572e3>] ? cont_flush+0x83/0xa4
>[  280.834724]  [<f82279a9>] ? intel_set_mode+0x11/0x25 [i915]
>[  280.834759]  [<f8227ee3>] ? intel_crtc_set_config+0x526/0x6d9 [i915]
>[  280.834783]  [<f8054b78>] ? drm_mode_set_config_internal+0x36/0x8c [drm]
>[  280.834803]  [<f80567d2>] ? drm_mode_setcrtc+0x347/0x3f0 [drm]
>[  280.834824]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  280.834840]  [<f804c805>] ? drm_ioctl+0x229/0x31b [drm]
>[  280.834848]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  280.834868]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  280.834885]  [<f804c5dc>] ? drm_core_reclaim_buffers+0x52/0x52 [drm]
>[  280.834892]  [<c02c397d>] ? do_vfs_ioctl+0x3f6/0x43d
>[  280.834898]  [<c08937ef>] ? __schedule+0x5a5/0x6c5
>[  280.834906]  [<c02b752d>] ? vfs_write+0xf1/0x157
>[  280.834912]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  280.834918]  [<c02c3a0d>] ? SyS_ioctl+0x49/0x74
>[  280.834925]  [<c0899aba>] ? sysenter_do_call+0x12/0x22
>[  280.834931]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  280.834936] ---[ end trace 6c397be8849716ad ]---
>[  280.838316] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  280.838327] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  280.838750] [drm:intel_update_fbc], no output, disabling
>[  280.838804] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  280.838809] [drm:intel_get_shared_dpll], CRTC:3 using pre-allocated PCH DPLL A
>[  280.838813] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  280.838817] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  280.838838] [drm:ironlake_update_plane], Writing base 08D24000 00000000 0 0 2560
>[  280.838849] [drm:intel_crtc_mode_set], [ENCODER:20:TMDS-20] set [MODE:0:640x480]
>[  280.838856] [drm:intel_dp_mode_set], Enabling DP audio on pipe A
>[  280.838861] [drm:intel_write_eld], ELD on [CONNECTOR:21:DP-1], [ENCODER:20:TMDS-20]
>[  280.838866] [drm:ironlake_write_eld], ELD on pipe A
>[  280.838871] [drm:ironlake_write_eld], Audio directed to unknown port
>[  280.838875] [drm:ironlake_write_eld], ELD: DisplayPort detected
>[  280.891341] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  280.943439] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  280.943756] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[  280.943759] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[  280.943917] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x200
>[  280.943920] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[  280.943922] [drm:ironlake_fdi_link_train], FDI train done
>[  280.943925] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  280.943929] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  280.945311] [drm:intel_update_fbc], disabled per chip default
>[  280.945548] [drm:ibx_irq_handler], PCH transcoder A FIFO underrun
>[  280.945992] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  280.946667] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[  280.947292] [drm:intel_dp_start_link_train], clock recovery OK
>[  280.948232] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  280.949170] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  280.950098] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  280.951042] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  280.951994] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  280.969395] [drm:intel_connector_check_state], [CONNECTOR:21:DP-1]
>[  280.969411] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  280.969418] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  280.969423] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  280.969430] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  280.969436] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  280.969443] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  280.969449] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  280.969456] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  280.969462] [drm:check_crtc_state], [CRTC:3]
>[  280.969493] [drm:check_crtc_state], [CRTC:5]
>[  280.969498] [drm:check_shared_dpll_state], PCH DPLL A
>[  280.969506] [drm:check_shared_dpll_state], PCH DPLL B
>[  285.972778] [drm:drm_mode_addfb], [FB:40]
>[  286.011016] [drm:drm_mode_setcrtc], [CRTC:3]
>[  286.011022] [drm:drm_mode_setcrtc], [CONNECTOR:21:DP-1]
>[  286.011025] [drm:intel_crtc_set_config], [CRTC:3] [FB:40] #connectors=1 (x y) (0 0)
>[  286.011030] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  286.011032] [drm:drm_mode_debug_printmodeline], Modeline 41:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[  286.011035] [drm:drm_mode_debug_printmodeline], Modeline 41:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  286.011038] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  286.011041] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:3]
>[  286.011044] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  286.011047] [drm:connected_sink_compute_bpp], [CONNECTOR:21:DP-1] checking for sink bpp constrains
>[  286.011050] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 28320KHz
>[  286.011057] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  286.011059] [drm:intel_dp_compute_config], DP link bw required 67968 available 129600
>[  286.011062] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  286.011064] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  286.011066] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  286.011068] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  286.011070] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  286.011071] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1319807, gmch_n: 4194304, link_m: 54991, link_n: 524288, tu: 64
>[  286.011074] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 1099839, gmch_n: 2097152, link_m: 45826, link_n: 262144, tu: 64
>[  286.011077] [drm:intel_dump_pipe_config], requested mode:
>[  286.011078] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  286.011081] [drm:intel_dump_pipe_config], adjusted mode:
>[  286.011082] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  286.011085] [drm:intel_dump_crtc_timings], crtc timings: 28320 720 738 846 900 400 412 414 449, type: 0x40 flags: 0x6
>[  286.011088] [drm:intel_dump_pipe_config], port clock: 162000
>[  286.011090] [drm:intel_dump_pipe_config], pipe src size: 720x400
>[  286.011092] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  286.011094] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  286.011096] [drm:intel_dump_pipe_config], ips: 0
>[  286.011098] [drm:intel_dump_pipe_config], double wide: 0
>[  286.011296] [drm:intel_dp_link_down], 
>[  286.081546] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  286.183633] ------------[ cut here ]------------
>[  286.183659] WARNING: CPU: 3 PID: 3855 at drivers/gpu/drm/i915/intel_display.c:857 intel_wait_for_pipe_off+0x131/0x138 [i915]()
>[  286.183661] pipe_off wait timed out
>[  286.183662] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt iTCO_wdt iTCO_vendor_support dcdbas snd_hda_intel firewire_ohci pcspkr snd_hda_codec lpc_ich snd_hwdep i2c_i801 mfd_core snd_pcm firewire_core snd_page_alloc crc_itu_t snd_timer snd soundcore wmi battery ppdev parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  286.183682] CPU: 3 PID: 3855 Comm: testdisplay Tainted: G        W    3.13.0-rc3_drm-intel-next-queued_820c19_20131218+ #3845
>[  286.183683] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  286.183685]  00000000 c0890e95 f8265b39 c022b5cf f821f691 f5be8000 00070008 ffffc8e8
>[  286.183689]  00000000 c022b64a 00000009 f5787cc8 f8265b39 f5787ce0 f821f691 f82642c1
>[  286.183692]  00000359 f8265b39 f5be8000 f5b885c0 f5b62000 f82203f5 f612cc00 00000000
>[  286.183696] Call Trace:
>[  286.183701]  [<c0890e95>] ? dump_stack+0x3e/0x4e
>[  286.183706]  [<c022b5cf>] ? warn_slowpath_common+0x61/0x74
>[  286.183721]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  286.183724]  [<c022b64a>] ? warn_slowpath_fmt+0x29/0x2d
>[  286.183739]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  286.183754]  [<f82203f5>] ? ironlake_crtc_disable+0xc9/0x737 [i915]
>[  286.183764]  [<f805039e>] ? drm_ut_debug_printk+0x34/0x37 [drm]
>[  286.183778]  [<f821b4e4>] ? intel_dump_pipe_config+0x271/0x276 [i915]
>[  286.183793]  [<f8225d3f>] ? __intel_set_mode+0xbd6/0xf82 [i915]
>[  286.183797]  [<c024f997>] ? up+0x9/0x2a
>[  286.183800]  [<c0257f84>] ? console_unlock+0x309/0x33d
>[  286.183802]  [<c02572e3>] ? cont_flush+0x83/0xa4
>[  286.183817]  [<f82279a9>] ? intel_set_mode+0x11/0x25 [i915]
>[  286.183832]  [<f8227ee3>] ? intel_crtc_set_config+0x526/0x6d9 [i915]
>[  286.183841]  [<f8054b78>] ? drm_mode_set_config_internal+0x36/0x8c [drm]
>[  286.183849]  [<f80567d2>] ? drm_mode_setcrtc+0x347/0x3f0 [drm]
>[  286.183858]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  286.183864]  [<f804c805>] ? drm_ioctl+0x229/0x31b [drm]
>[  286.183869]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  286.183877]  [<f805648b>] ? drm_mode_setplane+0x295/0x295 [drm]
>[  286.183884]  [<f804c5dc>] ? drm_core_reclaim_buffers+0x52/0x52 [drm]
>[  286.183888]  [<c02c397d>] ? do_vfs_ioctl+0x3f6/0x43d
>[  286.183891]  [<c08937ef>] ? __schedule+0x5a5/0x6c5
>[  286.183894]  [<c02b752d>] ? vfs_write+0xf1/0x157
>[  286.183897]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  286.183899]  [<c02c3a0d>] ? SyS_ioctl+0x49/0x74
>[  286.183902]  [<c0899aba>] ? sysenter_do_call+0x12/0x22
>[  286.183904]  [<c06864a2>] ? sata_pmp_error_handler+0x418/0x706
>[  286.183906] ---[ end trace 6c397be8849716ae ]---
>[  286.185605] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  286.185613] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  286.186033] [drm:intel_update_fbc], no output, disabling
>[  286.186062] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  286.186064] [drm:intel_get_shared_dpll], CRTC:3 using pre-allocated PCH DPLL A
>[  286.186066] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  286.186068] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  286.186085] [drm:ironlake_update_plane], Writing base 08E50000 00000000 0 0 2880
>[  286.186093] [drm:intel_crtc_mode_set], [ENCODER:20:TMDS-20] set [MODE:0:720x400]
>[  286.186097] [drm:intel_dp_mode_set], Enabling DP audio on pipe A
>[  286.186100] [drm:intel_write_eld], ELD on [CONNECTOR:21:DP-1], [ENCODER:20:TMDS-20]
>[  286.186104] [drm:ironlake_write_eld], ELD on pipe A
>[  286.186107] [drm:ironlake_write_eld], Audio directed to unknown port
>[  286.186110] [drm:ironlake_write_eld], ELD: DisplayPort detected
>[  286.238704] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  286.290735] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  286.291053] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[  286.291056] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[  286.291215] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x200
>[  286.291217] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[  286.291220] [drm:ironlake_fdi_link_train], FDI train done
>[  286.291222] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  286.291226] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  286.292609] [drm:intel_update_fbc], disabled per chip default
>[  286.292891] [drm:ibx_irq_handler], PCH transcoder A FIFO underrun
>[  286.293203] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  286.293868] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  286.294488] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[  286.295134] [drm:intel_dp_start_link_train], clock recovery OK
>[  286.296069] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  286.296993] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  286.297926] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  286.298873] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  286.299808] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  286.315695] [drm:intel_connector_check_state], [CONNECTOR:21:DP-1]
>[  286.315710] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  286.315717] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  286.315722] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  286.315729] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  286.315735] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  286.315742] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  286.315748] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  286.315754] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  286.315761] [drm:check_crtc_state], [CRTC:3]
>[  286.315792] [drm:check_crtc_state], [CRTC:5]
>[  286.315796] [drm:check_shared_dpll_state], PCH DPLL A
>[  286.315805] [drm:check_shared_dpll_state], PCH DPLL B
>[  291.319043] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[  291.319050] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=0
>[  291.319054] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [NOCRTC]
>[  291.319057] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  291.319060] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  291.319064] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  291.319283] [drm:intel_dp_link_down], 
>[  291.379873] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  291.481932] ------------[ cut here ]------------
>[  291.481965] WARNING: CPU: 3 PID: 3855 at drivers/gpu/drm/i915/intel_display.c:857 intel_wait_for_pipe_off+0x131/0x138 [i915]()
>[  291.481968] pipe_off wait timed out
>[  291.481970] Modules linked in: dm_mod snd_hda_codec_hdmi snd_hda_codec_idt iTCO_wdt iTCO_vendor_support dcdbas snd_hda_intel firewire_ohci pcspkr snd_hda_codec lpc_ich snd_hwdep i2c_i801 mfd_core snd_pcm firewire_core snd_page_alloc crc_itu_t snd_timer snd soundcore wmi battery ppdev parport_pc parport ac acpi_cpufreq joydev i915 video button drm_kms_helper drm
>[  291.482001] CPU: 3 PID: 3855 Comm: testdisplay Tainted: G        W    3.13.0-rc3_drm-intel-next-queued_820c19_20131218+ #3845
>[  291.482004] Hardware name: Dell Inc. Latitude E6510/0JKDHD, BIOS A05 08/10/2010
>[  291.482006]  00000000 c0890e95 f8265b39 c022b5cf f821f691 f5be8000 00070008 ffffdd97
>[  291.482013]  00000000 c022b64a 00000009 f5787cbc f8265b39 f5787cd4 f821f691 f82642c1
>[  291.482019]  00000359 f8265b39 f5be8000 f5b885c0 f5b62000 f82203f5 f612cc00 00000000
>[  291.482026] Call Trace:
>[  291.482031]  [<c0890e95>] ? dump_stack+0x3e/0x4e
>[  291.482037]  [<c022b5cf>] ? warn_slowpath_common+0x61/0x74
>[  291.482063]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  291.482068]  [<c022b64a>] ? warn_slowpath_fmt+0x29/0x2d
>[  291.482094]  [<f821f691>] ? intel_wait_for_pipe_off+0x131/0x138 [i915]
>[  291.482121]  [<f82203f5>] ? ironlake_crtc_disable+0xc9/0x737 [i915]
>[  291.482136]  [<f805039e>] ? drm_ut_debug_printk+0x34/0x37 [drm]
>[  291.482162]  [<f8225327>] ? __intel_set_mode+0x1be/0xf82 [i915]
>[  291.482188]  [<f8225c49>] ? __intel_set_mode+0xae0/0xf82 [i915]
>[  291.482193]  [<c024f997>] ? up+0x9/0x2a
>[  291.482197]  [<c0257f84>] ? console_unlock+0x309/0x33d
>[  291.482201]  [<c02572e3>] ? cont_flush+0x83/0xa4
>[  291.482206]  [<c0258b00>] ? vprintk+0x15/0x19
>[  291.482233]  [<f82279a9>] ? intel_set_mode+0x11/0x25 [i915]
>[  291.482259]  [<f8227ee3>] ? intel_crtc_set_config+0x526/0x6d9 [i915]
>[  291.482264]  [<c024c176>] ? load_balance+0x106/0x61f
>[  291.482280]  [<f8054b78>] ? drm_mode_set_config_internal+0x36/0x8c [drm]
>[  291.482295]  [<f8054c3b>] ? drm_framebuffer_remove+0x6d/0xd3 [drm]
>[  291.482311]  [<f8056fd1>] ? drm_mode_rmfb+0xaa/0xd0 [drm]
>[  291.482326]  [<f8056f27>] ? drm_mode_addfb2+0x559/0x559 [drm]
>[  291.482337]  [<f804c805>] ? drm_ioctl+0x229/0x31b [drm]
>[  291.482353]  [<f8056f27>] ? drm_mode_addfb2+0x559/0x559 [drm]
>[  291.482357]  [<c08937ef>] ? __schedule+0x5a5/0x6c5
>[  291.482363]  [<c0481697>] ? timerqueue_add+0x6d/0x8e
>[  291.482368]  [<c023fcbe>] ? enqueue_hrtimer+0x10/0x2e
>[  291.482373]  [<c02404f2>] ? __hrtimer_start_range_ns+0x255/0x26c
>[  291.482378]  [<c023ffdb>] ? lock_hrtimer_base.isra.25+0x14/0x2d
>[  291.482382]  [<c024007e>] ? hrtimer_try_to_cancel+0x54/0x5a
>[  291.482393]  [<f804c5dc>] ? drm_core_reclaim_buffers+0x52/0x52 [drm]
>[  291.482397]  [<c02c397d>] ? do_vfs_ioctl+0x3f6/0x43d
>[  291.482401]  [<c0893009>] ? do_nanosleep+0xbc/0xf5
>[  291.482406]  [<c0240baa>] ? hrtimer_nanosleep+0x69/0xcc
>[  291.482410]  [<c02c3a0d>] ? SyS_ioctl+0x49/0x74
>[  291.482414]  [<c0899aba>] ? sysenter_do_call+0x12/0x22
>[  291.482418] ---[ end trace 6c397be8849716af ]---
>[  291.485972] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  291.485982] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  291.486400] [drm:intel_update_fbc], no output, disabling
>[  291.486419] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  291.486424] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  291.486427] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  291.486432] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  291.486436] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  291.486441] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  291.486445] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  291.486450] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  291.486454] [drm:check_crtc_state], [CRTC:3]
>[  291.486457] [drm:check_crtc_state], [CRTC:5]
>[  291.486460] [drm:check_shared_dpll_state], PCH DPLL A
>[  291.486466] [drm:check_shared_dpll_state], PCH DPLL B
>[  291.486484] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  291.486489] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  291.486496] [drm:drm_mode_getconnector], [CONNECTOR:23:?]
>[  291.486500] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:23:HDMI-A-2]
>[  291.486503] [drm:intel_hdmi_detect], [CONNECTOR:23:HDMI-A-2]
>[  291.486733] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  291.486740] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  291.486745] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:23:HDMI-A-2] disconnected
>[  291.486753] [drm:drm_mode_getconnector], [CONNECTOR:23:?]
>[  291.486756] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:23:HDMI-A-2]
>[  291.486760] [drm:intel_hdmi_detect], [CONNECTOR:23:HDMI-A-2]
>[  291.487056] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  291.487059] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  291.487063] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:23:HDMI-A-2] disconnected
>[  291.487070] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  291.487074] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  291.487078] [drm:drm_mode_getconnector], [CONNECTOR:25:?]
>[  291.487081] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:25:HDMI-A-3]
>[  291.487084] [drm:intel_hdmi_detect], [CONNECTOR:25:HDMI-A-3]
>[  291.487246] [drm:gmbus_xfer], GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[  291.487249] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpd
>[  291.487252] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:25:HDMI-A-3] disconnected
>[  291.487257] [drm:drm_mode_getconnector], [CONNECTOR:25:?]
>[  291.487260] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:25:HDMI-A-3]
>[  291.487262] [drm:intel_hdmi_detect], [CONNECTOR:25:HDMI-A-3]
>[  291.487438] [drm:gmbus_xfer], GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[  291.487442] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpd
>[  291.487444] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:25:HDMI-A-3] disconnected
>[  291.487451] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  291.487454] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  291.487457] [drm:drm_mode_getconnector], [CONNECTOR:27:?]
>[  291.487460] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:27:DP-2]
>[  291.487462] [drm:intel_dp_detect], [CONNECTOR:27:DP-2]
>[  291.487466] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:27:DP-2] disconnected
>[  291.487469] [drm:drm_mode_getconnector], [CONNECTOR:27:?]
>[  291.487471] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:27:DP-2]
>[  291.487472] [drm:intel_dp_detect], [CONNECTOR:27:DP-2]
>[  291.487475] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:27:DP-2] disconnected
>[  291.487479] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  291.487481] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[8] ENCODERS[8]
>[  291.487484] [drm:drm_mode_getconnector], [CONNECTOR:29:?]
>[  291.487486] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:29:DP-3]
>[  291.487488] [drm:intel_dp_detect], [CONNECTOR:29:DP-3]
>[  291.487491] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:29:DP-3] disconnected
>[  291.487493] [drm:drm_mode_getconnector], [CONNECTOR:29:?]
>[  291.487495] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:29:DP-3]
>[  291.487496] [drm:intel_dp_detect], [CONNECTOR:29:DP-3]
>[  291.487499] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:29:DP-3] disconnected
>[  291.487574] [drm:intel_crtc_set_config], [CRTC:3] [FB:31] #connectors=1 (x y) (0 0)
>[  291.487576] [drm:intel_set_config_compute_mode_changes], inactive crtc, full mode set
>[  291.487577] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  291.487579] [drm:drm_mode_debug_printmodeline], Modeline 41:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  291.487582] [drm:drm_mode_debug_printmodeline], Modeline 30:"1366x768" 60 69000 1366 1398 1422 1426 768 771 775 806 0x48 0x9
>[  291.487583] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=0
>[  291.487584] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  291.487586] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  291.487587] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  291.487589] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  291.487591] [drm:connected_sink_compute_bpp], [CONNECTOR:10:eDP-1] checking for sink bpp constrains
>[  291.487592] [drm:connected_sink_compute_bpp], clamping display bpp (was 24) to EDID reported max of 18
>[  291.487595] [drm:intel_dp_compute_config], DP link computation with max lane count 1 max bw 0a pixel clock 69000KHz
>[  291.487596] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 18
>[  291.487597] [drm:intel_dp_compute_config], DP link bw required 124200 available 129600
>[  291.487599] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 18, dithering: 1
>[  291.487600] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  291.487600] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  291.487602] [drm:intel_dump_pipe_config], pipe bpp: 18, dithering: 1
>[  291.487603] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  291.487605] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 2009770, gmch_n: 2097152, link_m: 111653, link_n: 262144, tu: 64
>[  291.487606] [drm:intel_dump_pipe_config], requested mode:
>[  291.487608] [drm:drm_mode_debug_printmodeline], Modeline 0:"1366x768" 60 69000 1366 1398 1422 1426 768 771 775 806 0x48 0x9
>[  291.487609] [drm:intel_dump_pipe_config], adjusted mode:
>[  291.487611] [drm:drm_mode_debug_printmodeline], Modeline 0:"1366x768" 60 69000 1366 1398 1422 1426 768 771 775 806 0x48 0x9
>[  291.487613] [drm:intel_dump_crtc_timings], crtc timings: 69000 1366 1398 1422 1426 768 771 775 806, type: 0x48 flags: 0x9
>[  291.487614] [drm:intel_dump_pipe_config], port clock: 162000
>[  291.487615] [drm:intel_dump_pipe_config], pipe src size: 1366x768
>[  291.487616] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  291.487617] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  291.487618] [drm:intel_dump_pipe_config], ips: 0
>[  291.487619] [drm:intel_dump_pipe_config], double wide: 0
>[  291.487644] [drm:ironlake_update_plane], Writing base 00047000 00000000 0 0 5504
>[  291.487648] [drm:intel_crtc_mode_set], [ENCODER:9:TMDS-9] set [MODE:0:1366x768]
>[  291.487650] [drm:ironlake_set_pll_cpu_edp], eDP PLL enable for clock 162000
>[  291.487651] [drm:ironlake_set_pll_cpu_edp], 160MHz cpu eDP clock, might need ilk devA w/a
>[  291.488155] [drm:ironlake_edp_pll_on], 
>[  291.539967] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  291.592002] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  291.592005] [drm:intel_update_fbc], disabled per chip default
>[  291.592010] [drm:ironlake_edp_panel_vdd_on], Turning eDP VDD on
>[  291.592013] [drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
>[  291.592019] [drm:ironlake_wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0000
>[  291.592022] [drm:ironlake_wait_panel_status], Wait complete
>[  291.592029] [drm:ironlake_edp_panel_vdd_on], PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  291.592032] [drm:ironlake_edp_panel_vdd_on], eDP was not running
>[  291.893720] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  291.894172] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  291.894613] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  291.895052] [drm:intel_dp_start_link_train], clock recovery OK
>[  291.895053] [drm:ironlake_edp_panel_on], Turn eDP power on
>[  291.895056] [drm:ironlake_wait_panel_power_cycle], Wait for panel power cycle
>[  291.895061] [drm:ironlake_wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0008
>[  291.895063] [drm:ironlake_wait_panel_status], Wait complete
>[  291.895068] [drm:ironlake_wait_panel_on], Wait for panel power on
>[  291.895073] [drm:ironlake_wait_panel_status], mask b000000f value 80000008 status 0000000a control abcd0009
>[  292.235334] [drm:ironlake_wait_panel_status], Wait complete
>[  292.235340] [drm:ironlake_panel_vdd_off_sync], Turning eDP VDD off
>[  292.235349] [drm:ironlake_panel_vdd_off_sync], PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[  292.236111] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  292.236262] [drm:ironlake_edp_backlight_on], 
>[  292.276357] [drm:intel_panel_enable_backlight], pipe A
>[  292.276362] [drm:intel_panel_actually_set_backlight], set backlight PWM = 93
>[  292.286368] [drm:intel_connector_check_state], [CONNECTOR:10:eDP-1]
>[  292.286382] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  292.286387] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  292.286390] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  292.286395] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  292.286400] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  292.286405] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  292.286409] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  292.286414] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  292.286418] [drm:check_crtc_state], [CRTC:3]
>[  292.286433] [drm:check_crtc_state], [CRTC:5]
>[  292.286436] [drm:check_shared_dpll_state], PCH DPLL A
>[  292.286443] [drm:check_shared_dpll_state], PCH DPLL B
>[  292.286453] [drm:intel_crtc_set_config], [CRTC:5] [FB:31] #connectors=1 (x y) (0 0)
>[  292.286456] [drm:intel_set_config_compute_mode_changes], inactive crtc, full mode set
>[  292.286460] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  292.286463] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  292.286467] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  292.286470] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:5]
>[  292.286473] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  292.286478] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 2, prepare: 2, disable: 0
>[  292.286483] [drm:connected_sink_compute_bpp], [CONNECTOR:21:DP-1] checking for sink bpp constrains
>[  292.286487] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 74250KHz
>[  292.286492] [drm:intel_dp_compute_config], DP link bw 06 lane count 2 clock 162000 bpp 24
>[  292.286495] [drm:intel_dp_compute_config], DP link bw required 178200 available 259200
>[  292.286499] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe B, lanes 1
>[  292.286503] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  292.286506] [drm:intel_dump_pipe_config], [CRTC:5][modeset] config for pipe B
>[  292.286508] [drm:intel_dump_pipe_config], cpu_transcoder: B
>[  292.286511] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  292.286516] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 3460300, gmch_n: 4194304, link_m: 144179, link_n: 524288, tu: 64
>[  292.286521] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 2883584, gmch_n: 4194304, link_m: 120149, link_n: 262144, tu: 64
>[  292.286523] [drm:intel_dump_pipe_config], requested mode:
>[  292.286530] [drm:drm_mode_debug_printmodeline], Modeline 0:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  292.286532] [drm:intel_dump_pipe_config], adjusted mode:
>[  292.286538] [drm:drm_mode_debug_printmodeline], Modeline 0:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[  292.286543] [drm:intel_dump_crtc_timings], crtc timings: 74250 1280 1390 1430 1650 720 725 730 750, type: 0x40 flags: 0x5
>[  292.286546] [drm:intel_dump_pipe_config], port clock: 162000
>[  292.286548] [drm:intel_dump_pipe_config], pipe src size: 1280x720
>[  292.286552] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  292.286555] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  292.286557] [drm:intel_dump_pipe_config], ips: 0
>[  292.286559] [drm:intel_dump_pipe_config], double wide: 0
>[  292.286611] [drm:intel_get_shared_dpll], CRTC:5 using pre-allocated PCH DPLL B
>[  292.286613] [drm:intel_get_shared_dpll], using PCH DPLL B for pipe B
>[  292.286615] [drm:intel_get_shared_dpll], setting up PCH DPLL B
>[  292.286636] [drm:ironlake_update_plane], Writing base 00047000 00000000 0 0 5504
>[  292.286644] [drm:intel_crtc_mode_set], [ENCODER:20:TMDS-20] set [MODE:0:1280x720]
>[  292.286648] [drm:intel_dp_mode_set], Enabling DP audio on pipe B
>[  292.286653] [drm:intel_write_eld], ELD on [CONNECTOR:21:DP-1], [ENCODER:20:TMDS-20]
>[  292.286655] [drm:ironlake_write_eld], ELD on pipe B
>[  292.286659] [drm:ironlake_write_eld], Audio directed to unknown port
>[  292.286661] [drm:ironlake_write_eld], ELD: DisplayPort detected
>[  292.338397] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  292.390428] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  292.390744] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x100
>[  292.390746] [drm:ironlake_fdi_link_train], FDI train 1 done.
>[  292.390904] [drm:ironlake_fdi_link_train], FDI_RX_IIR 0x200
>[  292.390907] [drm:ironlake_fdi_link_train], FDI train 2 done.
>[  292.390909] [drm:ironlake_fdi_link_train], FDI train done
>[  292.390913] [drm:ironlake_enable_shared_dpll], enable PCH DPLL B (active 0, on? 0)for crtc 5
>[  292.390915] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL B
>[  292.392299] [drm:intel_update_fbc], more than one pipe active, disabling compression
>[  292.392613] [drm:ibx_irq_handler], PCH transcoder B FIFO underrun
>[  292.392830] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  292.393490] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  292.394118] [drm:intel_dp_set_signal_levels], Using signal levels 02800000
>[  292.394750] [drm:intel_dp_start_link_train], clock recovery OK
>[  292.395670] [drm:intel_dp_set_signal_levels], Using signal levels 00800000
>[  292.396590] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  292.397511] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  292.398446] [drm:intel_dp_set_signal_levels], Using signal levels 00400000
>[  292.399381] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  292.417439] [drm:intel_connector_check_state], [CONNECTOR:10:eDP-1]
>[  292.417445] [drm:intel_connector_check_state], [CONNECTOR:21:DP-1]
>[  292.417452] [drm:check_encoder_state], [ENCODER:8:DAC-8]
>[  292.417455] [drm:check_encoder_state], [ENCODER:9:TMDS-9]
>[  292.417457] [drm:check_encoder_state], [ENCODER:18:TMDS-18]
>[  292.417460] [drm:check_encoder_state], [ENCODER:20:TMDS-20]
>[  292.417464] [drm:check_encoder_state], [ENCODER:22:TMDS-22]
>[  292.417467] [drm:check_encoder_state], [ENCODER:24:TMDS-24]
>[  292.417470] [drm:check_encoder_state], [ENCODER:26:TMDS-26]
>[  292.417473] [drm:check_encoder_state], [ENCODER:28:TMDS-28]
>[  292.417476] [drm:check_crtc_state], [CRTC:3]
>[  292.417487] [drm:check_crtc_state], [CRTC:5]
>[  292.417511] [drm:check_shared_dpll_state], PCH DPLL A
>[  292.417516] [drm:check_shared_dpll_state], PCH DPLL B
>[  292.417523] [drm:intel_crtc_set_config], [CRTC:3] [FB:31] #connectors=1 (x y) (0 0)
>[  292.417525] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  292.417527] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  292.417529] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:5]
>[  292.417531] [drm:intel_crtc_set_config], [CRTC:5] [FB:31] #connectors=1 (x y) (0 0)
>[  292.417533] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  292.417535] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  292.417537] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:5]
>[  292.417552] [drm:intel_crtc_set_config], [CRTC:3] [FB:31] #connectors=1 (x y) (0 0)
>[  292.417554] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  292.417555] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  292.417557] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:5]
>[  292.417559] [drm:intel_crtc_set_config], [CRTC:5] [FB:31] #connectors=1 (x y) (0 0)
>[  292.417561] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  292.417563] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  292.417564] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:5]
>[  292.423660] [drm:i915_gem_open], 
>[  292.423672] [drm:i915_gem_open], 
>[  292.556707] [drm:intel_crtc_cursor_set], cursor off
>[  292.556714] [drm:intel_crtc_set_config], [CRTC:3] [FB:31] #connectors=1 (x y) (0 0)
>[  292.556722] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  292.556727] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  292.556731] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:5]
>[  292.556736] [drm:intel_crtc_cursor_set], cursor off
>[  292.556739] [drm:intel_crtc_set_config], [CRTC:5] [FB:31] #connectors=1 (x y) (0 0)
>[  292.556744] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  292.556748] [drm:intel_modeset_stage_output_state], [CONNECTOR:10:eDP-1] to [CRTC:3]
>[  292.556752] [drm:intel_modeset_stage_output_state], [CONNECTOR:21:DP-1] to [CRTC:5]

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Attachments on bug 54687: 90911 | 105280

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