Attachment 92172 Details for Bug 73530 – patch 2/2

[patch] patch 2/2

0002-drm-radeon-bail-early-from-enable-ss-in-certain-case.patch (text/plain), 3.00 KB, created by Alex Deucher on 2014-01-15 19:06:08 UTC

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Creator: Alex Deucher

Created: 2014-01-15 19:06:08 UTC

Size: 3.00 KB

patch

obsolete

>From 89996f7d4914d9654f22775d11560a2914ab912b Mon Sep 17 00:00:00 2001
>From: Alex Deucher <alexander.deucher@amd.com>
>Date: Wed, 15 Jan 2014 13:59:47 -0500
>Subject: [PATCH 2/2] drm/radeon: bail early from enable ss in certain cases
>
>If the ss percentage is 0 or we are using external ss,
>just bail when enabling ss.  We disable it explicitly
>earlier in the modeset.  Disabling it again after
>in one of these cases can lead to display problems in
>some cases if the display is already set up.
>
>Bug:
>https://bugs.freedesktop.org/show_bug.cgi?id=73530
>
>Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
>---
> drivers/gpu/drm/radeon/atombios_crtc.c | 19 ++++++++++++-------
> 1 file changed, 12 insertions(+), 7 deletions(-)
>
>diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
>index 13189ca..e69897b 100644
>--- a/drivers/gpu/drm/radeon/atombios_crtc.c
>+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
>@@ -423,7 +423,17 @@ static void atombios_crtc_program_ss(struct radeon_device *rdev,
> 	int index = GetIndexIntoMasterTable(COMMAND, EnableSpreadSpectrumOnPPLL);
> 	union atom_enable_ss args;
> 
>-	if (!enable) {
>+	if (enable) {
>+		/* Don't mess with SS if percentage is 0 or external ss.
>+		 * SS is already disabled previously, and disabling it
>+		 * again can cause display problems if the pll is already
>+		 * programmed.
>+		 */
>+		if (ss->percentage == 0)
>+			return;
>+		if (ss->type & ATOM_EXTERNAL_SS_MASK)
>+			return;
>+	} else {
> 		for (i = 0; i < rdev->num_crtc; i++) {
> 			if (rdev->mode_info.crtcs[i] &&
> 			    rdev->mode_info.crtcs[i]->enabled &&
>@@ -459,8 +469,6 @@ static void atombios_crtc_program_ss(struct radeon_device *rdev,
> 		args.v3.usSpreadSpectrumAmount = cpu_to_le16(ss->amount);
> 		args.v3.usSpreadSpectrumStep = cpu_to_le16(ss->step);
> 		args.v3.ucEnable = enable;
>-		if ((ss->percentage == 0) || (ss->type & ATOM_EXTERNAL_SS_MASK) || ASIC_IS_DCE61(rdev))
>-			args.v3.ucEnable = ATOM_DISABLE;
> 	} else if (ASIC_IS_DCE4(rdev)) {
> 		args.v2.usSpreadSpectrumPercentage = cpu_to_le16(ss->percentage);
> 		args.v2.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK;
>@@ -480,8 +488,6 @@ static void atombios_crtc_program_ss(struct radeon_device *rdev,
> 		args.v2.usSpreadSpectrumAmount = cpu_to_le16(ss->amount);
> 		args.v2.usSpreadSpectrumStep = cpu_to_le16(ss->step);
> 		args.v2.ucEnable = enable;
>-		if ((ss->percentage == 0) || (ss->type & ATOM_EXTERNAL_SS_MASK) || ASIC_IS_DCE41(rdev))
>-			args.v2.ucEnable = ATOM_DISABLE;
> 	} else if (ASIC_IS_DCE3(rdev)) {
> 		args.v1.usSpreadSpectrumPercentage = cpu_to_le16(ss->percentage);
> 		args.v1.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK;
>@@ -503,8 +509,7 @@ static void atombios_crtc_program_ss(struct radeon_device *rdev,
> 		args.lvds_ss_2.ucSpreadSpectrumRange = ss->range;
> 		args.lvds_ss_2.ucEnable = enable;
> 	} else {
>-		if ((enable == ATOM_DISABLE) || (ss->percentage == 0) ||
>-		    (ss->type & ATOM_EXTERNAL_SS_MASK)) {
>+		if (enable == ATOM_DISABLE) {
> 			atombios_disable_ss(rdev, pll_id);
> 			return;
> 		}
>-- 
>1.8.3.1
>

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