Attachment 94184 Details for Bug 75077 – dmesg after run case "testdisplay -i "&"testdisplay -a"

dmesg after run case "testdisplay -i "&"testdisplay -a"

dmesg_miniDP-to-DP_bootupblack_qingshuai_20140217.txt (text/plain), 125.68 KB, created by Qingshuai Tian on 2014-02-17 03:17:18 UTC

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Creator: Qingshuai Tian

Created: 2014-02-17 03:17:18 UTC

Size: 125.68 KB

patch

obsolete

>[    7.009604] [drm:gen6_ppgtt_init], Allocated pde space (2M) at GTT entry: 1220
>[    7.010223] [drm:intel_crtc_cursor_set], cursor off
>[    7.010234] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[    7.010264] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[    7.010268] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[    7.010289] [drm:intel_crtc_cursor_set], cursor off
>[    7.010292] [drm:intel_crtc_set_config], [CRTC:5] [NOFB]
>[    7.010315] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[    7.010318] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[    7.010329] [drm:intel_crtc_cursor_set], cursor off
>[    7.010334] [drm:intel_crtc_set_config], [CRTC:7] [FB:44] #connectors=1 (x y) (0 0)
>[    7.010356] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[    7.010360] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[    7.010438] [drm:i915_gem_open], 
>[    7.011915] [drm:gen6_ppgtt_init], Allocated pde space (2M) at GTT entry: 1220
>[    7.012218] [drm:intel_crtc_cursor_set], cursor off
>[    7.012223] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[    7.012250] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[    7.012255] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[    7.012268] [drm:intel_crtc_cursor_set], cursor off
>[    7.012272] [drm:intel_crtc_set_config], [CRTC:5] [NOFB]
>[    7.012302] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[    7.012306] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[    7.012317] [drm:intel_crtc_cursor_set], cursor off
>[    7.012322] [drm:intel_crtc_set_config], [CRTC:7] [FB:44] #connectors=1 (x y) (0 0)
>[    7.012344] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[    7.012347] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[    7.012421] [drm:i915_gem_open], 
>[    7.013679] [drm:gen6_ppgtt_init], Allocated pde space (2M) at GTT entry: 1220
>[    7.013896] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[    7.013921] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[    7.013941] [drm:drm_mode_getconnector], [CONNECTOR:12:?]
>[    7.013951] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:eDP-1]
>[    7.013955] [drm:intel_dp_detect], [CONNECTOR:12:eDP-1]
>[    7.013972] [drm:edp_panel_vdd_on], Turning eDP VDD on
>[    7.013984] [drm:edp_panel_vdd_on], PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[    7.015148] [drm:intel_dp_probe_oui], Sink OUI: 0010fa
>[    7.015476] [drm:intel_dp_probe_oui], Branch OUI: 000000
>[    7.015554] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[    7.015565] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:eDP-1] probed modes :
>[    7.015570] [drm:drm_mode_debug_printmodeline], Modeline 13:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x48 0x9
>[    7.015578] [drm:drm_mode_getconnector], [CONNECTOR:12:?]
>[    7.030875] systemd-udevd[1372]: worker [1476] did not accept message -1 (Connection refused), kill it
>[    7.031006] systemd-udevd[1372]: worker [1502] did not accept message -1 (Connection refused), kill it
>[    7.031127] systemd-udevd[1372]: worker [1521] did not accept message -1 (Connection refused), kill it
>[    7.044167] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[    7.044176] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1]
>[    7.044180] [drm:intel_crt_detect], [CONNECTOR:9:VGA-1] force=1
>[    7.044190] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0xf40000, result 0
>[    7.044192] [drm:intel_crt_detect], CRT not detected via hotplug
>[    7.051587] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[    7.051591] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[    7.051594] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1] disconnected
>[    7.051616] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[    7.051621] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1]
>[    7.051622] [drm:intel_crt_detect], [CONNECTOR:9:VGA-1] force=1
>[    7.051629] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0xf40000, result 0
>[    7.051631] [drm:intel_crt_detect], CRT not detected via hotplug
>[    7.059592] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[    7.059595] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[    7.059597] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1] disconnected
>[    7.059607] [drm:drm_mode_getconnector], [CONNECTOR:20:?]
>[    7.059611] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:HDMI-A-1]
>[    7.059613] [drm:intel_hdmi_detect], [CONNECTOR:20:HDMI-A-1]
>[    7.059895] [drm:gmbus_xfer], GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    7.059899] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[    7.059901] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:HDMI-A-1] disconnected
>[    7.059908] [drm:drm_mode_getconnector], [CONNECTOR:20:?]
>[    7.059911] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:HDMI-A-1]
>[    7.059913] [drm:intel_hdmi_detect], [CONNECTOR:20:HDMI-A-1]
>[    7.060142] [drm:gmbus_xfer], GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    7.060146] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[    7.060149] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:HDMI-A-1] disconnected
>[    7.060158] [drm:drm_mode_getconnector], [CONNECTOR:22:?]
>[    7.060162] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:22:DP-1]
>[    7.060164] [drm:intel_dp_detect], [CONNECTOR:22:DP-1]
>[    7.060170] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:22:DP-1] disconnected
>[    7.060172] [drm:drm_mode_getconnector], [CONNECTOR:22:?]
>[    7.060174] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:22:DP-1]
>[    7.060176] [drm:intel_dp_detect], [CONNECTOR:22:DP-1]
>[    7.060180] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:22:DP-1] disconnected
>[    7.060185] [drm:drm_mode_getconnector], [CONNECTOR:24:?]
>[    7.060187] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:24:HDMI-A-2]
>[    7.060189] [drm:intel_hdmi_detect], [CONNECTOR:24:HDMI-A-2]
>[    7.060394] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[    7.060396] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[    7.060398] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:24:HDMI-A-2] disconnected
>[    7.060401] [drm:drm_mode_getconnector], [CONNECTOR:24:?]
>[    7.060403] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:24:HDMI-A-2]
>[    7.060404] [drm:intel_hdmi_detect], [CONNECTOR:24:HDMI-A-2]
>[    7.060626] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[    7.060628] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[    7.060630] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:24:HDMI-A-2] disconnected
>[    7.060636] [drm:drm_mode_getconnector], [CONNECTOR:26:?]
>[    7.060638] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:26:HDMI-A-3]
>[    7.060640] [drm:intel_hdmi_detect], [CONNECTOR:26:HDMI-A-3]
>[    7.060821] [drm:gmbus_xfer], GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[    7.060824] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpd
>[    7.060825] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:26:HDMI-A-3] disconnected
>[    7.060829] [drm:drm_mode_getconnector], [CONNECTOR:26:?]
>[    7.060831] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:26:HDMI-A-3]
>[    7.060833] [drm:intel_hdmi_detect], [CONNECTOR:26:HDMI-A-3]
>[    7.061000] [drm:gmbus_xfer], GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[    7.061001] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpd
>[    7.061003] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:26:HDMI-A-3] disconnected
>[    7.061010] [drm:drm_mode_getconnector], [CONNECTOR:28:?]
>[    7.061013] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:28:DP-2]
>[    7.061015] [drm:intel_dp_detect], [CONNECTOR:28:DP-2]
>[    7.061871] [drm:intel_dp_get_dpcd], DPCD: 11 0a 84 01 01 00 00 00 02 00 00 00 00 00 00
>[    7.063658] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[    7.113084] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[    7.114877] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[    7.164244] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[    7.164348] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[    7.164393] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:28:DP-2] probed modes :
>[    7.164397] [drm:drm_mode_debug_printmodeline], Modeline 32:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x48 0x9
>[    7.164402] [drm:drm_mode_debug_printmodeline], Modeline 39:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    7.164406] [drm:drm_mode_debug_printmodeline], Modeline 34:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[    7.164410] [drm:drm_mode_debug_printmodeline], Modeline 33:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[    7.164414] [drm:drm_mode_debug_printmodeline], Modeline 40:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[    7.164418] [drm:drm_mode_debug_printmodeline], Modeline 41:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[    7.164422] [drm:drm_mode_debug_printmodeline], Modeline 42:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[    7.164426] [drm:drm_mode_debug_printmodeline], Modeline 35:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[    7.164430] [drm:drm_mode_debug_printmodeline], Modeline 36:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[    7.164434] [drm:drm_mode_debug_printmodeline], Modeline 37:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[    7.164438] [drm:drm_mode_debug_printmodeline], Modeline 38:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[    7.164444] [drm:drm_mode_getconnector], [CONNECTOR:28:?]
>[    7.164464] [drm:drm_mode_getconnector], [CONNECTOR:30:?]
>[    7.164468] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:30:DP-3]
>[    7.164470] [drm:intel_dp_detect], [CONNECTOR:30:DP-3]
>[    7.164478] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:30:DP-3] disconnected
>[    7.164482] [drm:drm_mode_getconnector], [CONNECTOR:30:?]
>[    7.164486] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:30:DP-3]
>[    7.164488] [drm:intel_dp_detect], [CONNECTOR:30:DP-3]
>[    7.164495] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:30:DP-3] disconnected
>[    7.164764] [drm:drm_mode_addfb], [FB:45]
>[    7.209498] [drm:drm_mode_addfb], [FB:45]
>[    7.209618] [drm:drm_mode_setcrtc], [CRTC:7]
>[    7.209677] [drm:drm_mode_setcrtc], [CONNECTOR:12:eDP-1]
>[    7.209681] [drm:intel_crtc_set_config], [CRTC:7] [FB:45] #connectors=1 (x y) (0 0)
>[    7.209707] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=1
>[    7.209710] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[    7.224764] [drm:ironlake_update_plane], Writing base 01420000 00000000 0 0 10240
>[    7.244939] [drm:drm_mode_setcrtc], [CRTC:7]
>[    7.244963] [drm:drm_mode_setcrtc], [CONNECTOR:12:eDP-1]
>[    7.244967] [drm:intel_crtc_set_config], [CRTC:7] [FB:45] #connectors=1 (x y) (0 0)
>[    7.244993] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[    7.244997] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[    8.365665] [drm:edp_panel_vdd_off_sync], Turning eDP VDD off
>[    8.365683] [drm:edp_panel_vdd_off_sync], PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[   37.131246] systemd-journald[1295]: Received SIGTERM
>[   37.132587] random: nonblocking pool is initialized
>[   37.393460] systemd-readahead[2398]: Bumped block_nr parameter of 8:0 to 20480. This is a temporary hack and should be removed one day.
>[   37.395193] systemd-readahead[2399]: Failed to create fanotify object: Function not implemented
>[   37.427284] systemd-udevd[2410]: starting version 195
>[   37.463467] calling  uinput_init+0x0/0x12 [uinput] @ 2417
>[   37.464183] initcall uinput_init+0x0/0x12 [uinput] returned 0 after 690 usecs
>[   37.483717] EXT4-fs (sda7): re-mounted. Opts: (null)
>[   37.552401] calling  vmx_init+0x0/0x3ee [kvm_intel] @ 2503
>[   37.559679] initcall vmx_init+0x0/0x3ee [kvm_intel] returned 0 after 7091 usecs
>[   37.775552] calling  acpi_cpufreq_init+0x0/0x1ec [acpi_cpufreq] @ 2518
>[   37.785348] calling  acpi_ac_init+0x0/0x35 [ac] @ 2538
>[   37.789410] ACPI: AC Adapter [ADP1] (on-line)
>[   37.790720] initcall acpi_ac_init+0x0/0x35 [ac] returned 0 after 5233 usecs
>[   37.791406] initcall acpi_cpufreq_init+0x0/0x1ec [acpi_cpufreq] returned 0 after 15462 usecs
>[   37.966085] calling  acpi_battery_init+0x0/0x16 [battery] @ 2506
>[   37.966101] initcall acpi_battery_init+0x0/0x16 [battery] returned 0 after 9 usecs
>[   38.036496] ACPI: Battery Slot [BAT0] (battery present)
>[   38.048367] calling  init_soundcore+0x0/0x9a [soundcore] @ 2529
>[   38.048656] initcall init_soundcore+0x0/0x9a [soundcore] returned 0 after 273 usecs
>[   38.054833] calling  alsa_sound_init+0x0/0x9a [snd] @ 2529
>[   38.055176] initcall alsa_sound_init+0x0/0x9a [snd] returned 0 after 325 usecs
>[   38.062016] calling  alsa_timer_init+0x0/0x18a [snd_timer] @ 2529
>[   38.065653] initcall alsa_timer_init+0x0/0x18a [snd_timer] returned 0 after 3540 usecs
>[   38.066119] calling  lpc_ich_driver_init+0x0/0x20 [lpc_ich] @ 2518
>[   38.069502] ACPI Warning: 0x0000000000000428-0x000000000000042f SystemIO conflicts with Region \PMIO 1 (20131115/utaddress-251)
>[   38.069514] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[   38.069532] ACPI Warning: 0x0000000000000530-0x000000000000053f SystemIO conflicts with Region \GPIO 1 (20131115/utaddress-251)
>[   38.069540] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[   38.069550] ACPI Warning: 0x0000000000000500-0x000000000000052f SystemIO conflicts with Region \GPIO 1 (20131115/utaddress-251)
>[   38.069557] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[   38.069560] lpc_ich: Resource conflict(s) found affecting gpio_ich
>[   38.070550] calling  snd_mem_init+0x0/0x2c [snd_page_alloc] @ 2529
>[   38.070575] initcall snd_mem_init+0x0/0x2c [snd_page_alloc] returned 0 after 17 usecs
>[   38.073262] initcall lpc_ich_driver_init+0x0/0x20 [lpc_ich] returned 0 after 6962 usecs
>[   38.082719] calling  i2c_i801_init+0x0/0xab [i2c_i801] @ 2514
>[   38.084596] ACPI Warning: 0x000000000000efa0-0x000000000000efbf SystemIO conflicts with Region \_SB_.PCI0.SBUS.SMBI 1 (20131115/utaddress-251)
>[   38.084608] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[   38.084931] initcall i2c_i801_init+0x0/0xab [i2c_i801] returned 0 after 2150 usecs
>[   38.095554] calling  alsa_pcm_init+0x0/0x6c [snd_pcm] @ 3373
>[   38.095643] initcall alsa_pcm_init+0x0/0x6c [snd_pcm] returned 0 after 78 usecs
>[   38.101597] calling  alsa_seq_device_init+0x0/0x5b [snd_seq_device] @ 3383
>[   38.101640] initcall alsa_seq_device_init+0x0/0x5b [snd_seq_device] returned 0 after 36 usecs
>[   38.112354] calling  alsa_seq_init+0x0/0x49 [snd_seq] @ 3383
>[   38.113340] initcall alsa_seq_init+0x0/0x49 [snd_seq] returned 0 after 952 usecs
>[   38.121115] calling  alsa_hwdep_init+0x0/0x64 [snd_hwdep] @ 2529
>[   38.121160] initcall alsa_hwdep_init+0x0/0x64 [snd_hwdep] returned 0 after 38 usecs
>[   38.130940] calling  azx_driver_init+0x0/0x20 [snd_hda_intel] @ 2529
>[   38.130966] calling  pcspkr_platform_driver_init+0x0/0x19 [pcspkr] @ 2526
>[   38.133736] snd_hda_intel 0000:00:1b.0: irq 47 for MSI/MSI-X
>[   38.135453] input: PC Speaker as /devices/platform/pcspkr/input/input8
>[   38.136455] initcall pcspkr_platform_driver_init+0x0/0x19 [pcspkr] returned 0 after 5349 usecs
>[   38.150912] calling  patch_cirrus_init+0x0/0x12 [snd_hda_codec_cirrus] @ 3405
>[   38.150921] initcall patch_cirrus_init+0x0/0x12 [snd_hda_codec_cirrus] returned 0 after 2 usecs
>[   38.152110] ALSA sound/pci/hda/hda_auto_parser.c:393 autoconfig: line_outs=2 (0xb/0xa/0x0/0x0/0x0) type:speaker
>[   38.152115] ALSA sound/pci/hda/hda_auto_parser.c:397    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>[   38.152118] ALSA sound/pci/hda/hda_auto_parser.c:401    hp_outs=1 (0x9/0x0/0x0/0x0/0x0)
>[   38.152121] ALSA sound/pci/hda/hda_auto_parser.c:402    mono: mono_out=0x0
>[   38.152123] ALSA sound/pci/hda/hda_auto_parser.c:405    dig-out=0x10/0x0
>[   38.152126] ALSA sound/pci/hda/hda_auto_parser.c:406    inputs:
>[   38.152130] ALSA sound/pci/hda/hda_auto_parser.c:410      Internal Mic=0x12
>[   38.152134] ALSA sound/pci/hda/hda_auto_parser.c:410      Internal Mic=0xe
>[   38.169790] calling  patch_hdmi_init+0x0/0x12 [snd_hda_codec_hdmi] @ 3411
>[   38.169798] initcall patch_hdmi_init+0x0/0x12 [snd_hda_codec_hdmi] returned 0 after 1 usecs
>[   38.230516] initcall azx_driver_init+0x0/0x20 [snd_hda_intel] returned 0 after 97166 usecs
>[   38.259499] calling  applesmc_init+0x0/0x374 [applesmc] @ 2538
>[   38.272473] calling  videodev_init+0x0/0x86 [videodev] @ 2506
>[   38.272477] Linux video capture interface: v2.00
>[   38.273307] initcall videodev_init+0x0/0x86 [videodev] returned 0 after 802 usecs
>[   38.311680] calling  uvc_init+0x0/0x46 [uvcvideo] @ 2506
>[   38.312222] uvcvideo: Found UVC 1.00 device FaceTime HD Camera (Built-in) (05ac:8510)
>[   38.314471] applesmc: key=455 fan=2 temp=29 index=29 acc=1 lux=2 kbd=1
>[   38.357793] Adding 8060924k swap on /dev/sda4.  Priority:-1 extents:1 across:8060924k SS
>[   38.364224] input: FaceTime HD Camera (Built-in) as /devices/pci0000:00/0000:00:1a.0/usb1/1-1/1-1.1/1-1.1:1.0/input/input9
>[   38.380893] usbcore: registered new interface driver uvcvideo
>[   38.380897] USB Video Class driver (1.1.1)
>[   38.380906] initcall uvc_init+0x0/0x46 [uvcvideo] returned 0 after 67547 usecs
>[   38.381883] input: applesmc as /devices/platform/applesmc.768/input/input10
>[   38.401643] initcall applesmc_init+0x0/0x374 [applesmc] returned 0 after 138710 usecs
>[   38.440534] calling  init_hfsplus_fs+0x0/0x6c [hfsplus] @ 3472
>[   38.445156] initcall init_hfsplus_fs+0x0/0x6c [hfsplus] returned 0 after 4499 usecs
>[   38.456338] calling  init_nls_utf8+0x0/0x25 [nls_utf8] @ 3479
>[   38.456346] initcall init_nls_utf8+0x0/0x25 [nls_utf8] returned 0 after 1 usecs
>[   38.488225] EXT4-fs (sda6): mounted filesystem with ordered data mode. Opts: (null)
>[   38.502975] calling  iTCO_vendor_init_module+0x0/0x1c [iTCO_vendor_support] @ 2506
>[   38.502980] iTCO_vendor_support: vendor-support=0
>[   38.502985] initcall iTCO_vendor_init_module+0x0/0x1c [iTCO_vendor_support] returned 0 after 2 usecs
>[   38.504337] calling  iTCO_wdt_init_module+0x0/0x2e [iTCO_wdt] @ 2506
>[   38.504340] iTCO_wdt: Intel TCO WatchDog Timer Driver v1.10
>[   38.510031] iTCO_wdt: unable to reset NO_REBOOT flag, device disabled by hardware/BIOS
>[   38.510346] initcall iTCO_wdt_init_module+0x0/0x2e [iTCO_wdt] returned 0 after 5857 usecs
>[   38.545098] calling  joydev_init+0x0/0x12 [joydev] @ 2507
>[   38.547493] initcall joydev_init+0x0/0x12 [joydev] returned 0 after 2327 usecs
>[   38.740754] systemd-journald[2422]: Received SIGUSR1
>[   39.013487] calling  ib_core_init+0x0/0x9e [ib_core] @ 3608
>[   39.014094] initcall ib_core_init+0x0/0x9e [ib_core] returned 0 after 583 usecs
>[   39.023210] calling  ib_mad_init_module+0x0/0xcb [ib_mad] @ 3608
>[   39.023264] initcall ib_mad_init_module+0x0/0xcb [ib_mad] returned 0 after 46 usecs
>[   39.025547] calling  ib_sa_init+0x0/0x62 [ib_sa] @ 3608
>[   39.025763] initcall ib_sa_init+0x0/0x62 [ib_sa] returned 0 after 203 usecs
>[   39.027715] calling  ib_cm_init+0x0/0x163 [ib_cm] @ 3608
>[   39.028168] initcall ib_cm_init+0x0/0x163 [ib_cm] returned 0 after 435 usecs
>[   39.029533] calling  iw_cm_init+0x0/0x3f [iw_cm] @ 3608
>[   39.029721] initcall iw_cm_init+0x0/0x3f [iw_cm] returned 0 after 176 usecs
>[   39.031823] calling  addr_init+0x0/0x50 [ib_addr] @ 3608
>[   39.032017] initcall addr_init+0x0/0x50 [ib_addr] returned 0 after 181 usecs
>[   39.035796] calling  cma_init+0x0/0xdc [rdma_cm] @ 3608
>[   39.036597] initcall cma_init+0x0/0xdc [rdma_cm] returned 0 after 773 usecs
>[   39.040107] calling  iser_init+0x0/0x12b [ib_iser] @ 3608
>[   39.040525] iscsi: registered transport (iser)
>[   39.040532] initcall iser_init+0x0/0x12b [ib_iser] returned 0 after 407 usecs
>[   39.130739] calling  rfkill_init+0x0/0x74 [rfkill] @ 3654
>[   39.132458] initcall rfkill_init+0x0/0x74 [rfkill] returned 0 after 1667 usecs
>[   39.141028] calling  bt_init+0x0/0x99 [bluetooth] @ 3654
>[   39.141032] Bluetooth: Core ver 2.17
>[   39.141278] NET: Registered protocol family 31
>[   39.141281] Bluetooth: HCI device and connection manager initialized
>[   39.141361] Bluetooth: HCI socket layer initialized
>[   39.141378] Bluetooth: L2CAP socket layer initialized
>[   39.141416] Bluetooth: SCO socket layer initialized
>[   39.141447] initcall bt_init+0x0/0x99 [bluetooth] returned 0 after 394 usecs
>[   39.147110] calling  bnep_init+0x0/0x73 [bnep] @ 3661
>[   39.147115] Bluetooth: BNEP (Ethernet Emulation) ver 1.3
>[   39.147118] Bluetooth: BNEP filters: protocol multicast
>[   39.147143] Bluetooth: BNEP socket layer initialized
>[   39.147148] initcall bnep_init+0x0/0x73 [bnep] returned 0 after 30 usecs
>[   39.480587] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[   39.480632] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[   39.480635] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[   39.480651] [drm:intel_crtc_set_config], [CRTC:5] [NOFB]
>[   39.480679] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[   39.480681] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[   39.480689] [drm:intel_crtc_set_config], [CRTC:7] [FB:44] #connectors=1 (x y) (0 0)
>[   39.480717] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=1
>[   39.480718] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[   39.480751] [drm:ironlake_update_plane], Writing base 00274000 00000000 0 0 10240
>[   39.481998] [drm:intel_crtc_set_config], [CRTC:7] [FB:44] #connectors=1 (x y) (0 0)
>[   39.482041] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[   39.482043] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[   39.482065] [drm:intel_crtc_set_config], [CRTC:7] [FB:44] #connectors=1 (x y) (0 0)
>[   39.482097] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[   39.482098] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[   39.498126] [drm:intel_crtc_cursor_set], cursor off
>[   39.498131] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[   39.498162] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[   39.498164] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[   39.498173] [drm:intel_crtc_cursor_set], cursor off
>[   39.498175] [drm:intel_crtc_set_config], [CRTC:5] [NOFB]
>[   39.498199] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[   39.498201] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[   39.498208] [drm:intel_crtc_cursor_set], cursor off
>[   39.498210] [drm:intel_crtc_set_config], [CRTC:7] [FB:44] #connectors=1 (x y) (0 0)
>[   39.498234] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[   39.498236] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[   39.887306] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
>[   39.929489] asix 3-3:1.0 eth0: link down
>[   45.052775] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
>[   45.053852] asix 3-3:1.0 eth0: link up, 100Mbps, full-duplex, lpa 0xC5E1
>[   46.752040] calling  xt_init+0x0/0x156 [x_tables] @ 3765
>[   46.752058] initcall xt_init+0x0/0x156 [x_tables] returned 0 after 11 usecs
>[   46.754374] calling  ebtables_init+0x0/0x4a [ebtables] @ 3765
>[   46.754428] Ebtables v2.0 registered
>[   46.754432] initcall ebtables_init+0x0/0x4a [ebtables] returned 0 after 51 usecs
>[   46.758378] calling  ebtable_nat_init+0x0/0x3e [ebtable_nat] @ 3769
>[   46.758529] initcall ebtable_nat_init+0x0/0x3e [ebtable_nat] returned 0 after 139 usecs
>[   46.781584] calling  ip_tables_init+0x0/0x9e [ip_tables] @ 3774
>[   46.781638] ip_tables: (C) 2000-2006 Netfilter Core Team
>[   46.781643] initcall ip_tables_init+0x0/0x9e [ip_tables] returned 0 after 50 usecs
>[   46.786050] calling  iptable_filter_init+0x0/0x4c [iptable_filter] @ 3777
>[   46.786409] initcall iptable_filter_init+0x0/0x4c [iptable_filter] returned 0 after 344 usecs
>[   46.805915] calling  ip6_tables_init+0x0/0x9e [ip6_tables] @ 3782
>[   46.805964] ip6_tables: (C) 2000-2006 Netfilter Core Team
>[   46.805968] initcall ip6_tables_init+0x0/0x9e [ip6_tables] returned 0 after 46 usecs
>[   46.810501] calling  ip6table_filter_init+0x0/0x55 [ip6table_filter] @ 3785
>[   46.810704] initcall ip6table_filter_init+0x0/0x55 [ip6table_filter] returned 0 after 190 usecs
>[  113.424596] [drm:i915_gem_open], 
>[  113.425467] [drm:gen6_ppgtt_init], Allocated pde space (2M) at GTT entry: 1220
>[  113.425750] [drm:intel_crtc_cursor_set], cursor off
>[  113.425753] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[  113.425787] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  113.425790] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[  113.425799] [drm:intel_crtc_cursor_set], cursor off
>[  113.425801] [drm:intel_crtc_set_config], [CRTC:5] [NOFB]
>[  113.425829] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  113.425831] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[  113.425838] [drm:intel_crtc_cursor_set], cursor off
>[  113.425841] [drm:intel_crtc_set_config], [CRTC:7] [FB:44] #connectors=1 (x y) (0 0)
>[  113.425869] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  113.425872] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[  113.425924] [drm:i915_gem_open], 
>[  113.426787] [drm:gen6_ppgtt_init], Allocated pde space (2M) at GTT entry: 1220
>[  113.427895] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  113.427912] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  113.428049] [drm:drm_mode_getconnector], [CONNECTOR:12:?]
>[  113.428054] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:eDP-1]
>[  113.428056] [drm:intel_dp_detect], [CONNECTOR:12:eDP-1]
>[  113.428063] [drm:edp_panel_vdd_on], Turning eDP VDD on
>[  113.428071] [drm:edp_panel_vdd_on], PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  113.428266] [drm:intel_dp_probe_oui], Sink OUI: 0010fa
>[  113.428448] [drm:intel_dp_probe_oui], Branch OUI: 000000
>[  113.428509] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[  113.428517] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:eDP-1] probed modes :
>[  113.428523] [drm:drm_mode_debug_printmodeline], Modeline 13:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x48 0x9
>[  113.428530] [drm:drm_mode_getconnector], [CONNECTOR:12:?]
>[  113.428752] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[  113.428757] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1]
>[  113.428760] [drm:intel_crt_detect], [CONNECTOR:9:VGA-1] force=1
>[  113.428769] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0xf40000, result 0
>[  113.428771] [drm:intel_crt_detect], CRT not detected via hotplug
>[  113.436577] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[  113.436580] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[  113.436583] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1] disconnected
>[  113.436588] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[  113.436592] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1]
>[  113.436595] [drm:intel_crt_detect], [CONNECTOR:9:VGA-1] force=1
>[  113.436601] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0xf40000, result 0
>[  113.436604] [drm:intel_crt_detect], CRT not detected via hotplug
>[  113.444585] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[  113.444588] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[  113.444591] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1] disconnected
>[  113.444697] [drm:drm_mode_getconnector], [CONNECTOR:20:?]
>[  113.444701] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:HDMI-A-1]
>[  113.444703] [drm:intel_hdmi_detect], [CONNECTOR:20:HDMI-A-1]
>[  113.444880] [drm:gmbus_xfer], GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  113.444883] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  113.444886] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:HDMI-A-1] disconnected
>[  113.444891] [drm:drm_mode_getconnector], [CONNECTOR:20:?]
>[  113.444894] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:HDMI-A-1]
>[  113.444897] [drm:intel_hdmi_detect], [CONNECTOR:20:HDMI-A-1]
>[  113.445063] [drm:gmbus_xfer], GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  113.445065] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  113.445068] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:HDMI-A-1] disconnected
>[  113.445168] [drm:drm_mode_getconnector], [CONNECTOR:22:?]
>[  113.445172] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:22:DP-1]
>[  113.445175] [drm:intel_dp_detect], [CONNECTOR:22:DP-1]
>[  113.445182] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:22:DP-1] disconnected
>[  113.445186] [drm:drm_mode_getconnector], [CONNECTOR:22:?]
>[  113.445190] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:22:DP-1]
>[  113.445192] [drm:intel_dp_detect], [CONNECTOR:22:DP-1]
>[  113.445197] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:22:DP-1] disconnected
>[  113.445291] [drm:drm_mode_getconnector], [CONNECTOR:24:?]
>[  113.445295] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:24:HDMI-A-2]
>[  113.445298] [drm:intel_hdmi_detect], [CONNECTOR:24:HDMI-A-2]
>[  113.445469] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  113.445472] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  113.445475] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:24:HDMI-A-2] disconnected
>[  113.445479] [drm:drm_mode_getconnector], [CONNECTOR:24:?]
>[  113.445483] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:24:HDMI-A-2]
>[  113.445485] [drm:intel_hdmi_detect], [CONNECTOR:24:HDMI-A-2]
>[  113.445664] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  113.445668] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  113.445671] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:24:HDMI-A-2] disconnected
>[  113.445793] [drm:drm_mode_getconnector], [CONNECTOR:26:?]
>[  113.445796] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:26:HDMI-A-3]
>[  113.445797] [drm:intel_hdmi_detect], [CONNECTOR:26:HDMI-A-3]
>[  113.445980] [drm:gmbus_xfer], GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[  113.445982] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpd
>[  113.445985] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:26:HDMI-A-3] disconnected
>[  113.445989] [drm:drm_mode_getconnector], [CONNECTOR:26:?]
>[  113.445992] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:26:HDMI-A-3]
>[  113.445993] [drm:intel_hdmi_detect], [CONNECTOR:26:HDMI-A-3]
>[  113.446154] [drm:gmbus_xfer], GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[  113.446156] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpd
>[  113.446158] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:26:HDMI-A-3] disconnected
>[  113.446236] [drm:drm_mode_getconnector], [CONNECTOR:28:?]
>[  113.446238] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:28:DP-2]
>[  113.446241] [drm:intel_dp_detect], [CONNECTOR:28:DP-2]
>[  113.447074] [drm:intel_dp_get_dpcd], DPCD: 11 0a 84 01 01 00 00 00 02 00 00 00 00 00 00
>[  113.448859] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  113.498326] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  113.500119] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  113.549613] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  113.549814] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[  113.549860] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:28:DP-2] probed modes :
>[  113.549864] [drm:drm_mode_debug_printmodeline], Modeline 32:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x48 0x9
>[  113.549869] [drm:drm_mode_debug_printmodeline], Modeline 39:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  113.549873] [drm:drm_mode_debug_printmodeline], Modeline 34:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  113.549877] [drm:drm_mode_debug_printmodeline], Modeline 33:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  113.549881] [drm:drm_mode_debug_printmodeline], Modeline 40:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  113.549885] [drm:drm_mode_debug_printmodeline], Modeline 41:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  113.549890] [drm:drm_mode_debug_printmodeline], Modeline 42:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  113.549894] [drm:drm_mode_debug_printmodeline], Modeline 35:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  113.549898] [drm:drm_mode_debug_printmodeline], Modeline 36:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  113.549902] [drm:drm_mode_debug_printmodeline], Modeline 37:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  113.549906] [drm:drm_mode_debug_printmodeline], Modeline 38:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  113.549920] [drm:drm_mode_getconnector], [CONNECTOR:28:?]
>[  113.550280] [drm:drm_mode_getconnector], [CONNECTOR:30:?]
>[  113.550285] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:30:DP-3]
>[  113.550287] [drm:intel_dp_detect], [CONNECTOR:30:DP-3]
>[  113.550295] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:30:DP-3] disconnected
>[  113.550299] [drm:drm_mode_getconnector], [CONNECTOR:30:?]
>[  113.550302] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:30:DP-3]
>[  113.550305] [drm:intel_dp_detect], [CONNECTOR:30:DP-3]
>[  113.550308] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:30:DP-3] disconnected
>[  113.550429] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  113.550440] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  113.551250] [drm:intel_crtc_cursor_set], cursor off
>[  113.551255] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[  113.551291] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  113.551295] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[  113.551310] [drm:intel_crtc_cursor_set], cursor off
>[  113.551313] [drm:intel_crtc_set_config], [CRTC:5] [NOFB]
>[  113.551348] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  113.551352] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[  113.551362] [drm:intel_crtc_cursor_set], cursor off
>[  113.551367] [drm:intel_crtc_set_config], [CRTC:7] [FB:44] #connectors=1 (x y) (0 0)
>[  113.551399] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  113.551403] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[  116.436771] [drm:edp_panel_vdd_off_sync], Turning eDP VDD off
>[  116.436786] [drm:edp_panel_vdd_off_sync], PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  361.558981] [drm:i915_gem_open], 
>[  361.559882] [drm:gen6_ppgtt_init], Allocated pde space (2M) at GTT entry: 1430
>[  361.560128] [drm:intel_crtc_cursor_set], cursor off
>[  361.560132] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[  361.560164] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  361.560167] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[  361.560176] [drm:intel_crtc_cursor_set], cursor off
>[  361.560178] [drm:intel_crtc_set_config], [CRTC:5] [NOFB]
>[  361.560205] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  361.560207] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[  361.560214] [drm:intel_crtc_cursor_set], cursor off
>[  361.560217] [drm:intel_crtc_set_config], [CRTC:7] [FB:44] #connectors=1 (x y) (0 0)
>[  361.560243] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  361.560245] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[  361.560296] [drm:i915_gem_open], 
>[  361.561154] [drm:gen6_ppgtt_init], Allocated pde space (2M) at GTT entry: 1430
>[  361.562281] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  361.562294] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  361.562305] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  361.562312] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  361.562318] [drm:drm_mode_getconnector], [CONNECTOR:12:?]
>[  361.562322] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:eDP-1]
>[  361.562324] [drm:intel_dp_detect], [CONNECTOR:12:eDP-1]
>[  361.562331] [drm:edp_panel_vdd_on], Turning eDP VDD on
>[  361.562339] [drm:edp_panel_vdd_on], PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  361.562570] [drm:intel_dp_probe_oui], Sink OUI: 0010fa
>[  361.562754] [drm:intel_dp_probe_oui], Branch OUI: 000000
>[  361.562841] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[  361.562853] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:12:eDP-1] probed modes :
>[  361.562858] [drm:drm_mode_debug_printmodeline], Modeline 13:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x48 0x9
>[  361.562867] [drm:drm_mode_getconnector], [CONNECTOR:12:?]
>[  361.562893] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  361.562904] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  361.563010] [drm:drm_mode_addfb], [FB:45]
>[  361.652852] [drm:drm_mode_setcrtc], [CRTC:3]
>[  361.652922] [drm:drm_mode_setcrtc], [CONNECTOR:12:eDP-1]
>[  361.652927] [drm:intel_crtc_set_config], [CRTC:3] [FB:45] #connectors=1 (x y) (0 0)
>[  361.652973] [drm:intel_set_config_compute_mode_changes], inactive crtc, full mode set
>[  361.652976] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  361.652980] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[  361.652986] [drm:drm_mode_debug_printmodeline], Modeline 46:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x48 0x9
>[  361.652992] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=0
>[  361.652998] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:3]
>[  361.653002] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  361.653005] [drm:intel_modeset_stage_output_state], crtc enabled, full mode switch
>[  361.653007] [drm:intel_modeset_stage_output_state], crtc disabled, full mode switch
>[  361.653023] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 4
>[  361.653063] [drm:connected_sink_compute_bpp], [CONNECTOR:12:eDP-1] checking for sink bpp constrains
>[  361.653067] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 268500KHz
>[  361.653072] [drm:intel_dp_compute_config], DP link bw 0a lane count 4 clock 270000 bpp 24
>[  361.653074] [drm:intel_dp_compute_config], DP link bw required 644400 available 864000
>[  361.653076] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  361.653078] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  361.653080] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  361.653081] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  361.653083] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  361.653087] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 6256503, gmch_n: 8388608, link_m: 521375, link_n: 524288, tu: 64
>[  361.653091] [drm:intel_dump_pipe_config], requested mode:
>[  361.653095] [drm:drm_mode_debug_printmodeline], Modeline 0:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x48 0x9
>[  361.653099] [drm:intel_dump_pipe_config], adjusted mode:
>[  361.653103] [drm:drm_mode_debug_printmodeline], Modeline 0:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x48 0x9
>[  361.653108] [drm:intel_dump_crtc_timings], crtc timings: 268500 2560 2608 2640 2720 1600 1603 1609 1646, type: 0x48 flags: 0x9
>[  361.653111] [drm:intel_dump_pipe_config], port clock: 270000
>[  361.653114] [drm:intel_dump_pipe_config], pipe src size: 2560x1600
>[  361.653117] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  361.653120] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  361.653123] [drm:intel_dump_pipe_config], ips: 0
>[  361.653126] [drm:intel_dump_pipe_config], double wide: 0
>[  361.653135] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  361.653148] [drm:intel_edp_backlight_off], 
>[  361.653344] [drm:intel_edp_panel_off], Turn eDP power off
>[  361.904128] [drm:wait_panel_off], Wait for panel power off time
>[  361.904140] [drm:wait_panel_status], mask b0000000 value 00000000 status 80000008 control abcd0008
>[  361.981194] [drm:wait_panel_status], Wait complete
>[  362.011179] [drm:intel_dp_link_down], 
>[  362.063209] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  362.138494] [drm:intel_update_fbc], no output, disabling
>[  362.138518] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  362.142963] [drm:ironlake_update_plane], Writing base 01632000 00000000 0 0 10240
>[  362.142971] [drm:intel_crtc_mode_set], [ENCODER:11:TMDS-11] set [MODE:0:2560x1600]
>[  362.142974] [drm:ironlake_set_pll_cpu_edp], eDP PLL enable for clock 270000
>[  362.143487] [drm:ironlake_edp_pll_on], 
>[  362.195292] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  362.247332] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  362.247340] [drm:intel_update_fbc], disabled per chip default
>[  362.247991] [drm:intel_dp_set_signal_levels], Using signal levels 09000000
>[  362.248579] [drm:intel_dp_start_link_train], clock recovery OK
>[  362.248584] [drm:intel_edp_panel_on], Turn eDP power on
>[  362.248591] [drm:wait_panel_power_cycle], Wait for panel power cycle
>[  362.505526] [drm:wait_panel_status], mask b800000f value 00000000 status 08000001 control abcd0008
>[  362.571548] [drm:wait_panel_status], Wait complete
>[  362.571561] [drm:wait_panel_on], Wait for panel power on
>[  362.571568] [drm:wait_panel_status], mask b000000f value 80000008 status 0000000a control abcd000b
>[  362.780698] [drm:wait_panel_status], Wait complete
>[  362.780709] [drm:edp_panel_vdd_off_sync], Turning eDP VDD off
>[  362.780721] [drm:edp_panel_vdd_off_sync], PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[  362.781658] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  362.781875] [drm:intel_edp_backlight_on], 
>[  362.991863] [drm:intel_panel_enable_backlight], pipe A
>[  362.991878] [drm:intel_panel_actually_set_backlight], set backlight PWM = 1785
>[  362.999846] [drm:intel_connector_check_state], [CONNECTOR:12:eDP-1]
>[  362.999873] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  362.999877] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  362.999881] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  362.999887] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  362.999891] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  362.999895] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  362.999900] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  362.999904] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  362.999909] [drm:check_crtc_state], [CRTC:3]
>[  362.999929] [drm:check_crtc_state], [CRTC:5]
>[  362.999932] [drm:check_crtc_state], [CRTC:7]
>[  362.999935] [drm:check_shared_dpll_state], PCH DPLL A
>[  362.999947] [drm:check_shared_dpll_state], PCH DPLL B
>[  368.003451] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[  368.003505] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=0
>[  368.003508] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [NOCRTC]
>[  368.003509] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  368.003511] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  368.003513] [drm:intel_modeset_stage_output_state], crtc disabled, full mode switch
>[  368.003529] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  368.003533] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
>[  368.003543] [drm:intel_edp_backlight_off], 
>[  368.003796] [drm:intel_edp_panel_off], Turn eDP power off
>[  368.254309] [drm:wait_panel_off], Wait for panel power off time
>[  368.254321] [drm:wait_panel_status], mask b0000000 value 00000000 status 80000008 control abcd0000
>[  368.331353] [drm:wait_panel_status], Wait complete
>[  368.355354] [drm:intel_dp_link_down], 
>[  368.407395] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  368.482658] [drm:intel_update_fbc], no output, disabling
>[  368.482678] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  368.482713] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  368.482718] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  368.482721] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  368.482726] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  368.482730] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  368.482734] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  368.482738] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  368.482743] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  368.482747] [drm:check_crtc_state], [CRTC:3]
>[  368.482750] [drm:check_crtc_state], [CRTC:5]
>[  368.482753] [drm:check_crtc_state], [CRTC:7]
>[  368.482756] [drm:check_shared_dpll_state], PCH DPLL A
>[  368.482766] [drm:check_shared_dpll_state], PCH DPLL B
>[  368.482835] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  368.482847] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  368.482855] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[  368.482859] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1]
>[  368.482861] [drm:intel_crt_detect], [CONNECTOR:9:VGA-1] force=1
>[  368.482868] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0xf40000, result 0
>[  368.482870] [drm:intel_crt_detect], CRT not detected via hotplug
>[  368.490391] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[  368.490394] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[  368.490397] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1] disconnected
>[  368.490403] [drm:drm_mode_getconnector], [CONNECTOR:9:?]
>[  368.490406] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1]
>[  368.490407] [drm:intel_crt_detect], [CONNECTOR:9:VGA-1] force=1
>[  368.490413] [drm:intel_ironlake_crt_detect_hotplug], ironlake hotplug adpa=0xf40000, result 0
>[  368.490414] [drm:intel_crt_detect], CRT not detected via hotplug
>[  368.498398] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus vga
>[  368.498401] [drm:intel_crt_detect_ddc], CRT not detected via DDC:0x50 [no valid EDID found]
>[  368.498403] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:9:VGA-1] disconnected
>[  368.498414] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  368.498421] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  368.498425] [drm:drm_mode_getconnector], [CONNECTOR:20:?]
>[  368.498428] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:HDMI-A-1]
>[  368.498430] [drm:intel_hdmi_detect], [CONNECTOR:20:HDMI-A-1]
>[  368.498670] [drm:gmbus_xfer], GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  368.498674] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  368.498677] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:HDMI-A-1] disconnected
>[  368.498682] [drm:drm_mode_getconnector], [CONNECTOR:20:?]
>[  368.498685] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:HDMI-A-1]
>[  368.498687] [drm:intel_hdmi_detect], [CONNECTOR:20:HDMI-A-1]
>[  368.498920] [drm:gmbus_xfer], GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[  368.498924] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpb
>[  368.498926] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:20:HDMI-A-1] disconnected
>[  368.498938] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  368.498946] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  368.498950] [drm:drm_mode_getconnector], [CONNECTOR:22:?]
>[  368.498953] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:22:DP-1]
>[  368.498955] [drm:intel_dp_detect], [CONNECTOR:22:DP-1]
>[  368.498961] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:22:DP-1] disconnected
>[  368.498963] [drm:drm_mode_getconnector], [CONNECTOR:22:?]
>[  368.498965] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:22:DP-1]
>[  368.498967] [drm:intel_dp_detect], [CONNECTOR:22:DP-1]
>[  368.498973] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:22:DP-1] disconnected
>[  368.498979] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  368.498986] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  368.498989] [drm:drm_mode_getconnector], [CONNECTOR:24:?]
>[  368.498991] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:24:HDMI-A-2]
>[  368.498993] [drm:intel_hdmi_detect], [CONNECTOR:24:HDMI-A-2]
>[  368.499192] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  368.499194] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  368.499196] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:24:HDMI-A-2] disconnected
>[  368.499199] [drm:drm_mode_getconnector], [CONNECTOR:24:?]
>[  368.499202] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:24:HDMI-A-2]
>[  368.499203] [drm:intel_hdmi_detect], [CONNECTOR:24:HDMI-A-2]
>[  368.499425] [drm:gmbus_xfer], GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1)
>[  368.499431] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpc
>[  368.499436] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:24:HDMI-A-2] disconnected
>[  368.499449] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  368.499461] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  368.499468] [drm:drm_mode_getconnector], [CONNECTOR:26:?]
>[  368.499474] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:26:HDMI-A-3]
>[  368.499478] [drm:intel_hdmi_detect], [CONNECTOR:26:HDMI-A-3]
>[  368.499658] [drm:gmbus_xfer], GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[  368.499662] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpd
>[  368.499665] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:26:HDMI-A-3] disconnected
>[  368.499672] [drm:drm_mode_getconnector], [CONNECTOR:26:?]
>[  368.499680] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:26:HDMI-A-3]
>[  368.499684] [drm:intel_hdmi_detect], [CONNECTOR:26:HDMI-A-3]
>[  368.499864] [drm:gmbus_xfer], GMBUS [i915 gmbus dpd] NAK for addr: 0050 r(1)
>[  368.499868] [drm:drm_do_probe_ddc_edid], drm: skipping non-existent adapter i915 gmbus dpd
>[  368.499871] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:26:HDMI-A-3] disconnected
>[  368.499883] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  368.499894] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  368.499900] [drm:drm_mode_getconnector], [CONNECTOR:28:?]
>[  368.499903] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:28:DP-2]
>[  368.499907] [drm:intel_dp_detect], [CONNECTOR:28:DP-2]
>[  368.500739] [drm:intel_dp_get_dpcd], DPCD: 11 0a 84 01 01 00 00 00 02 00 00 00 00 00 00
>[  368.502540] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  368.552020] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  368.553813] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  368.603181] [drm:i2c_algo_dp_aux_xfer], dp_aux_xfer return 2
>[  368.603366] [drm:drm_edid_to_eld], ELD: no CEA Extension found
>[  368.603410] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:28:DP-2] probed modes :
>[  368.603414] [drm:drm_mode_debug_printmodeline], Modeline 32:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x48 0x9
>[  368.603419] [drm:drm_mode_debug_printmodeline], Modeline 39:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  368.603423] [drm:drm_mode_debug_printmodeline], Modeline 34:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  368.603427] [drm:drm_mode_debug_printmodeline], Modeline 33:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  368.603431] [drm:drm_mode_debug_printmodeline], Modeline 40:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  368.603455] [drm:drm_mode_debug_printmodeline], Modeline 41:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  368.603464] [drm:drm_mode_debug_printmodeline], Modeline 42:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  368.603469] [drm:drm_mode_debug_printmodeline], Modeline 35:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  368.603475] [drm:drm_mode_debug_printmodeline], Modeline 36:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  368.603481] [drm:drm_mode_debug_printmodeline], Modeline 37:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  368.603488] [drm:drm_mode_debug_printmodeline], Modeline 38:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  368.603499] [drm:drm_mode_getconnector], [CONNECTOR:28:?]
>[  368.603522] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  368.603533] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  368.603644] [drm:drm_mode_addfb], [FB:45]
>[  368.631585] [drm:drm_mode_setcrtc], [CRTC:3]
>[  368.631610] [drm:drm_mode_setcrtc], [CONNECTOR:28:DP-2]
>[  368.631613] [drm:intel_crtc_set_config], [CRTC:3] [FB:45] #connectors=1 (x y) (0 0)
>[  368.631649] [drm:intel_set_config_compute_mode_changes], inactive crtc, full mode set
>[  368.631651] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  368.631654] [drm:drm_mode_debug_printmodeline], Modeline 46:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x48 0x9
>[  368.631656] [drm:drm_mode_debug_printmodeline], Modeline 46:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x48 0x9
>[  368.631658] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=0
>[  368.631660] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  368.631662] [drm:intel_modeset_stage_output_state], [CONNECTOR:28:DP-2] to [CRTC:3]
>[  368.631664] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  368.631666] [drm:intel_modeset_stage_output_state], crtc enabled, full mode switch
>[  368.631678] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  368.631689] [drm:connected_sink_compute_bpp], [CONNECTOR:28:DP-2] checking for sink bpp constrains
>[  368.631692] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 119000KHz
>[  368.631697] [drm:intel_dp_compute_config], DP link bw 06 lane count 4 clock 162000 bpp 24
>[  368.631698] [drm:intel_dp_compute_config], DP link bw required 285600 available 518400
>[  368.631701] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 2
>[  368.631703] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  368.631705] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  368.631707] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  368.631708] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  368.631710] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 2, gmch_m: 5545801, gmch_n: 8388608, link_m: 231075, link_n: 524288, tu: 64
>[  368.631713] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 4621501, gmch_n: 8388608, link_m: 192562, link_n: 262144, tu: 64
>[  368.631714] [drm:intel_dump_pipe_config], requested mode:
>[  368.631716] [drm:drm_mode_debug_printmodeline], Modeline 0:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x48 0x9
>[  368.631718] [drm:intel_dump_pipe_config], adjusted mode:
>[  368.631720] [drm:drm_mode_debug_printmodeline], Modeline 0:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x48 0x9
>[  368.631723] [drm:intel_dump_crtc_timings], crtc timings: 119000 1680 1728 1760 1840 1050 1053 1059 1080, type: 0x48 flags: 0x9
>[  368.631724] [drm:intel_dump_pipe_config], port clock: 162000
>[  368.631726] [drm:intel_dump_pipe_config], pipe src size: 1680x1050
>[  368.631728] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  368.631729] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  368.631731] [drm:intel_dump_pipe_config], ips: 0
>[  368.631732] [drm:intel_dump_pipe_config], double wide: 0
>[  368.631741] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  368.631760] [drm:intel_get_shared_dpll], CRTC:3 allocated PCH DPLL A
>[  368.631762] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  368.631763] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  368.633871] [drm:ironlake_update_plane], Writing base 025D2000 00000000 0 0 6720
>[  368.633878] [drm:intel_crtc_mode_set], [ENCODER:27:TMDS-27] set [MODE:0:1680x1050]
>[  368.686571] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  368.738610] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  368.738785] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR before link train 0x0
>[  368.738806] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[  368.738809] [drm:ivb_manual_fdi_link_train], FDI train 1 done, level 0.
>[  368.738822] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x200
>[  368.738826] [drm:ivb_manual_fdi_link_train], FDI train 2 done, level 0.
>[  368.738827] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  368.738832] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  368.738834] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  368.740263] [drm:intel_update_fbc], disabled per chip default
>[  368.741155] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  368.743512] [drm:intel_dp_start_link_train], clock recovery OK
>[  368.745072] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  368.746567] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  368.748066] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  368.766650] [drm:intel_connector_check_state], [CONNECTOR:28:DP-2]
>[  368.766665] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  368.766669] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  368.766673] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  368.766679] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  368.766683] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  368.766687] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  368.766692] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  368.766698] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  368.766703] [drm:check_crtc_state], [CRTC:3]
>[  368.766745] [drm:check_crtc_state], [CRTC:5]
>[  368.766747] [drm:check_crtc_state], [CRTC:7]
>[  368.766751] [drm:check_shared_dpll_state], PCH DPLL A
>[  368.766761] [drm:check_shared_dpll_state], PCH DPLL B
>[  373.770338] [drm:drm_mode_addfb], [FB:46]
>[  373.795336] [drm:drm_mode_setcrtc], [CRTC:3]
>[  373.795365] [drm:drm_mode_setcrtc], [CONNECTOR:28:DP-2]
>[  373.795368] [drm:intel_crtc_set_config], [CRTC:3] [FB:46] #connectors=1 (x y) (0 0)
>[  373.795406] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  373.795409] [drm:drm_mode_debug_printmodeline], Modeline 46:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x48 0x9
>[  373.795412] [drm:drm_mode_debug_printmodeline], Modeline 47:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  373.795414] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  373.795417] [drm:intel_modeset_stage_output_state], [CONNECTOR:28:DP-2] to [CRTC:3]
>[  373.795431] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  373.795443] [drm:connected_sink_compute_bpp], [CONNECTOR:28:DP-2] checking for sink bpp constrains
>[  373.795446] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 135000KHz
>[  373.795451] [drm:intel_dp_compute_config], DP link bw 06 lane count 4 clock 162000 bpp 24
>[  373.795453] [drm:intel_dp_compute_config], DP link bw required 324000 available 518400
>[  373.795456] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 2
>[  373.795458] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  373.795460] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  373.795461] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  373.795463] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  373.795465] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 2, gmch_m: 6291456, gmch_n: 8388608, link_m: 262144, link_n: 524288, tu: 64
>[  373.795467] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 5242880, gmch_n: 8388608, link_m: 218453, link_n: 262144, tu: 64
>[  373.795469] [drm:intel_dump_pipe_config], requested mode:
>[  373.795471] [drm:drm_mode_debug_printmodeline], Modeline 0:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  373.795473] [drm:intel_dump_pipe_config], adjusted mode:
>[  373.795475] [drm:drm_mode_debug_printmodeline], Modeline 0:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  373.795477] [drm:intel_dump_crtc_timings], crtc timings: 135000 1280 1296 1440 1688 1024 1025 1028 1066, type: 0x40 flags: 0x5
>[  373.795479] [drm:intel_dump_pipe_config], port clock: 162000
>[  373.795480] [drm:intel_dump_pipe_config], pipe src size: 1280x1024
>[  373.795482] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  373.795484] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  373.795485] [drm:intel_dump_pipe_config], ips: 0
>[  373.795487] [drm:intel_dump_pipe_config], double wide: 0
>[  373.795783] [drm:intel_dp_link_down], 
>[  373.861994] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  373.862004] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  373.862435] [drm:intel_update_fbc], no output, disabling
>[  373.862450] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  373.862469] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  373.862471] [drm:intel_get_shared_dpll], CRTC:3 allocated PCH DPLL A
>[  373.862473] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  373.862474] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  373.863992] [drm:ironlake_update_plane], Writing base 02C8D000 00000000 0 0 5120
>[  373.864001] [drm:intel_crtc_mode_set], [ENCODER:27:TMDS-27] set [MODE:0:1280x1024]
>[  373.916017] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  373.968048] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  373.968223] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR before link train 0x0
>[  373.968240] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[  373.968244] [drm:ivb_manual_fdi_link_train], FDI train 1 done, level 0.
>[  373.968256] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x200
>[  373.968259] [drm:ivb_manual_fdi_link_train], FDI train 2 done, level 0.
>[  373.968261] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  373.968266] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  373.968268] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  373.969692] [drm:intel_update_fbc], disabled per chip default
>[  373.970603] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  373.971973] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  373.973210] [drm:intel_dp_start_link_train], clock recovery OK
>[  373.974755] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  373.976266] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  373.991054] [drm:intel_connector_check_state], [CONNECTOR:28:DP-2]
>[  373.991064] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  373.991068] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  373.991069] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  373.991073] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  373.991076] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  373.991079] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  373.991083] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  373.991087] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  373.991091] [drm:check_crtc_state], [CRTC:3]
>[  373.991113] [drm:check_crtc_state], [CRTC:5]
>[  373.991115] [drm:check_crtc_state], [CRTC:7]
>[  373.991117] [drm:check_shared_dpll_state], PCH DPLL A
>[  373.991121] [drm:check_shared_dpll_state], PCH DPLL B
>[  378.994722] [drm:drm_mode_addfb], [FB:45]
>[  379.019704] [drm:drm_mode_setcrtc], [CRTC:3]
>[  379.019731] [drm:drm_mode_setcrtc], [CONNECTOR:28:DP-2]
>[  379.019734] [drm:intel_crtc_set_config], [CRTC:3] [FB:45] #connectors=1 (x y) (0 0)
>[  379.019772] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  379.019776] [drm:drm_mode_debug_printmodeline], Modeline 47:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  379.019779] [drm:drm_mode_debug_printmodeline], Modeline 47:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  379.019781] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  379.019783] [drm:intel_modeset_stage_output_state], [CONNECTOR:28:DP-2] to [CRTC:3]
>[  379.019798] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  379.019809] [drm:connected_sink_compute_bpp], [CONNECTOR:28:DP-2] checking for sink bpp constrains
>[  379.019812] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 108000KHz
>[  379.019817] [drm:intel_dp_compute_config], DP link bw 06 lane count 2 clock 162000 bpp 24
>[  379.019819] [drm:intel_dp_compute_config], DP link bw required 259200 available 259200
>[  379.019822] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 2
>[  379.019824] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  379.019826] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  379.019827] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  379.019829] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  379.019831] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 2, gmch_m: 5033164, gmch_n: 8388608, link_m: 209715, link_n: 524288, tu: 64
>[  379.019833] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 4194304, gmch_n: 4194304, link_m: 174762, link_n: 262144, tu: 64
>[  379.019834] [drm:intel_dump_pipe_config], requested mode:
>[  379.019837] [drm:drm_mode_debug_printmodeline], Modeline 0:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  379.019838] [drm:intel_dump_pipe_config], adjusted mode:
>[  379.019841] [drm:drm_mode_debug_printmodeline], Modeline 0:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  379.019844] [drm:intel_dump_crtc_timings], crtc timings: 108000 1280 1328 1440 1688 1024 1025 1028 1066, type: 0x40 flags: 0x5
>[  379.019845] [drm:intel_dump_pipe_config], port clock: 162000
>[  379.019847] [drm:intel_dump_pipe_config], pipe src size: 1280x1024
>[  379.019848] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  379.019850] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  379.019851] [drm:intel_dump_pipe_config], ips: 0
>[  379.019853] [drm:intel_dump_pipe_config], double wide: 0
>[  379.020150] [drm:intel_dp_link_down], 
>[  379.072431] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  379.072445] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  379.072876] [drm:intel_update_fbc], no output, disabling
>[  379.072891] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  379.072911] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  379.072913] [drm:intel_get_shared_dpll], CRTC:3 allocated PCH DPLL A
>[  379.072914] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  379.072916] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  379.074394] [drm:ironlake_update_plane], Writing base 0318D000 00000000 0 0 5120
>[  379.074403] [drm:intel_crtc_mode_set], [ENCODER:27:TMDS-27] set [MODE:0:1280x1024]
>[  379.126436] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  379.178470] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  379.178645] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR before link train 0x0
>[  379.178664] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[  379.178668] [drm:ivb_manual_fdi_link_train], FDI train 1 done, level 0.
>[  379.178680] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x200
>[  379.178684] [drm:ivb_manual_fdi_link_train], FDI train 2 done, level 0.
>[  379.178685] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  379.178690] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  379.178692] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  379.180121] [drm:intel_update_fbc], disabled per chip default
>[  379.181121] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  379.182515] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  379.183728] [drm:intel_dp_start_link_train], clock recovery OK
>[  379.185251] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  379.186680] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  379.204517] [drm:intel_connector_check_state], [CONNECTOR:28:DP-2]
>[  379.204531] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  379.204536] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  379.204539] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  379.204544] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  379.204549] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  379.204553] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  379.204558] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  379.204563] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  379.204567] [drm:check_crtc_state], [CRTC:3]
>[  379.204616] [drm:check_crtc_state], [CRTC:5]
>[  379.204619] [drm:check_crtc_state], [CRTC:7]
>[  379.204622] [drm:check_shared_dpll_state], PCH DPLL A
>[  379.204631] [drm:check_shared_dpll_state], PCH DPLL B
>[  384.208224] [drm:drm_mode_addfb], [FB:46]
>[  384.231059] [drm:drm_mode_setcrtc], [CRTC:3]
>[  384.231085] [drm:drm_mode_setcrtc], [CONNECTOR:28:DP-2]
>[  384.231089] [drm:intel_crtc_set_config], [CRTC:3] [FB:46] #connectors=1 (x y) (0 0)
>[  384.231128] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  384.231132] [drm:drm_mode_debug_printmodeline], Modeline 47:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[  384.231135] [drm:drm_mode_debug_printmodeline], Modeline 47:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  384.231137] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  384.231139] [drm:intel_modeset_stage_output_state], [CONNECTOR:28:DP-2] to [CRTC:3]
>[  384.231152] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  384.231164] [drm:connected_sink_compute_bpp], [CONNECTOR:28:DP-2] checking for sink bpp constrains
>[  384.231167] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 108000KHz
>[  384.231173] [drm:intel_dp_compute_config], DP link bw 06 lane count 2 clock 162000 bpp 24
>[  384.231174] [drm:intel_dp_compute_config], DP link bw required 259200 available 259200
>[  384.231177] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 2
>[  384.231179] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  384.231181] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  384.231183] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  384.231184] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  384.231186] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 2, gmch_m: 5033164, gmch_n: 8388608, link_m: 209715, link_n: 524288, tu: 64
>[  384.231189] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 4194304, gmch_n: 4194304, link_m: 174762, link_n: 262144, tu: 64
>[  384.231190] [drm:intel_dump_pipe_config], requested mode:
>[  384.231193] [drm:drm_mode_debug_printmodeline], Modeline 0:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  384.231194] [drm:intel_dump_pipe_config], adjusted mode:
>[  384.231197] [drm:drm_mode_debug_printmodeline], Modeline 0:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  384.231199] [drm:intel_dump_crtc_timings], crtc timings: 108000 1152 1216 1344 1600 864 865 868 900, type: 0x40 flags: 0x5
>[  384.231201] [drm:intel_dump_pipe_config], port clock: 162000
>[  384.231202] [drm:intel_dump_pipe_config], pipe src size: 1152x864
>[  384.231204] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  384.231206] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  384.231207] [drm:intel_dump_pipe_config], ips: 0
>[  384.231209] [drm:intel_dump_pipe_config], double wide: 0
>[  384.231533] [drm:intel_dp_link_down], 
>[  384.289864] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  384.289876] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  384.290307] [drm:intel_update_fbc], no output, disabling
>[  384.290322] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  384.290342] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  384.290344] [drm:intel_get_shared_dpll], CRTC:3 allocated PCH DPLL A
>[  384.290345] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  384.290347] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  384.291463] [drm:ironlake_update_plane], Writing base 0368D000 00000000 0 0 4608
>[  384.291472] [drm:intel_crtc_mode_set], [ENCODER:27:TMDS-27] set [MODE:0:1152x864]
>[  384.343875] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  384.395905] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  384.396080] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR before link train 0x0
>[  384.396100] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[  384.396104] [drm:ivb_manual_fdi_link_train], FDI train 1 done, level 0.
>[  384.396116] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x200
>[  384.396119] [drm:ivb_manual_fdi_link_train], FDI train 2 done, level 0.
>[  384.396120] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  384.396126] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  384.396128] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  384.397553] [drm:intel_update_fbc], disabled per chip default
>[  384.398464] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  384.399761] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  384.400913] [drm:intel_dp_start_link_train], clock recovery OK
>[  384.402432] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  384.403925] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  384.418953] [drm:intel_connector_check_state], [CONNECTOR:28:DP-2]
>[  384.418967] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  384.418971] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  384.418974] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  384.418980] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  384.418984] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  384.418989] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  384.418993] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  384.418999] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  384.419004] [drm:check_crtc_state], [CRTC:3]
>[  384.419045] [drm:check_crtc_state], [CRTC:5]
>[  384.419048] [drm:check_crtc_state], [CRTC:7]
>[  384.419051] [drm:check_shared_dpll_state], PCH DPLL A
>[  384.419061] [drm:check_shared_dpll_state], PCH DPLL B
>[  389.422681] [drm:drm_mode_addfb], [FB:45]
>[  389.444321] [drm:drm_mode_setcrtc], [CRTC:3]
>[  389.444355] [drm:drm_mode_setcrtc], [CONNECTOR:28:DP-2]
>[  389.444361] [drm:intel_crtc_set_config], [CRTC:3] [FB:45] #connectors=1 (x y) (0 0)
>[  389.444411] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  389.444416] [drm:drm_mode_debug_printmodeline], Modeline 47:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[  389.444420] [drm:drm_mode_debug_printmodeline], Modeline 47:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  389.444423] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  389.444427] [drm:intel_modeset_stage_output_state], [CONNECTOR:28:DP-2] to [CRTC:3]
>[  389.444445] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  389.444460] [drm:connected_sink_compute_bpp], [CONNECTOR:28:DP-2] checking for sink bpp constrains
>[  389.444465] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 78800KHz
>[  389.444472] [drm:intel_dp_compute_config], DP link bw 06 lane count 2 clock 162000 bpp 24
>[  389.444515] [drm:intel_dp_compute_config], DP link bw required 189120 available 259200
>[  389.444520] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  389.444523] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  389.444525] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  389.444527] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  389.444528] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  389.444531] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 3672346, gmch_n: 4194304, link_m: 153014, link_n: 524288, tu: 64
>[  389.444533] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 3060288, gmch_n: 4194304, link_m: 127512, link_n: 262144, tu: 64
>[  389.444534] [drm:intel_dump_pipe_config], requested mode:
>[  389.444537] [drm:drm_mode_debug_printmodeline], Modeline 0:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  389.444538] [drm:intel_dump_pipe_config], adjusted mode:
>[  389.444541] [drm:drm_mode_debug_printmodeline], Modeline 0:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  389.444543] [drm:intel_dump_crtc_timings], crtc timings: 78800 1024 1040 1136 1312 768 769 772 800, type: 0x40 flags: 0x5
>[  389.444545] [drm:intel_dump_pipe_config], port clock: 162000
>[  389.444547] [drm:intel_dump_pipe_config], pipe src size: 1024x768
>[  389.444548] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  389.444550] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  389.444552] [drm:intel_dump_pipe_config], ips: 0
>[  389.444553] [drm:intel_dump_pipe_config], double wide: 0
>[  389.444885] [drm:intel_dp_link_down], 
>[  389.489279] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  389.489291] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  389.489721] [drm:intel_update_fbc], no output, disabling
>[  389.489736] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  389.489756] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  389.489758] [drm:intel_get_shared_dpll], CRTC:3 allocated PCH DPLL A
>[  389.489759] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  389.489761] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  389.490713] [drm:ironlake_update_plane], Writing base 03A59000 00000000 0 0 4096
>[  389.490730] [drm:intel_crtc_mode_set], [ENCODER:27:TMDS-27] set [MODE:0:1024x768]
>[  389.543296] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  389.595334] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  389.595506] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR before link train 0x0
>[  389.595527] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[  389.595530] [drm:ivb_manual_fdi_link_train], FDI train 1 done, level 0.
>[  389.595542] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x200
>[  389.595546] [drm:ivb_manual_fdi_link_train], FDI train 2 done, level 0.
>[  389.595547] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  389.595552] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  389.595554] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  389.596986] [drm:intel_update_fbc], disabled per chip default
>[  389.597931] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  389.599228] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  389.600370] [drm:intel_dp_start_link_train], clock recovery OK
>[  389.601886] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  389.603382] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  389.617300] [drm:intel_connector_check_state], [CONNECTOR:28:DP-2]
>[  389.617311] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  389.617314] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  389.617316] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  389.617320] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  389.617323] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  389.617326] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  389.617329] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  389.617334] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  389.617337] [drm:check_crtc_state], [CRTC:3]
>[  389.617361] [drm:check_crtc_state], [CRTC:5]
>[  389.617363] [drm:check_crtc_state], [CRTC:7]
>[  389.617365] [drm:check_shared_dpll_state], PCH DPLL A
>[  389.617372] [drm:check_shared_dpll_state], PCH DPLL B
>[  394.620970] [drm:drm_mode_addfb], [FB:46]
>[  394.642771] [drm:drm_mode_setcrtc], [CRTC:3]
>[  394.642799] [drm:drm_mode_setcrtc], [CONNECTOR:28:DP-2]
>[  394.642803] [drm:intel_crtc_set_config], [CRTC:3] [FB:46] #connectors=1 (x y) (0 0)
>[  394.642842] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  394.642845] [drm:drm_mode_debug_printmodeline], Modeline 47:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[  394.642848] [drm:drm_mode_debug_printmodeline], Modeline 47:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  394.642850] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  394.642852] [drm:intel_modeset_stage_output_state], [CONNECTOR:28:DP-2] to [CRTC:3]
>[  394.642867] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  394.642879] [drm:connected_sink_compute_bpp], [CONNECTOR:28:DP-2] checking for sink bpp constrains
>[  394.642883] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 65000KHz
>[  394.642888] [drm:intel_dp_compute_config], DP link bw 06 lane count 2 clock 162000 bpp 24
>[  394.642889] [drm:intel_dp_compute_config], DP link bw required 156000 available 259200
>[  394.642892] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  394.642895] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  394.642897] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  394.642898] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  394.642899] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  394.642902] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 3029219, gmch_n: 4194304, link_m: 126217, link_n: 524288, tu: 64
>[  394.642904] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 2524349, gmch_n: 4194304, link_m: 105181, link_n: 262144, tu: 64
>[  394.642905] [drm:intel_dump_pipe_config], requested mode:
>[  394.642908] [drm:drm_mode_debug_printmodeline], Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  394.642909] [drm:intel_dump_pipe_config], adjusted mode:
>[  394.642912] [drm:drm_mode_debug_printmodeline], Modeline 0:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  394.642914] [drm:intel_dump_crtc_timings], crtc timings: 65000 1024 1048 1184 1344 768 771 777 806, type: 0x40 flags: 0xa
>[  394.642916] [drm:intel_dump_pipe_config], port clock: 162000
>[  394.642917] [drm:intel_dump_pipe_config], pipe src size: 1024x768
>[  394.642919] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  394.642921] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  394.642922] [drm:intel_dump_pipe_config], ips: 0
>[  394.642924] [drm:intel_dump_pipe_config], double wide: 0
>[  394.643220] [drm:intel_dp_link_down], 
>[  394.695703] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  394.695716] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  394.696146] [drm:intel_update_fbc], no output, disabling
>[  394.696161] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  394.696181] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  394.696183] [drm:intel_get_shared_dpll], CRTC:3 allocated PCH DPLL A
>[  394.696184] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  394.696186] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  394.697140] [drm:ironlake_update_plane], Writing base 03D59000 00000000 0 0 4096
>[  394.697159] [drm:intel_crtc_mode_set], [ENCODER:27:TMDS-27] set [MODE:0:1024x768]
>[  394.749726] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  394.801759] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  394.801933] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR before link train 0x0
>[  394.801951] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[  394.801955] [drm:ivb_manual_fdi_link_train], FDI train 1 done, level 0.
>[  394.801966] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x200
>[  394.801970] [drm:ivb_manual_fdi_link_train], FDI train 2 done, level 0.
>[  394.801971] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  394.801977] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  394.801979] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  394.803410] [drm:intel_update_fbc], disabled per chip default
>[  394.804410] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  394.805796] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  394.807025] [drm:intel_dp_start_link_train], clock recovery OK
>[  394.808567] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  394.810033] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  394.828725] [drm:intel_connector_check_state], [CONNECTOR:28:DP-2]
>[  394.828736] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  394.828740] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  394.828744] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  394.828750] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  394.828755] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  394.828759] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  394.828763] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  394.828769] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  394.828774] [drm:check_crtc_state], [CRTC:3]
>[  394.828804] [drm:check_crtc_state], [CRTC:5]
>[  394.828807] [drm:check_crtc_state], [CRTC:7]
>[  394.828810] [drm:check_shared_dpll_state], PCH DPLL A
>[  394.828818] [drm:check_shared_dpll_state], PCH DPLL B
>[  399.832395] [drm:drm_mode_addfb], [FB:45]
>[  399.852286] [drm:drm_mode_setcrtc], [CRTC:3]
>[  399.852312] [drm:drm_mode_setcrtc], [CONNECTOR:28:DP-2]
>[  399.852315] [drm:intel_crtc_set_config], [CRTC:3] [FB:45] #connectors=1 (x y) (0 0)
>[  399.852352] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  399.852356] [drm:drm_mode_debug_printmodeline], Modeline 47:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  399.852359] [drm:drm_mode_debug_printmodeline], Modeline 47:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  399.852360] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  399.852363] [drm:intel_modeset_stage_output_state], [CONNECTOR:28:DP-2] to [CRTC:3]
>[  399.852375] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  399.852387] [drm:connected_sink_compute_bpp], [CONNECTOR:28:DP-2] checking for sink bpp constrains
>[  399.852390] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 49500KHz
>[  399.852395] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  399.852396] [drm:intel_dp_compute_config], DP link bw required 118800 available 129600
>[  399.852399] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  399.852401] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  399.852403] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  399.852404] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  399.852406] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  399.852408] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 2306867, gmch_n: 4194304, link_m: 96119, link_n: 524288, tu: 64
>[  399.852410] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 1922389, gmch_n: 2097152, link_m: 80099, link_n: 262144, tu: 64
>[  399.852412] [drm:intel_dump_pipe_config], requested mode:
>[  399.852414] [drm:drm_mode_debug_printmodeline], Modeline 0:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  399.852415] [drm:intel_dump_pipe_config], adjusted mode:
>[  399.852418] [drm:drm_mode_debug_printmodeline], Modeline 0:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  399.852420] [drm:intel_dump_crtc_timings], crtc timings: 49500 800 816 896 1056 600 601 604 625, type: 0x40 flags: 0x5
>[  399.852422] [drm:intel_dump_pipe_config], port clock: 162000
>[  399.852423] [drm:intel_dump_pipe_config], pipe src size: 800x600
>[  399.852425] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  399.852427] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  399.852428] [drm:intel_dump_pipe_config], ips: 0
>[  399.852430] [drm:intel_dump_pipe_config], double wide: 0
>[  399.852731] [drm:intel_dp_link_down], 
>[  399.915071] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  399.915078] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  399.915500] [drm:intel_update_fbc], no output, disabling
>[  399.915510] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  399.915528] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  399.915530] [drm:intel_get_shared_dpll], CRTC:3 allocated PCH DPLL A
>[  399.915532] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  399.915533] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  399.916282] [drm:ironlake_update_plane], Writing base 04059000 00000000 0 0 3200
>[  399.916292] [drm:intel_crtc_mode_set], [ENCODER:27:TMDS-27] set [MODE:0:800x600]
>[  399.968149] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  400.020190] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  400.020363] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR before link train 0x0
>[  400.020383] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[  400.020387] [drm:ivb_manual_fdi_link_train], FDI train 1 done, level 0.
>[  400.020400] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x200
>[  400.020403] [drm:ivb_manual_fdi_link_train], FDI train 2 done, level 0.
>[  400.020405] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  400.020411] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  400.020412] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  400.021845] [drm:intel_update_fbc], disabled per chip default
>[  400.022837] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  400.024264] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  400.025459] [drm:intel_dp_start_link_train], clock recovery OK
>[  400.026980] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  400.028416] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  400.043224] [drm:intel_connector_check_state], [CONNECTOR:28:DP-2]
>[  400.043238] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  400.043242] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  400.043245] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  400.043251] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  400.043255] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  400.043259] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  400.043263] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  400.043269] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  400.043273] [drm:check_crtc_state], [CRTC:3]
>[  400.043310] [drm:check_crtc_state], [CRTC:5]
>[  400.043313] [drm:check_crtc_state], [CRTC:7]
>[  400.043316] [drm:check_shared_dpll_state], PCH DPLL A
>[  400.043327] [drm:check_shared_dpll_state], PCH DPLL B
>[  405.046941] [drm:drm_mode_addfb], [FB:46]
>[  405.066883] [drm:drm_mode_setcrtc], [CRTC:3]
>[  405.066909] [drm:drm_mode_setcrtc], [CONNECTOR:28:DP-2]
>[  405.066912] [drm:intel_crtc_set_config], [CRTC:3] [FB:46] #connectors=1 (x y) (0 0)
>[  405.066951] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  405.066955] [drm:drm_mode_debug_printmodeline], Modeline 47:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[  405.066957] [drm:drm_mode_debug_printmodeline], Modeline 47:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  405.066959] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  405.066962] [drm:intel_modeset_stage_output_state], [CONNECTOR:28:DP-2] to [CRTC:3]
>[  405.066974] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  405.066986] [drm:connected_sink_compute_bpp], [CONNECTOR:28:DP-2] checking for sink bpp constrains
>[  405.066989] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 40000KHz
>[  405.066994] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  405.066995] [drm:intel_dp_compute_config], DP link bw required 96000 available 129600
>[  405.066998] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  405.067000] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  405.067002] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  405.067003] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  405.067005] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  405.067007] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1864135, gmch_n: 4194304, link_m: 77672, link_n: 524288, tu: 64
>[  405.067009] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 1553445, gmch_n: 2097152, link_m: 64726, link_n: 262144, tu: 64
>[  405.067011] [drm:intel_dump_pipe_config], requested mode:
>[  405.067013] [drm:drm_mode_debug_printmodeline], Modeline 0:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  405.067015] [drm:intel_dump_pipe_config], adjusted mode:
>[  405.067017] [drm:drm_mode_debug_printmodeline], Modeline 0:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  405.067020] [drm:intel_dump_crtc_timings], crtc timings: 40000 800 840 968 1056 600 601 605 628, type: 0x40 flags: 0x5
>[  405.067021] [drm:intel_dump_pipe_config], port clock: 162000
>[  405.067023] [drm:intel_dump_pipe_config], pipe src size: 800x600
>[  405.067025] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  405.067026] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  405.067028] [drm:intel_dump_pipe_config], ips: 0
>[  405.067029] [drm:intel_dump_pipe_config], double wide: 0
>[  405.067313] [drm:intel_dp_link_down], 
>[  405.113560] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  405.113573] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  405.114005] [drm:intel_update_fbc], no output, disabling
>[  405.114019] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  405.114039] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  405.114041] [drm:intel_get_shared_dpll], CRTC:3 allocated PCH DPLL A
>[  405.114042] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  405.114044] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  405.114647] [drm:ironlake_update_plane], Writing base 0422E000 00000000 0 0 3200
>[  405.114665] [drm:intel_crtc_mode_set], [ENCODER:27:TMDS-27] set [MODE:0:800x600]
>[  405.166579] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  405.218612] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  405.218787] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR before link train 0x0
>[  405.218807] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[  405.218811] [drm:ivb_manual_fdi_link_train], FDI train 1 done, level 0.
>[  405.218824] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x200
>[  405.218827] [drm:ivb_manual_fdi_link_train], FDI train 2 done, level 0.
>[  405.218829] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  405.218834] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  405.218836] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  405.220268] [drm:intel_update_fbc], disabled per chip default
>[  405.221286] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  405.222672] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  405.223889] [drm:intel_dp_start_link_train], clock recovery OK
>[  405.225382] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  405.226829] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  405.243672] [drm:intel_connector_check_state], [CONNECTOR:28:DP-2]
>[  405.243686] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  405.243691] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  405.243694] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  405.243697] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  405.243702] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  405.243706] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  405.243710] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  405.243716] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  405.243721] [drm:check_crtc_state], [CRTC:3]
>[  405.243767] [drm:check_crtc_state], [CRTC:5]
>[  405.243770] [drm:check_crtc_state], [CRTC:7]
>[  405.243773] [drm:check_shared_dpll_state], PCH DPLL A
>[  405.243783] [drm:check_shared_dpll_state], PCH DPLL B
>[  410.247386] [drm:drm_mode_addfb], [FB:45]
>[  410.266394] [drm:drm_mode_setcrtc], [CRTC:3]
>[  410.266422] [drm:drm_mode_setcrtc], [CONNECTOR:28:DP-2]
>[  410.266425] [drm:intel_crtc_set_config], [CRTC:3] [FB:45] #connectors=1 (x y) (0 0)
>[  410.266461] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  410.266465] [drm:drm_mode_debug_printmodeline], Modeline 47:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  410.266467] [drm:drm_mode_debug_printmodeline], Modeline 47:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  410.266469] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  410.266472] [drm:intel_modeset_stage_output_state], [CONNECTOR:28:DP-2] to [CRTC:3]
>[  410.266484] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  410.266495] [drm:connected_sink_compute_bpp], [CONNECTOR:28:DP-2] checking for sink bpp constrains
>[  410.266498] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 31500KHz
>[  410.266503] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  410.266505] [drm:intel_dp_compute_config], DP link bw required 75600 available 129600
>[  410.266507] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  410.266509] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  410.266511] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  410.266513] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  410.266514] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  410.266517] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1468006, gmch_n: 4194304, link_m: 61166, link_n: 524288, tu: 64
>[  410.266519] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 1223338, gmch_n: 2097152, link_m: 50972, link_n: 262144, tu: 64
>[  410.266520] [drm:intel_dump_pipe_config], requested mode:
>[  410.266523] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  410.266524] [drm:intel_dump_pipe_config], adjusted mode:
>[  410.266526] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  410.266529] [drm:intel_dump_crtc_timings], crtc timings: 31500 640 656 720 840 480 481 484 500, type: 0x40 flags: 0xa
>[  410.266530] [drm:intel_dump_pipe_config], port clock: 162000
>[  410.266532] [drm:intel_dump_pipe_config], pipe src size: 640x480
>[  410.266533] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  410.266535] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  410.266537] [drm:intel_dump_pipe_config], ips: 0
>[  410.266538] [drm:intel_dump_pipe_config], double wide: 0
>[  410.266840] [drm:intel_dp_link_down], 
>[  410.321975] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  410.321989] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  410.322420] [drm:intel_update_fbc], no output, disabling
>[  410.322435] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  410.322455] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  410.322457] [drm:intel_get_shared_dpll], CRTC:3 allocated PCH DPLL A
>[  410.322458] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  410.322460] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  410.322832] [drm:ironlake_update_plane], Writing base 04403000 00000000 0 0 2560
>[  410.322841] [drm:intel_crtc_mode_set], [ENCODER:27:TMDS-27] set [MODE:0:640x480]
>[  410.375000] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  410.427027] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  410.427198] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR before link train 0x0
>[  410.427218] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[  410.427222] [drm:ivb_manual_fdi_link_train], FDI train 1 done, level 0.
>[  410.427234] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x200
>[  410.427238] [drm:ivb_manual_fdi_link_train], FDI train 2 done, level 0.
>[  410.427239] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  410.427244] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  410.427246] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  410.428671] [drm:intel_update_fbc], disabled per chip default
>[  410.429592] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  410.430890] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  410.432002] [drm:intel_dp_start_link_train], clock recovery OK
>[  410.433497] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  410.434965] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  410.449076] [drm:intel_connector_check_state], [CONNECTOR:28:DP-2]
>[  410.449091] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  410.449095] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  410.449098] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  410.449104] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  410.449109] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  410.449112] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  410.449117] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  410.449124] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  410.449128] [drm:check_crtc_state], [CRTC:3]
>[  410.449170] [drm:check_crtc_state], [CRTC:5]
>[  410.449173] [drm:check_crtc_state], [CRTC:7]
>[  410.449176] [drm:check_shared_dpll_state], PCH DPLL A
>[  410.449186] [drm:check_shared_dpll_state], PCH DPLL B
>[  415.452798] [drm:drm_mode_addfb], [FB:46]
>[  415.471959] [drm:drm_mode_setcrtc], [CRTC:3]
>[  415.471991] [drm:drm_mode_setcrtc], [CONNECTOR:28:DP-2]
>[  415.471996] [drm:intel_crtc_set_config], [CRTC:3] [FB:46] #connectors=1 (x y) (0 0)
>[  415.472042] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  415.472047] [drm:drm_mode_debug_printmodeline], Modeline 47:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[  415.472051] [drm:drm_mode_debug_printmodeline], Modeline 47:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  415.472054] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  415.472058] [drm:intel_modeset_stage_output_state], [CONNECTOR:28:DP-2] to [CRTC:3]
>[  415.472074] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  415.472089] [drm:connected_sink_compute_bpp], [CONNECTOR:28:DP-2] checking for sink bpp constrains
>[  415.472093] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 25200KHz
>[  415.472097] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  415.472100] [drm:intel_dp_compute_config], DP link bw required 60480 available 129600
>[  415.472136] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  415.472140] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  415.472143] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  415.472144] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  415.472145] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  415.472148] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1174405, gmch_n: 4194304, link_m: 48933, link_n: 524288, tu: 64
>[  415.472150] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 978670, gmch_n: 2097152, link_m: 40777, link_n: 262144, tu: 64
>[  415.472151] [drm:intel_dump_pipe_config], requested mode:
>[  415.472154] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  415.472155] [drm:intel_dump_pipe_config], adjusted mode:
>[  415.472158] [drm:drm_mode_debug_printmodeline], Modeline 0:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  415.472160] [drm:intel_dump_crtc_timings], crtc timings: 25200 640 656 752 800 480 490 492 525, type: 0x40 flags: 0xa
>[  415.472162] [drm:intel_dump_pipe_config], port clock: 162000
>[  415.472163] [drm:intel_dump_pipe_config], pipe src size: 640x480
>[  415.472165] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  415.472167] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  415.472168] [drm:intel_dump_pipe_config], ips: 0
>[  415.472170] [drm:intel_dump_pipe_config], double wide: 0
>[  415.473311] [drm:intel_dp_link_down], 
>[  415.518406] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  415.518420] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  415.518849] [drm:intel_update_fbc], no output, disabling
>[  415.518864] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  415.518883] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  415.518885] [drm:intel_get_shared_dpll], CRTC:3 allocated PCH DPLL A
>[  415.518887] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  415.518888] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  415.519258] [drm:ironlake_update_plane], Writing base 0452F000 00000000 0 0 2560
>[  415.519266] [drm:intel_crtc_mode_set], [ENCODER:27:TMDS-27] set [MODE:0:640x480]
>[  415.571419] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  415.623462] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  415.623637] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR before link train 0x0
>[  415.623657] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[  415.623661] [drm:ivb_manual_fdi_link_train], FDI train 1 done, level 0.
>[  415.623674] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x200
>[  415.623677] [drm:ivb_manual_fdi_link_train], FDI train 2 done, level 0.
>[  415.623678] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  415.623684] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  415.623685] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  415.625117] [drm:intel_update_fbc], disabled per chip default
>[  415.626101] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  415.627403] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  415.628534] [drm:intel_dp_start_link_train], clock recovery OK
>[  415.630025] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  415.631486] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  415.649509] [drm:intel_connector_check_state], [CONNECTOR:28:DP-2]
>[  415.649523] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  415.649528] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  415.649531] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  415.649535] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  415.649540] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  415.649544] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  415.649548] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  415.649554] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  415.649558] [drm:check_crtc_state], [CRTC:3]
>[  415.649607] [drm:check_crtc_state], [CRTC:5]
>[  415.649609] [drm:check_crtc_state], [CRTC:7]
>[  415.649612] [drm:check_shared_dpll_state], PCH DPLL A
>[  415.649622] [drm:check_shared_dpll_state], PCH DPLL B
>[  420.653212] [drm:drm_mode_addfb], [FB:45]
>[  420.671858] [drm:drm_mode_setcrtc], [CRTC:3]
>[  420.671890] [drm:drm_mode_setcrtc], [CONNECTOR:28:DP-2]
>[  420.671894] [drm:intel_crtc_set_config], [CRTC:3] [FB:45] #connectors=1 (x y) (0 0)
>[  420.671943] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
>[  420.671948] [drm:drm_mode_debug_printmodeline], Modeline 47:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[  420.671952] [drm:drm_mode_debug_printmodeline], Modeline 47:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  420.671955] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=1
>[  420.671959] [drm:intel_modeset_stage_output_state], [CONNECTOR:28:DP-2] to [CRTC:3]
>[  420.671975] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[  420.671990] [drm:connected_sink_compute_bpp], [CONNECTOR:28:DP-2] checking for sink bpp constrains
>[  420.671995] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 28320KHz
>[  420.672002] [drm:intel_dp_compute_config], DP link bw 06 lane count 1 clock 162000 bpp 24
>[  420.672004] [drm:intel_dp_compute_config], DP link bw required 67968 available 129600
>[  420.672008] [drm:ironlake_check_fdi_lanes], checking fdi config on pipe A, lanes 1
>[  420.672011] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  420.672014] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
>[  420.672055] [drm:intel_dump_pipe_config], cpu_transcoder: A
>[  420.672058] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  420.672061] [drm:intel_dump_pipe_config], fdi/pch: 1, lanes: 1, gmch_m: 1319807, gmch_n: 4194304, link_m: 54991, link_n: 524288, tu: 64
>[  420.672066] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 1099839, gmch_n: 2097152, link_m: 45826, link_n: 262144, tu: 64
>[  420.672067] [drm:intel_dump_pipe_config], requested mode:
>[  420.672070] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  420.672071] [drm:intel_dump_pipe_config], adjusted mode:
>[  420.672074] [drm:drm_mode_debug_printmodeline], Modeline 0:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[  420.672076] [drm:intel_dump_crtc_timings], crtc timings: 28320 720 738 846 900 400 412 414 449, type: 0x40 flags: 0x6
>[  420.672077] [drm:intel_dump_pipe_config], port clock: 162000
>[  420.672079] [drm:intel_dump_pipe_config], pipe src size: 720x400
>[  420.672081] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  420.672083] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  420.672084] [drm:intel_dump_pipe_config], ips: 0
>[  420.672085] [drm:intel_dump_pipe_config], double wide: 0
>[  420.672408] [drm:intel_dp_link_down], 
>[  420.718439] [drm:ivb_err_int_handler] *ERROR* Pipe A FIFO underrun
>[  420.736838] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  420.736850] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  420.737281] [drm:intel_update_fbc], no output, disabling
>[  420.737297] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  420.737316] [drm:intel_get_shared_dpll], CRTC:3 dropping existing PCH DPLL A
>[  420.737319] [drm:intel_get_shared_dpll], CRTC:3 allocated PCH DPLL A
>[  420.737321] [drm:intel_get_shared_dpll], using PCH DPLL A for pipe A
>[  420.737322] [drm:intel_get_shared_dpll], setting up PCH DPLL A
>[  420.737658] [drm:ironlake_update_plane], Writing base 0465B000 00000000 0 0 2880
>[  420.737666] [drm:intel_crtc_mode_set], [ENCODER:27:TMDS-27] set [MODE:0:720x400]
>[  420.789855] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  420.841893] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  420.842066] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR before link train 0x0
>[  420.842084] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x100
>[  420.842088] [drm:ivb_manual_fdi_link_train], FDI train 1 done, level 0.
>[  420.842100] [drm:ivb_manual_fdi_link_train], FDI_RX_IIR 0x200
>[  420.842104] [drm:ivb_manual_fdi_link_train], FDI train 2 done, level 0.
>[  420.842105] [drm:ivb_manual_fdi_link_train], FDI train done.
>[  420.842110] [drm:ironlake_enable_shared_dpll], enable PCH DPLL A (active 0, on? 0)for crtc 3
>[  420.842112] [drm:ironlake_enable_shared_dpll], enabling PCH DPLL A
>[  420.843544] [drm:intel_update_fbc], disabled per chip default
>[  420.844601] [drm:intel_dp_set_signal_levels], Using signal levels 00000000
>[  420.845974] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  420.847159] [drm:intel_dp_start_link_train], clock recovery OK
>[  420.848644] [drm:intel_dp_set_signal_levels], Using signal levels 04000000
>[  420.850042] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  420.864926] [drm:intel_connector_check_state], [CONNECTOR:28:DP-2]
>[  420.864939] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  420.864943] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  420.864947] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  420.864952] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  420.864956] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  420.864960] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  420.864964] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  420.864970] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  420.864974] [drm:check_crtc_state], [CRTC:3]
>[  420.865012] [drm:check_crtc_state], [CRTC:5]
>[  420.865015] [drm:check_crtc_state], [CRTC:7]
>[  420.865018] [drm:check_shared_dpll_state], PCH DPLL A
>[  420.865028] [drm:check_shared_dpll_state], PCH DPLL B
>[  425.868536] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[  425.868591] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=1, fb_changed=0
>[  425.868594] [drm:intel_modeset_stage_output_state], [CONNECTOR:28:DP-2] to [NOCRTC]
>[  425.868596] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  425.868598] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  425.868600] [drm:intel_modeset_stage_output_state], crtc disabled, full mode switch
>[  425.868615] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 1
>[  425.868980] [drm:intel_dp_link_down], 
>[  425.919178] [drm:intel_disable_shared_dpll], disable PCH DPLL A (active 1, on? 1) for crtc 3
>[  425.919189] [drm:intel_disable_shared_dpll], disabling PCH DPLL A
>[  425.919612] [drm:intel_update_fbc], no output, disabling
>[  425.919625] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  425.919646] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  425.919650] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  425.919652] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  425.919655] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  425.919658] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  425.919661] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  425.919664] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  425.919668] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  425.919671] [drm:check_crtc_state], [CRTC:3]
>[  425.919673] [drm:check_crtc_state], [CRTC:5]
>[  425.919675] [drm:check_crtc_state], [CRTC:7]
>[  425.919677] [drm:check_shared_dpll_state], PCH DPLL A
>[  425.919685] [drm:check_shared_dpll_state], PCH DPLL B
>[  425.919739] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  425.919748] [drm:drm_mode_getresources], CRTC[3] CONNECTORS[8] ENCODERS[8]
>[  425.919753] [drm:drm_mode_getconnector], [CONNECTOR:30:?]
>[  425.919757] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:30:DP-3]
>[  425.919759] [drm:intel_dp_detect], [CONNECTOR:30:DP-3]
>[  425.919765] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:30:DP-3] disconnected
>[  425.919768] [drm:drm_mode_getconnector], [CONNECTOR:30:?]
>[  425.919770] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:30:DP-3]
>[  425.919772] [drm:intel_dp_detect], [CONNECTOR:30:DP-3]
>[  425.919778] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:30:DP-3] disconnected
>[  425.919909] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[  425.919943] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  425.919950] [drm:intel_crtc_set_config], [CRTC:5] [NOFB]
>[  425.919986] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  425.919992] [drm:intel_crtc_set_config], [CRTC:7] [FB:44] #connectors=1 (x y) (0 0)
>[  425.920018] [drm:intel_set_config_compute_mode_changes], inactive crtc, full mode set
>[  425.920020] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=1, fb_changed=0
>[  425.920021] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
>[  425.920022] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[  425.920023] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
>[  425.920024] [drm:intel_modeset_stage_output_state], crtc enabled, full mode switch
>[  425.920035] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[  425.920045] [drm:connected_sink_compute_bpp], [CONNECTOR:12:eDP-1] checking for sink bpp constrains
>[  425.920047] [drm:intel_dp_compute_config], DP link computation with max lane count 4 max bw 0a pixel clock 268500KHz
>[  425.920051] [drm:intel_dp_compute_config], DP link bw 0a lane count 4 clock 270000 bpp 24
>[  425.920052] [drm:intel_dp_compute_config], DP link bw required 644400 available 864000
>[  425.920054] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
>[  425.920055] [drm:intel_dump_pipe_config], [CRTC:7][modeset] config for pipe C
>[  425.920056] [drm:intel_dump_pipe_config], cpu_transcoder: C
>[  425.920057] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
>[  425.920058] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  425.920060] [drm:intel_dump_pipe_config], dp: 1, gmch_m: 6256503, gmch_n: 8388608, link_m: 521375, link_n: 524288, tu: 64
>[  425.920061] [drm:intel_dump_pipe_config], requested mode:
>[  425.920063] [drm:drm_mode_debug_printmodeline], Modeline 0:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x48 0x9
>[  425.920064] [drm:intel_dump_pipe_config], adjusted mode:
>[  425.920066] [drm:drm_mode_debug_printmodeline], Modeline 0:"2560x1600" 60 268500 2560 2608 2640 2720 1600 1603 1609 1646 0x48 0x9
>[  425.920067] [drm:intel_dump_crtc_timings], crtc timings: 268500 2560 2608 2640 2720 1600 1603 1609 1646, type: 0x48 flags: 0x9
>[  425.920068] [drm:intel_dump_pipe_config], port clock: 270000
>[  425.920069] [drm:intel_dump_pipe_config], pipe src size: 2560x1600
>[  425.920070] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  425.920071] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  425.920072] [drm:intel_dump_pipe_config], ips: 0
>[  425.920072] [drm:intel_dump_pipe_config], double wide: 0
>[  425.920080] [drm:ivb_modeset_global_resources], disabling fdi C rx
>[  425.920124] [drm:ironlake_update_plane], Writing base 00274000 00000000 0 0 10240
>[  425.920128] [drm:intel_crtc_mode_set], [ENCODER:11:TMDS-11] set [MODE:0:2560x1600]
>[  425.920130] [drm:ironlake_set_pll_cpu_edp], eDP PLL enable for clock 270000
>[  425.920641] [drm:ironlake_edp_pll_on], 
>[  425.972267] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  426.024299] [drm:g4x_wait_for_vblank], vblank wait timed out
>[  426.024304] [drm:intel_update_fbc], disabled per chip default
>[  426.024315] [drm:edp_panel_vdd_on], Turning eDP VDD on
>[  426.024319] [drm:wait_panel_power_cycle], Wait for panel power cycle
>[  426.024325] [drm:wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0000
>[  426.024329] [drm:wait_panel_status], Wait complete
>[  426.024339] [drm:edp_panel_vdd_on], PP_STATUS: 0x00000000 PP_CONTROL: 0xabcd0008
>[  426.024342] [drm:edp_panel_vdd_on], eDP was not running
>[  426.226092] [drm:intel_dp_set_signal_levels], Using signal levels 09000000
>[  426.226669] [drm:intel_dp_start_link_train], clock recovery OK
>[  426.226671] [drm:intel_edp_panel_on], Turn eDP power on
>[  426.226678] [drm:wait_panel_power_cycle], Wait for panel power cycle
>[  426.226687] [drm:wait_panel_status], mask b800000f value 00000000 status 00000000 control abcd0008
>[  426.226691] [drm:wait_panel_status], Wait complete
>[  426.226700] [drm:wait_panel_on], Wait for panel power on
>[  426.226706] [drm:wait_panel_status], mask b000000f value 80000008 status 0000000a control abcd000b
>[  426.435500] [drm:wait_panel_status], Wait complete
>[  426.435503] [drm:edp_panel_vdd_off_sync], Turning eDP VDD off
>[  426.435512] [drm:edp_panel_vdd_off_sync], PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0003
>[  426.436336] [drm:intel_dp_complete_link_train], Channel EQ done. DP Training successful
>[  426.436502] [drm:intel_edp_backlight_on], 
>[  426.646645] [drm:intel_panel_enable_backlight], pipe C
>[  426.646664] [drm:intel_panel_actually_set_backlight], set backlight PWM = 1785
>[  426.654650] [drm:intel_connector_check_state], [CONNECTOR:12:eDP-1]
>[  426.654668] [drm:check_encoder_state], [ENCODER:10:DAC-10]
>[  426.654672] [drm:check_encoder_state], [ENCODER:11:TMDS-11]
>[  426.654674] [drm:check_encoder_state], [ENCODER:19:TMDS-19]
>[  426.654677] [drm:check_encoder_state], [ENCODER:21:TMDS-21]
>[  426.654680] [drm:check_encoder_state], [ENCODER:23:TMDS-23]
>[  426.654683] [drm:check_encoder_state], [ENCODER:25:TMDS-25]
>[  426.654687] [drm:check_encoder_state], [ENCODER:27:TMDS-27]
>[  426.654690] [drm:check_encoder_state], [ENCODER:29:TMDS-29]
>[  426.654694] [drm:check_crtc_state], [CRTC:3]
>[  426.654696] [drm:check_crtc_state], [CRTC:5]
>[  426.654698] [drm:check_crtc_state], [CRTC:7]
>[  426.654713] [drm:check_shared_dpll_state], PCH DPLL A
>[  426.654721] [drm:check_shared_dpll_state], PCH DPLL B
>[  426.681847] [drm:intel_crtc_cursor_set], cursor off
>[  426.681852] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
>[  426.681890] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:3], mode_changed=0, fb_changed=0
>[  426.681893] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[  426.681902] [drm:intel_crtc_cursor_set], cursor off
>[  426.681904] [drm:intel_crtc_set_config], [CRTC:5] [NOFB]
>[  426.681931] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  426.681933] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[  426.681940] [drm:intel_crtc_cursor_set], cursor off
>[  426.681943] [drm:intel_crtc_set_config], [CRTC:7] [FB:44] #connectors=1 (x y) (0 0)
>[  426.681971] [drm:intel_set_config_compute_mode_changes], computed changes for [CRTC:7], mode_changed=0, fb_changed=0
>[  426.681973] [drm:intel_modeset_stage_output_state], [CONNECTOR:12:eDP-1] to [CRTC:7]
>[  685.925479] kmemleak: 2 new suspected memory leaks (see /sys/kernel/debug/kmemleak)

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Attachments on bug 75077: 94184 | 94326

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