Attachment 94289 Details for Bug 73511 – [PATCH v2 rebased 2/3] radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY

[patch] [PATCH v2 rebased 2/3] radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY

0002-radeon-compute-Implement-PIPE_COMPUTE_CAP_MAX_CLOCK_.patch (text/plain), 2.54 KB, created by Igor Gnatenko on 2014-02-18 14:48:38 UTC

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Creator: Igor Gnatenko

Created: 2014-02-18 14:48:38 UTC

Size: 2.54 KB

patch

obsolete

>From 11844504b399e55330efb49f7353b46d68d60d93 Mon Sep 17 00:00:00 2001
>From: Tom Stellard <thomas.stellard@amd.com>
>Date: Tue, 14 Jan 2014 20:44:40 +0000
>Subject: [PATCH v2 rebased 2/3] radeon/compute: Implement
> PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
>
>v2: in define RADEON_INFO_MAX_SCLK use 0x1a instead of 0x19 (upstream changes)
>
>Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
>---
> src/gallium/drivers/radeon/r600_pipe_common.c     | 6 ++++++
> src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 7 +++++++
> src/gallium/winsys/radeon/drm/radeon_winsys.h     | 1 +
> 3 files changed, 14 insertions(+)
>
>diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
>index dbca157..893eac3 100644
>--- a/src/gallium/drivers/radeon/r600_pipe_common.c
>+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
>@@ -400,6 +400,12 @@ static int r600_get_compute_param(struct pipe_screen *screen,
> 		}
> 		return sizeof(uint64_t);
> 
>+	case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
>+		if (ret) {
>+			return rscreen->info.max_sclk;
>+		}
>+		return sizeof(uint32_t);
>+
> 	default:
> 		fprintf(stderr, "unknown PIPE_COMPUTE_CAP %d\n", param);
> 		return 0;
>diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
>index 44cd0d1..12fbdfc 100644
>--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
>+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
>@@ -101,6 +101,10 @@
> #define RADEON_INFO_VCE_FW_VERSION 0x1b
> #endif
> 
>+#ifndef RADEON_INFO_MAX_SCLK
>+#define RADEON_INFO_MAX_SCLK 0x1a
>+#endif
>+
> #ifndef RADEON_CS_RING_UVD
> #define RADEON_CS_RING_UVD	3
> #endif
>@@ -379,6 +383,9 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
>     ws->info.gart_size = gem_info.gart_size;
>     ws->info.vram_size = gem_info.vram_size;
> 
>+    radeon_get_drm_value(ws->fd, RADEON_INFO_MAX_SCLK, NULL,
>+                         &ws->info.max_sclk);
>+
>     ws->num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
> 
>     /* Generation-specific queries. */
>diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
>index 37affc3..b4c19ce 100644
>--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
>+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
>@@ -175,6 +175,7 @@ struct radeon_info {
>     enum chip_class             chip_class;
>     uint32_t                    gart_size;
>     uint32_t                    vram_size;
>+    uint32_t                    max_sclk;
> 
>     uint32_t                    drm_major; /* version */
>     uint32_t                    drm_minor;
>-- 
>1.9.0
>

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