Attachment 97660 Details for Bug 77709 – dmesg

dmesg

kms_render_gpu-blit.dmesg (text/plain), 125.28 KB, created by Guo Jinxian on 2014-04-21 03:53:09 UTC

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Description:

Filename:

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Creator: Guo Jinxian

Created: 2014-04-21 03:53:09 UTC

Size: 125.28 KB

patch

obsolete

>[ 2813.695353] [drm:check_crtc_state] [CRTC:5]
>[ 2813.695356] [drm:check_crtc_state] [CRTC:8]
>[ 2813.695358] [drm:check_crtc_state] [CRTC:11]
>[ 2813.695604] [drm:drm_mode_addfb2] [FB:53]
>[ 2813.695639] [drm:drm_mode_addfb2] [FB:54]
>[ 2813.695642] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2813.695654] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2813.695656] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2813.695677] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2813.695679] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2813.695680] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2813.695681] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2813.695682] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2813.695683] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2813.695691] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2813.695699] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2813.695700] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2813.695701] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2813.695703] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 2813.695704] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2813.695705] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2813.695706] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 2813.695707] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2813.695709] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2813.695709] [drm:intel_dump_pipe_config] requested mode:
>[ 2813.695711] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[ 2813.695712] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2813.695714] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[ 2813.695716] [drm:intel_dump_crtc_timings] crtc timings: 27000 720 736 798 858 480 489 495 525, type: 0x40 flags: 0xa
>[ 2813.695717] [drm:intel_dump_pipe_config] port clock: 27000
>[ 2813.695718] [drm:intel_dump_pipe_config] pipe src size: 720x480
>[ 2813.695719] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2813.695720] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2813.695721] [drm:intel_dump_pipe_config] ips: 0
>[ 2813.695722] [drm:intel_dump_pipe_config] double wide: 0
>[ 2813.695726] [drm:intel_display_power_get] enabling always-on
>[ 2813.696554] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2813.696555] [drm:intel_ddi_pll_select] WRPLL: 27000KHz refresh rate with p=30, n2=21 r2=14
>[ 2813.698772] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2880
>[ 2813.698776] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:720x480]
>[ 2813.698777] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2813.698778] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2813.698779] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2813.698781] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2813.698781] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2813.698785] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2813.698786] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2813.698788] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0072fa60
>[ 2813.698789] [drm:haswell_write_eld] ELD on pipe C
>[ 2813.698790] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 27000 (0x00020000)
>[ 2813.716343] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2813.716355] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2813.716358] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2813.716360] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2813.716361] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2813.716363] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2813.716365] [drm:check_crtc_state] [CRTC:5]
>[ 2813.716368] [drm:check_crtc_state] [CRTC:8]
>[ 2813.716370] [drm:check_crtc_state] [CRTC:11]
>[ 2820.738195] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2820.738220] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2820.738222] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2820.738223] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2820.738224] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2820.738225] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2820.738234] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2820.765622] [drm:intel_update_fbc] no output, disabling
>[ 2820.765625] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2820.765631] [drm:intel_display_power_put] disabling always-on
>[ 2820.765639] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2820.765641] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2820.765643] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2820.765644] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2820.765646] [drm:check_crtc_state] [CRTC:5]
>[ 2820.765648] [drm:check_crtc_state] [CRTC:8]
>[ 2820.765651] [drm:check_crtc_state] [CRTC:11]
>[ 2820.765900] [drm:drm_mode_addfb2] [FB:53]
>[ 2820.765938] [drm:drm_mode_addfb2] [FB:54]
>[ 2820.765941] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2820.765953] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2820.765955] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2820.765977] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2820.765978] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[ 2820.765980] [drm:drm_mode_debug_printmodeline] Modeline 55:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[ 2820.765982] [drm:drm_mode_debug_printmodeline] Modeline 55:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[ 2820.765983] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2820.765984] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2820.765986] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2820.765987] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2820.765988] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2820.765997] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2820.766005] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2820.766008] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2820.766009] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2820.766010] [drm:intel_modeset_pipe_config] plane bpp: 18, pipe bpp: 24, dithering: 1
>[ 2820.766011] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2820.766012] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2820.766013] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 1
>[ 2820.766015] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2820.766016] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2820.766017] [drm:intel_dump_pipe_config] requested mode:
>[ 2820.766019] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[ 2820.766019] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2820.766021] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[ 2820.766023] [drm:intel_dump_crtc_timings] crtc timings: 31500 640 656 720 840 480 481 484 500, type: 0x40 flags: 0xa
>[ 2820.766024] [drm:intel_dump_pipe_config] port clock: 31500
>[ 2820.766025] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2820.766026] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2820.766027] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2820.766028] [drm:intel_dump_pipe_config] ips: 0
>[ 2820.766029] [drm:intel_dump_pipe_config] double wide: 0
>[ 2820.766033] [drm:intel_display_power_get] enabling always-on
>[ 2820.766862] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2820.766863] [drm:intel_ddi_pll_select] WRPLL: 31500KHz refresh rate with p=30, n2=28 r2=16
>[ 2820.768325] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 1280
>[ 2820.768329] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2820.768330] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2820.768331] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2820.768332] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2820.768334] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2820.768335] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2820.768338] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2820.768339] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2820.768341] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0072fa60
>[ 2820.768342] [drm:haswell_write_eld] ELD on pipe C
>[ 2820.768343] [drm:audio_config_hdmi_pixel_clock] HDMI audio pixel clock setting for 31500 not found, falling back to defaults
>[ 2820.768344] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2820.783630] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2820.783642] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2820.783644] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2820.783646] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2820.783648] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2820.783649] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2820.783651] [drm:check_crtc_state] [CRTC:5]
>[ 2820.783654] [drm:check_crtc_state] [CRTC:8]
>[ 2820.783656] [drm:check_crtc_state] [CRTC:11]
>[ 2827.823967] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2827.823991] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2827.823992] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2827.823993] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2827.823995] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2827.823996] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2827.824004] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2827.843923] [drm:intel_update_fbc] no output, disabling
>[ 2827.843925] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2827.843931] [drm:intel_display_power_put] disabling always-on
>[ 2827.843939] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2827.843941] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2827.843943] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2827.843944] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2827.843946] [drm:check_crtc_state] [CRTC:5]
>[ 2827.843948] [drm:check_crtc_state] [CRTC:8]
>[ 2827.843951] [drm:check_crtc_state] [CRTC:11]
>[ 2827.844114] [drm:drm_mode_addfb2] could not create framebuffer
>[ 2827.844190] [drm:drm_mode_addfb2] [FB:53]
>[ 2827.844224] [drm:drm_mode_addfb2] [FB:54]
>[ 2827.844227] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2827.844239] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2827.844240] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2827.844262] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2827.844263] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2827.844264] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2827.844265] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2827.844267] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2827.844268] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2827.844276] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2827.844283] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2827.844286] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2827.844287] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2827.844289] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 2827.844290] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2827.844291] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2827.844292] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 2827.844293] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2827.844294] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2827.844295] [drm:intel_dump_pipe_config] requested mode:
>[ 2827.844297] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[ 2827.844298] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2827.844299] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[ 2827.844301] [drm:intel_dump_crtc_timings] crtc timings: 31500 640 656 720 840 480 481 484 500, type: 0x40 flags: 0xa
>[ 2827.844302] [drm:intel_dump_pipe_config] port clock: 31500
>[ 2827.844303] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2827.844304] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2827.844306] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2827.844306] [drm:intel_dump_pipe_config] ips: 0
>[ 2827.844307] [drm:intel_dump_pipe_config] double wide: 0
>[ 2827.844311] [drm:intel_display_power_get] enabling always-on
>[ 2827.845136] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2827.845137] [drm:intel_ddi_pll_select] WRPLL: 31500KHz refresh rate with p=30, n2=28 r2=16
>[ 2827.847168] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2560
>[ 2827.847173] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2827.847174] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2827.847175] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2827.847176] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2827.847177] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2827.847178] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2827.847181] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2827.847183] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2827.847184] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2827.847185] [drm:haswell_write_eld] ELD on pipe C
>[ 2827.847187] [drm:audio_config_hdmi_pixel_clock] HDMI audio pixel clock setting for 31500 not found, falling back to defaults
>[ 2827.847188] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2827.860929] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2827.860941] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2827.860944] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2827.860945] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2827.860947] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2827.860948] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2827.860951] [drm:check_crtc_state] [CRTC:5]
>[ 2827.860953] [drm:check_crtc_state] [CRTC:8]
>[ 2827.860956] [drm:check_crtc_state] [CRTC:11]
>[ 2834.881918] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2834.881942] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2834.881944] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2834.881945] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2834.881946] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2834.881947] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2834.881956] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2834.897199] [drm:intel_update_fbc] no output, disabling
>[ 2834.897202] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2834.897208] [drm:intel_display_power_put] disabling always-on
>[ 2834.897216] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2834.897218] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2834.897220] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2834.897222] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2834.897223] [drm:check_crtc_state] [CRTC:5]
>[ 2834.897226] [drm:check_crtc_state] [CRTC:8]
>[ 2834.897228] [drm:check_crtc_state] [CRTC:11]
>[ 2834.897461] [drm:drm_mode_addfb2] [FB:53]
>[ 2834.897496] [drm:drm_mode_addfb2] [FB:54]
>[ 2834.897499] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2834.897512] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2834.897514] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2834.897536] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2834.897537] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2834.897538] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2834.897540] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2834.897541] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2834.897542] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2834.897550] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2834.897558] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2834.897559] [drm:connected_sink_compute_bpp] clamping display bpp (was 30) to default limit of 24
>[ 2834.897562] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2834.897563] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2834.897564] [drm:intel_modeset_pipe_config] plane bpp: 30, pipe bpp: 24, dithering: 1
>[ 2834.897565] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2834.897566] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2834.897567] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 1
>[ 2834.897569] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2834.897570] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2834.897571] [drm:intel_dump_pipe_config] requested mode:
>[ 2834.897573] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[ 2834.897574] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2834.897575] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[ 2834.897577] [drm:intel_dump_crtc_timings] crtc timings: 31500 640 656 720 840 480 481 484 500, type: 0x40 flags: 0xa
>[ 2834.897578] [drm:intel_dump_pipe_config] port clock: 31500
>[ 2834.897579] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2834.897580] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2834.897581] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2834.897582] [drm:intel_dump_pipe_config] ips: 0
>[ 2834.897583] [drm:intel_dump_pipe_config] double wide: 0
>[ 2834.897587] [drm:intel_display_power_get] enabling always-on
>[ 2834.898413] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2834.898414] [drm:intel_ddi_pll_select] WRPLL: 31500KHz refresh rate with p=30, n2=28 r2=16
>[ 2834.900432] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2560
>[ 2834.900436] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2834.900437] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2834.900438] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2834.900439] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2834.900440] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2834.900441] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2834.900444] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2834.900446] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2834.900447] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2834.900448] [drm:haswell_write_eld] ELD on pipe C
>[ 2834.900450] [drm:audio_config_hdmi_pixel_clock] HDMI audio pixel clock setting for 31500 not found, falling back to defaults
>[ 2834.900451] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2834.914201] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2834.914214] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2834.914217] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2834.914218] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2834.914220] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2834.914221] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2834.914224] [drm:check_crtc_state] [CRTC:5]
>[ 2834.914226] [drm:check_crtc_state] [CRTC:8]
>[ 2834.914229] [drm:check_crtc_state] [CRTC:11]
>[ 2841.989720] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2841.989743] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2841.989745] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2841.989746] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2841.989747] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2841.989748] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2841.989757] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2842.017547] [drm:intel_update_fbc] no output, disabling
>[ 2842.017550] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2842.017556] [drm:intel_display_power_put] disabling always-on
>[ 2842.017564] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2842.017566] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2842.017568] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2842.017569] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2842.017571] [drm:check_crtc_state] [CRTC:5]
>[ 2842.017573] [drm:check_crtc_state] [CRTC:8]
>[ 2842.017576] [drm:check_crtc_state] [CRTC:11]
>[ 2842.017801] [drm:drm_mode_addfb2] [FB:53]
>[ 2842.017837] [drm:drm_mode_addfb2] [FB:54]
>[ 2842.017840] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2842.017852] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2842.017853] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2842.017876] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2842.017877] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2842.017879] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2842.017880] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2842.017881] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2842.017882] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2842.017890] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2842.017898] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2842.017901] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2842.017902] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2842.017903] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 2842.017904] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2842.017905] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2842.017906] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 2842.017908] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2842.017909] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2842.017910] [drm:intel_dump_pipe_config] requested mode:
>[ 2842.017912] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[ 2842.017913] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2842.017914] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[ 2842.017916] [drm:intel_dump_crtc_timings] crtc timings: 31500 640 656 720 840 480 481 484 500, type: 0x40 flags: 0xa
>[ 2842.017917] [drm:intel_dump_pipe_config] port clock: 31500
>[ 2842.017918] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2842.017919] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2842.017920] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2842.017921] [drm:intel_dump_pipe_config] ips: 0
>[ 2842.017922] [drm:intel_dump_pipe_config] double wide: 0
>[ 2842.017926] [drm:intel_display_power_get] enabling always-on
>[ 2842.018753] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2842.018754] [drm:intel_ddi_pll_select] WRPLL: 31500KHz refresh rate with p=30, n2=28 r2=16
>[ 2842.020795] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2560
>[ 2842.020799] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2842.020800] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2842.020801] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2842.020802] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2842.020804] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2842.020804] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2842.020808] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2842.020809] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2842.020810] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2842.020812] [drm:haswell_write_eld] ELD on pipe C
>[ 2842.020813] [drm:audio_config_hdmi_pixel_clock] HDMI audio pixel clock setting for 31500 not found, falling back to defaults
>[ 2842.020814] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2842.034536] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2842.034547] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2842.034550] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2842.034552] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2842.034553] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2842.034555] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2842.034557] [drm:check_crtc_state] [CRTC:5]
>[ 2842.034559] [drm:check_crtc_state] [CRTC:8]
>[ 2842.034562] [drm:check_crtc_state] [CRTC:11]
>[ 2849.055599] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2849.055623] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2849.055625] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2849.055626] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2849.055627] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2849.055628] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2849.055637] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2849.070818] [drm:intel_update_fbc] no output, disabling
>[ 2849.070820] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2849.070826] [drm:intel_display_power_put] disabling always-on
>[ 2849.070834] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2849.070836] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2849.070837] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2849.070839] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2849.070840] [drm:check_crtc_state] [CRTC:5]
>[ 2849.070843] [drm:check_crtc_state] [CRTC:8]
>[ 2849.070845] [drm:check_crtc_state] [CRTC:11]
>[ 2849.071069] [drm:drm_mode_addfb2] [FB:53]
>[ 2849.071104] [drm:drm_mode_addfb2] [FB:54]
>[ 2849.071107] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2849.071119] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2849.071121] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2849.071142] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2849.071143] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[ 2849.071145] [drm:drm_mode_debug_printmodeline] Modeline 55:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[ 2849.071147] [drm:drm_mode_debug_printmodeline] Modeline 55:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[ 2849.071149] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2849.071150] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2849.071151] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2849.071152] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2849.071153] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2849.071161] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2849.071169] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2849.071172] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2849.071173] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2849.071174] [drm:intel_modeset_pipe_config] plane bpp: 18, pipe bpp: 24, dithering: 1
>[ 2849.071175] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2849.071176] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2849.071177] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 1
>[ 2849.071179] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2849.071180] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2849.071181] [drm:intel_dump_pipe_config] requested mode:
>[ 2849.071183] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[ 2849.071184] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2849.071185] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[ 2849.071187] [drm:intel_dump_crtc_timings] crtc timings: 30240 640 704 768 864 480 483 486 525, type: 0x40 flags: 0xa
>[ 2849.071188] [drm:intel_dump_pipe_config] port clock: 30240
>[ 2849.071189] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2849.071190] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2849.071191] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2849.071192] [drm:intel_dump_pipe_config] ips: 0
>[ 2849.071193] [drm:intel_dump_pipe_config] double wide: 0
>[ 2849.071197] [drm:intel_display_power_get] enabling always-on
>[ 2849.072031] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2849.072032] [drm:intel_ddi_pll_select] WRPLL: 30240KHz refresh rate with p=30, n2=42 r2=25
>[ 2849.073508] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 1280
>[ 2849.073512] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2849.073513] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2849.073514] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2849.073515] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2849.073517] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2849.073518] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2849.073521] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2849.073522] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2849.073524] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2849.073525] [drm:haswell_write_eld] ELD on pipe C
>[ 2849.073526] [drm:audio_config_hdmi_pixel_clock] HDMI audio pixel clock setting for 30240 not found, falling back to defaults
>[ 2849.073527] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2849.088807] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2849.088820] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2849.088822] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2849.088824] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2849.088825] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2849.088827] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2849.088829] [drm:check_crtc_state] [CRTC:5]
>[ 2849.088832] [drm:check_crtc_state] [CRTC:8]
>[ 2849.088834] [drm:check_crtc_state] [CRTC:11]
>[ 2856.129266] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2856.129289] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2856.129291] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2856.129292] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2856.129293] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2856.129294] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2856.129302] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2856.147117] [drm:intel_update_fbc] no output, disabling
>[ 2856.147119] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2856.147125] [drm:intel_display_power_put] disabling always-on
>[ 2856.147133] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2856.147135] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2856.147137] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2856.147138] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2856.147140] [drm:check_crtc_state] [CRTC:5]
>[ 2856.147142] [drm:check_crtc_state] [CRTC:8]
>[ 2856.147145] [drm:check_crtc_state] [CRTC:11]
>[ 2856.147307] [drm:drm_mode_addfb2] could not create framebuffer
>[ 2856.147377] [drm:drm_mode_addfb2] [FB:53]
>[ 2856.147412] [drm:drm_mode_addfb2] [FB:54]
>[ 2856.147415] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2856.147427] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2856.147429] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2856.147451] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2856.147453] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2856.147454] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2856.147455] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2856.147456] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2856.147457] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2856.147465] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2856.147473] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2856.147476] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2856.147477] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2856.147478] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 2856.147479] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2856.147480] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2856.147481] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 2856.147483] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2856.147484] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2856.147485] [drm:intel_dump_pipe_config] requested mode:
>[ 2856.147487] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[ 2856.147488] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2856.147489] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[ 2856.147491] [drm:intel_dump_crtc_timings] crtc timings: 30240 640 704 768 864 480 483 486 525, type: 0x40 flags: 0xa
>[ 2856.147492] [drm:intel_dump_pipe_config] port clock: 30240
>[ 2856.147493] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2856.147494] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2856.147496] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2856.147497] [drm:intel_dump_pipe_config] ips: 0
>[ 2856.147497] [drm:intel_dump_pipe_config] double wide: 0
>[ 2856.147501] [drm:intel_display_power_get] enabling always-on
>[ 2856.148334] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2856.148336] [drm:intel_ddi_pll_select] WRPLL: 30240KHz refresh rate with p=30, n2=42 r2=25
>[ 2856.150420] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2560
>[ 2856.150424] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2856.150426] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2856.150427] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2856.150427] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2856.150429] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2856.150430] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2856.150433] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2856.150435] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2856.150436] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2856.150437] [drm:haswell_write_eld] ELD on pipe C
>[ 2856.150439] [drm:audio_config_hdmi_pixel_clock] HDMI audio pixel clock setting for 30240 not found, falling back to defaults
>[ 2856.150440] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2856.166125] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2856.166137] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2856.166140] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2856.166142] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2856.166143] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2856.166145] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2856.166147] [drm:check_crtc_state] [CRTC:5]
>[ 2856.166149] [drm:check_crtc_state] [CRTC:8]
>[ 2856.166152] [drm:check_crtc_state] [CRTC:11]
>[ 2863.187216] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2863.187240] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2863.187241] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2863.187242] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2863.187244] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2863.187245] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2863.187253] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2863.210401] [drm:intel_update_fbc] no output, disabling
>[ 2863.210403] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2863.210409] [drm:intel_display_power_put] disabling always-on
>[ 2863.210418] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2863.210419] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2863.210421] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2863.210423] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2863.210424] [drm:check_crtc_state] [CRTC:5]
>[ 2863.210426] [drm:check_crtc_state] [CRTC:8]
>[ 2863.210429] [drm:check_crtc_state] [CRTC:11]
>[ 2863.210657] [drm:drm_mode_addfb2] [FB:53]
>[ 2863.210692] [drm:drm_mode_addfb2] [FB:54]
>[ 2863.210695] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2863.210707] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2863.210709] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2863.210730] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2863.210732] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2863.210733] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2863.210734] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2863.210735] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2863.210736] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2863.210744] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2863.210752] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2863.210753] [drm:connected_sink_compute_bpp] clamping display bpp (was 30) to default limit of 24
>[ 2863.210756] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2863.210757] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2863.210758] [drm:intel_modeset_pipe_config] plane bpp: 30, pipe bpp: 24, dithering: 1
>[ 2863.210759] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2863.210760] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2863.210761] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 1
>[ 2863.210763] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2863.210764] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2863.210765] [drm:intel_dump_pipe_config] requested mode:
>[ 2863.210767] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[ 2863.210768] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2863.210770] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[ 2863.210771] [drm:intel_dump_crtc_timings] crtc timings: 30240 640 704 768 864 480 483 486 525, type: 0x40 flags: 0xa
>[ 2863.210772] [drm:intel_dump_pipe_config] port clock: 30240
>[ 2863.210773] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2863.210775] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2863.210776] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2863.210777] [drm:intel_dump_pipe_config] ips: 0
>[ 2863.210778] [drm:intel_dump_pipe_config] double wide: 0
>[ 2863.210782] [drm:intel_display_power_get] enabling always-on
>[ 2863.211616] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2863.211618] [drm:intel_ddi_pll_select] WRPLL: 30240KHz refresh rate with p=30, n2=42 r2=25
>[ 2863.213721] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2560
>[ 2863.213725] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2863.213726] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2863.213727] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2863.213728] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2863.213730] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2863.213730] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2863.213734] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2863.213735] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2863.213737] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2863.213738] [drm:haswell_write_eld] ELD on pipe C
>[ 2863.213739] [drm:audio_config_hdmi_pixel_clock] HDMI audio pixel clock setting for 30240 not found, falling back to defaults
>[ 2863.213740] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2863.229409] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2863.229422] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2863.229424] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2863.229426] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2863.229427] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2863.229429] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2863.229431] [drm:check_crtc_state] [CRTC:5]
>[ 2863.229434] [drm:check_crtc_state] [CRTC:8]
>[ 2863.229436] [drm:check_crtc_state] [CRTC:11]
>[ 2870.306010] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2870.306034] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2870.306036] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2870.306037] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2870.306038] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2870.306039] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2870.306048] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2870.333755] [drm:intel_update_fbc] no output, disabling
>[ 2870.333758] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2870.333765] [drm:intel_display_power_put] disabling always-on
>[ 2870.333773] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2870.333775] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2870.333777] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2870.333778] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2870.333780] [drm:check_crtc_state] [CRTC:5]
>[ 2870.333782] [drm:check_crtc_state] [CRTC:8]
>[ 2870.333785] [drm:check_crtc_state] [CRTC:11]
>[ 2870.334018] [drm:drm_mode_addfb2] [FB:53]
>[ 2870.334057] [drm:drm_mode_addfb2] [FB:54]
>[ 2870.334060] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2870.334073] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2870.334074] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2870.334098] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2870.334099] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2870.334100] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2870.334101] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2870.334102] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2870.334103] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2870.334111] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2870.334119] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2870.334122] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2870.334123] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2870.334124] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 2870.334125] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2870.334126] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2870.334127] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 2870.334129] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2870.334130] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2870.334131] [drm:intel_dump_pipe_config] requested mode:
>[ 2870.334133] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[ 2870.334134] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2870.334136] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[ 2870.334137] [drm:intel_dump_crtc_timings] crtc timings: 30240 640 704 768 864 480 483 486 525, type: 0x40 flags: 0xa
>[ 2870.334138] [drm:intel_dump_pipe_config] port clock: 30240
>[ 2870.334139] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2870.334141] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2870.334142] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2870.334143] [drm:intel_dump_pipe_config] ips: 0
>[ 2870.334143] [drm:intel_dump_pipe_config] double wide: 0
>[ 2870.334148] [drm:intel_display_power_get] enabling always-on
>[ 2870.334981] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2870.334983] [drm:intel_ddi_pll_select] WRPLL: 30240KHz refresh rate with p=30, n2=42 r2=25
>[ 2870.337027] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2560
>[ 2870.337032] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2870.337033] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2870.337034] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2870.337035] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2870.337036] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2870.337037] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2870.337040] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2870.337042] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2870.337043] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2870.337044] [drm:haswell_write_eld] ELD on pipe C
>[ 2870.337046] [drm:audio_config_hdmi_pixel_clock] HDMI audio pixel clock setting for 30240 not found, falling back to defaults
>[ 2870.337047] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2870.352765] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2870.352777] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2870.352780] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2870.352782] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2870.352783] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2870.352785] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2870.352787] [drm:check_crtc_state] [CRTC:5]
>[ 2870.352790] [drm:check_crtc_state] [CRTC:8]
>[ 2870.352792] [drm:check_crtc_state] [CRTC:11]
>[ 2877.373911] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2877.373935] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2877.373937] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2877.373938] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2877.373939] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2877.373940] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2877.373949] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2877.397043] [drm:intel_update_fbc] no output, disabling
>[ 2877.397046] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2877.397052] [drm:intel_display_power_put] disabling always-on
>[ 2877.397060] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2877.397062] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2877.397064] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2877.397065] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2877.397067] [drm:check_crtc_state] [CRTC:5]
>[ 2877.397069] [drm:check_crtc_state] [CRTC:8]
>[ 2877.397072] [drm:check_crtc_state] [CRTC:11]
>[ 2877.397305] [drm:drm_mode_addfb2] [FB:53]
>[ 2877.397340] [drm:drm_mode_addfb2] [FB:54]
>[ 2877.397343] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2877.397356] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2877.397357] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2877.397380] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2877.397381] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[ 2877.397383] [drm:drm_mode_debug_printmodeline] Modeline 55:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
>[ 2877.397385] [drm:drm_mode_debug_printmodeline] Modeline 55:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2877.397386] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2877.397387] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2877.397388] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2877.397390] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2877.397391] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2877.397399] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2877.397407] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2877.397408] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2877.397409] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2877.397410] [drm:intel_modeset_pipe_config] plane bpp: 18, pipe bpp: 24, dithering: 1
>[ 2877.397411] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2877.397412] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2877.397413] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 1
>[ 2877.397415] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2877.397416] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2877.397417] [drm:intel_dump_pipe_config] requested mode:
>[ 2877.397419] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2877.397419] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2877.397421] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2877.397423] [drm:intel_dump_crtc_timings] crtc timings: 25200 640 656 752 800 480 490 492 525, type: 0x40 flags: 0xa
>[ 2877.397424] [drm:intel_dump_pipe_config] port clock: 25200
>[ 2877.397425] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2877.397426] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2877.397427] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2877.397428] [drm:intel_dump_pipe_config] ips: 0
>[ 2877.397429] [drm:intel_dump_pipe_config] double wide: 0
>[ 2877.397433] [drm:intel_display_power_get] enabling always-on
>[ 2877.398274] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2877.398276] [drm:intel_ddi_pll_select] WRPLL: 25200KHz refresh rate with p=30, n2=21 r2=15
>[ 2877.399731] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 1280
>[ 2877.399735] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2877.399736] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2877.399737] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2877.399738] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2877.399739] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2877.399740] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2877.399743] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2877.399745] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2877.399746] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2877.399748] [drm:haswell_write_eld] ELD on pipe C
>[ 2877.399749] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2877.417030] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2877.417042] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2877.417045] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2877.417046] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2877.417048] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2877.417050] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2877.417052] [drm:check_crtc_state] [CRTC:5]
>[ 2877.417054] [drm:check_crtc_state] [CRTC:8]
>[ 2877.417057] [drm:check_crtc_state] [CRTC:11]
>[ 2884.457513] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2884.457536] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2884.457538] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2884.457539] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2884.457540] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2884.457541] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2884.457550] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2884.475341] [drm:intel_update_fbc] no output, disabling
>[ 2884.475345] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2884.475351] [drm:intel_display_power_put] disabling always-on
>[ 2884.475359] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2884.475361] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2884.475363] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2884.475364] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2884.475366] [drm:check_crtc_state] [CRTC:5]
>[ 2884.475368] [drm:check_crtc_state] [CRTC:8]
>[ 2884.475371] [drm:check_crtc_state] [CRTC:11]
>[ 2884.475536] [drm:drm_mode_addfb2] could not create framebuffer
>[ 2884.475608] [drm:drm_mode_addfb2] [FB:53]
>[ 2884.475644] [drm:drm_mode_addfb2] [FB:54]
>[ 2884.475647] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2884.475659] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2884.475661] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2884.475683] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2884.475684] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2884.475685] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2884.475687] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2884.475688] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2884.475689] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2884.475697] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2884.475705] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2884.475706] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2884.475707] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2884.475708] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 2884.475709] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2884.475710] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2884.475711] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 2884.475713] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2884.475714] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2884.475715] [drm:intel_dump_pipe_config] requested mode:
>[ 2884.475717] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2884.475718] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2884.475719] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2884.475721] [drm:intel_dump_crtc_timings] crtc timings: 25200 640 656 752 800 480 490 492 525, type: 0x40 flags: 0xa
>[ 2884.475722] [drm:intel_dump_pipe_config] port clock: 25200
>[ 2884.475723] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2884.475724] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2884.475725] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2884.475726] [drm:intel_dump_pipe_config] ips: 0
>[ 2884.475727] [drm:intel_dump_pipe_config] double wide: 0
>[ 2884.475731] [drm:intel_display_power_get] enabling always-on
>[ 2884.476555] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2884.476556] [drm:intel_ddi_pll_select] WRPLL: 25200KHz refresh rate with p=30, n2=21 r2=15
>[ 2884.478395] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2560
>[ 2884.478399] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2884.478401] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2884.478402] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2884.478402] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2884.478404] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2884.478405] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2884.478408] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2884.478410] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2884.478411] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2884.478412] [drm:haswell_write_eld] ELD on pipe C
>[ 2884.478413] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2884.496351] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2884.496363] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2884.496365] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2884.496367] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2884.496368] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2884.496370] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2884.496372] [drm:check_crtc_state] [CRTC:5]
>[ 2884.496375] [drm:check_crtc_state] [CRTC:8]
>[ 2884.496377] [drm:check_crtc_state] [CRTC:11]
>[ 2891.517458] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2891.517482] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2891.517484] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2891.517485] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2891.517486] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2891.517487] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2891.517496] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2891.538626] [drm:intel_update_fbc] no output, disabling
>[ 2891.538629] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2891.538635] [drm:intel_display_power_put] disabling always-on
>[ 2891.538644] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2891.538646] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2891.538647] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2891.538649] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2891.538650] [drm:check_crtc_state] [CRTC:5]
>[ 2891.538653] [drm:check_crtc_state] [CRTC:8]
>[ 2891.538655] [drm:check_crtc_state] [CRTC:11]
>[ 2891.538891] [drm:drm_mode_addfb2] [FB:53]
>[ 2891.538926] [drm:drm_mode_addfb2] [FB:54]
>[ 2891.538929] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2891.538942] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2891.538943] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2891.538965] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2891.538967] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2891.538968] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2891.538969] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2891.538970] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2891.538971] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2891.538979] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2891.538987] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2891.538988] [drm:connected_sink_compute_bpp] clamping display bpp (was 30) to default limit of 24
>[ 2891.538989] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2891.538990] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2891.538991] [drm:intel_modeset_pipe_config] plane bpp: 30, pipe bpp: 24, dithering: 1
>[ 2891.538993] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2891.538993] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2891.538994] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 1
>[ 2891.538996] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2891.538997] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2891.538998] [drm:intel_dump_pipe_config] requested mode:
>[ 2891.539000] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2891.539001] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2891.539003] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2891.539004] [drm:intel_dump_crtc_timings] crtc timings: 25200 640 656 752 800 480 490 492 525, type: 0x40 flags: 0xa
>[ 2891.539005] [drm:intel_dump_pipe_config] port clock: 25200
>[ 2891.539006] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2891.539007] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2891.539009] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2891.539010] [drm:intel_dump_pipe_config] ips: 0
>[ 2891.539011] [drm:intel_dump_pipe_config] double wide: 0
>[ 2891.539015] [drm:intel_display_power_get] enabling always-on
>[ 2891.539840] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2891.539843] [drm:intel_ddi_pll_select] WRPLL: 25200KHz refresh rate with p=30, n2=21 r2=15
>[ 2891.541879] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2560
>[ 2891.541883] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2891.541884] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2891.541885] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2891.541886] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2891.541888] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2891.541889] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2891.541892] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2891.541894] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2891.541895] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2891.541896] [drm:haswell_write_eld] ELD on pipe C
>[ 2891.541897] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2891.559632] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2891.559646] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2891.559649] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2891.559651] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2891.559652] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2891.559654] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2891.559656] [drm:check_crtc_state] [CRTC:5]
>[ 2891.559659] [drm:check_crtc_state] [CRTC:8]
>[ 2891.559661] [drm:check_crtc_state] [CRTC:11]
>[ 2898.636528] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2898.636552] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2898.636553] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2898.636554] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2898.636555] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2898.636556] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2898.636565] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2898.667987] [drm:intel_update_fbc] no output, disabling
>[ 2898.667989] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2898.667995] [drm:intel_display_power_put] disabling always-on
>[ 2898.668004] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2898.668005] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2898.668007] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2898.668008] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2898.668010] [drm:check_crtc_state] [CRTC:5]
>[ 2898.668012] [drm:check_crtc_state] [CRTC:8]
>[ 2898.668015] [drm:check_crtc_state] [CRTC:11]
>[ 2898.668244] [drm:drm_mode_addfb2] [FB:53]
>[ 2898.668281] [drm:drm_mode_addfb2] [FB:54]
>[ 2898.668284] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2898.668296] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2898.668298] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2898.668319] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2898.668321] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2898.668322] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2898.668323] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2898.668324] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2898.668325] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2898.668333] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2898.668341] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2898.668343] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2898.668344] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2898.668345] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 2898.668346] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2898.668347] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2898.668348] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 2898.668349] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2898.668351] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2898.668352] [drm:intel_dump_pipe_config] requested mode:
>[ 2898.668353] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2898.668354] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2898.668356] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2898.668358] [drm:intel_dump_crtc_timings] crtc timings: 25200 640 656 752 800 480 490 492 525, type: 0x40 flags: 0xa
>[ 2898.668358] [drm:intel_dump_pipe_config] port clock: 25200
>[ 2898.668359] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2898.668361] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2898.668362] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2898.668363] [drm:intel_dump_pipe_config] ips: 0
>[ 2898.668364] [drm:intel_dump_pipe_config] double wide: 0
>[ 2898.668368] [drm:intel_display_power_get] enabling always-on
>[ 2898.669193] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2898.669195] [drm:intel_ddi_pll_select] WRPLL: 25200KHz refresh rate with p=30, n2=21 r2=15
>[ 2898.671230] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2560
>[ 2898.671234] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2898.671235] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2898.671236] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2898.671237] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2898.671238] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2898.671239] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2898.671242] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2898.671244] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2898.671245] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2898.671247] [drm:haswell_write_eld] ELD on pipe C
>[ 2898.671248] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2898.688996] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2898.689008] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2898.689011] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2898.689013] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2898.689014] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2898.689016] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2898.689018] [drm:check_crtc_state] [CRTC:5]
>[ 2898.689021] [drm:check_crtc_state] [CRTC:8]
>[ 2898.689023] [drm:check_crtc_state] [CRTC:11]
>[ 2905.710038] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2905.710061] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2905.710063] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2905.710064] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2905.710065] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2905.710066] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2905.710075] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2905.731270] [drm:intel_update_fbc] no output, disabling
>[ 2905.731273] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2905.731279] [drm:intel_display_power_put] disabling always-on
>[ 2905.731287] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2905.731289] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2905.731290] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2905.731292] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2905.731293] [drm:check_crtc_state] [CRTC:5]
>[ 2905.731296] [drm:check_crtc_state] [CRTC:8]
>[ 2905.731298] [drm:check_crtc_state] [CRTC:11]
>[ 2905.731530] [drm:drm_mode_addfb2] [FB:53]
>[ 2905.731564] [drm:drm_mode_addfb2] [FB:54]
>[ 2905.731567] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2905.731580] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2905.731582] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2905.731604] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2905.731605] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[ 2905.731607] [drm:drm_mode_debug_printmodeline] Modeline 55:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2905.731609] [drm:drm_mode_debug_printmodeline] Modeline 55:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2905.731610] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2905.731611] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2905.731612] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2905.731613] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2905.731614] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2905.731622] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2905.731630] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2905.731631] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2905.731632] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2905.731633] [drm:intel_modeset_pipe_config] plane bpp: 18, pipe bpp: 24, dithering: 1
>[ 2905.731635] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2905.731635] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2905.731636] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 1
>[ 2905.731638] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2905.731639] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2905.731640] [drm:intel_dump_pipe_config] requested mode:
>[ 2905.731642] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2905.731642] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2905.731644] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2905.731646] [drm:intel_dump_crtc_timings] crtc timings: 25175 640 656 752 800 480 490 492 525, type: 0x40 flags: 0xa
>[ 2905.731647] [drm:intel_dump_pipe_config] port clock: 25175
>[ 2905.731648] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2905.731649] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2905.731650] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2905.731651] [drm:intel_dump_pipe_config] ips: 0
>[ 2905.731652] [drm:intel_dump_pipe_config] double wide: 0
>[ 2905.731656] [drm:intel_display_power_get] enabling always-on
>[ 2905.732806] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2905.732807] [drm:intel_ddi_pll_select] WRPLL: 25175KHz refresh rate with p=26, n2=40 r2=33
>[ 2905.734564] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 1280
>[ 2905.734568] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2905.734569] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2905.734570] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2905.734571] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2905.734573] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2905.734574] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2905.734577] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2905.734578] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2905.734580] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2905.734581] [drm:haswell_write_eld] ELD on pipe C
>[ 2905.734582] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25175 (0x00000000)
>[ 2905.752281] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2905.752293] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2905.752295] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2905.752297] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2905.752299] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2905.752300] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2905.752303] [drm:check_crtc_state] [CRTC:5]
>[ 2905.752305] [drm:check_crtc_state] [CRTC:8]
>[ 2905.752307] [drm:check_crtc_state] [CRTC:11]
>[ 2912.792623] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2912.792647] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2912.792648] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2912.792649] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2912.792650] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2912.792652] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2912.792660] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2912.818582] [drm:intel_update_fbc] no output, disabling
>[ 2912.818585] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2912.818591] [drm:intel_display_power_put] disabling always-on
>[ 2912.818600] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2912.818601] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2912.818603] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2912.818604] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2912.818606] [drm:check_crtc_state] [CRTC:5]
>[ 2912.818608] [drm:check_crtc_state] [CRTC:8]
>[ 2912.818611] [drm:check_crtc_state] [CRTC:11]
>[ 2912.818781] [drm:drm_mode_addfb2] could not create framebuffer
>[ 2912.818852] [drm:drm_mode_addfb2] [FB:53]
>[ 2912.818886] [drm:drm_mode_addfb2] [FB:54]
>[ 2912.818889] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2912.818901] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2912.818903] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2912.818925] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2912.818927] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2912.818928] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2912.818929] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2912.818930] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2912.818931] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2912.818939] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2912.818947] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2912.818948] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2912.818949] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2912.818951] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 2912.818952] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2912.818953] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2912.818954] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 2912.818955] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2912.818956] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2912.818957] [drm:intel_dump_pipe_config] requested mode:
>[ 2912.818959] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2912.818960] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2912.818962] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2912.818963] [drm:intel_dump_crtc_timings] crtc timings: 25175 640 656 752 800 480 490 492 525, type: 0x40 flags: 0xa
>[ 2912.818964] [drm:intel_dump_pipe_config] port clock: 25175
>[ 2912.818965] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2912.818966] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2912.818967] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2912.818968] [drm:intel_dump_pipe_config] ips: 0
>[ 2912.818969] [drm:intel_dump_pipe_config] double wide: 0
>[ 2912.818973] [drm:intel_display_power_get] enabling always-on
>[ 2912.820100] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2912.820101] [drm:intel_ddi_pll_select] WRPLL: 25175KHz refresh rate with p=26, n2=40 r2=33
>[ 2912.822410] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2560
>[ 2912.822414] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2912.822415] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2912.822416] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2912.822417] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2912.822419] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2912.822419] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2912.822423] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2912.822424] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2912.822426] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0070fa60
>[ 2912.822427] [drm:haswell_write_eld] ELD on pipe C
>[ 2912.822428] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25175 (0x00000000)
>[ 2912.840592] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2912.840603] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2912.840606] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2912.840607] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2912.840609] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2912.840610] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2912.840613] [drm:check_crtc_state] [CRTC:5]
>[ 2912.840615] [drm:check_crtc_state] [CRTC:8]
>[ 2912.840617] [drm:check_crtc_state] [CRTC:11]
>[ 2919.861679] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2919.861703] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2919.861705] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2919.861706] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2919.861707] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2919.861708] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2919.861717] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2919.888874] [drm:intel_update_fbc] no output, disabling
>[ 2919.888878] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2919.888884] [drm:intel_display_power_put] disabling always-on
>[ 2919.888892] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2919.888894] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2919.888896] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2919.888897] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2919.888899] [drm:check_crtc_state] [CRTC:5]
>[ 2919.888901] [drm:check_crtc_state] [CRTC:8]
>[ 2919.888904] [drm:check_crtc_state] [CRTC:11]
>[ 2919.889138] [drm:drm_mode_addfb2] [FB:53]
>[ 2919.889173] [drm:drm_mode_addfb2] [FB:54]
>[ 2919.889176] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2919.889189] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2919.889190] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2919.889212] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2919.889214] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2919.889215] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2919.889216] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2919.889217] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2919.889218] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2919.889226] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2919.889234] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2919.889235] [drm:connected_sink_compute_bpp] clamping display bpp (was 30) to default limit of 24
>[ 2919.889236] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2919.889237] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2919.889239] [drm:intel_modeset_pipe_config] plane bpp: 30, pipe bpp: 24, dithering: 1
>[ 2919.889240] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2919.889241] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2919.889242] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 1
>[ 2919.889243] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2919.889244] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2919.889245] [drm:intel_dump_pipe_config] requested mode:
>[ 2919.889247] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2919.889248] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2919.889250] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2919.889251] [drm:intel_dump_crtc_timings] crtc timings: 25175 640 656 752 800 480 490 492 525, type: 0x40 flags: 0xa
>[ 2919.889252] [drm:intel_dump_pipe_config] port clock: 25175
>[ 2919.889253] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2919.889255] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2919.889256] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2919.889257] [drm:intel_dump_pipe_config] ips: 0
>[ 2919.889257] [drm:intel_dump_pipe_config] double wide: 0
>[ 2919.889262] [drm:intel_display_power_get] enabling always-on
>[ 2919.890392] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2919.890393] [drm:intel_ddi_pll_select] WRPLL: 25175KHz refresh rate with p=26, n2=40 r2=33
>[ 2919.892740] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2560
>[ 2919.892744] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2919.892745] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2919.892746] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2919.892747] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2919.892748] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2919.892749] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2919.892752] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2919.892754] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2919.892755] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0070fa60
>[ 2919.892757] [drm:haswell_write_eld] ELD on pipe C
>[ 2919.892758] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25175 (0x00000000)
>[ 2919.910884] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2919.910896] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2919.910898] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2919.910900] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2919.910901] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2919.910903] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2919.910905] [drm:check_crtc_state] [CRTC:5]
>[ 2919.910908] [drm:check_crtc_state] [CRTC:8]
>[ 2919.910910] [drm:check_crtc_state] [CRTC:11]
>[ 2926.987267] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2926.987291] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2926.987292] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2926.987293] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2926.987294] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2926.987295] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2926.987304] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2927.009224] [drm:intel_update_fbc] no output, disabling
>[ 2927.009227] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2927.009233] [drm:intel_display_power_put] disabling always-on
>[ 2927.009241] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2927.009242] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2927.009244] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2927.009246] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2927.009247] [drm:check_crtc_state] [CRTC:5]
>[ 2927.009249] [drm:check_crtc_state] [CRTC:8]
>[ 2927.009252] [drm:check_crtc_state] [CRTC:11]
>[ 2927.009477] [drm:drm_mode_addfb2] [FB:53]
>[ 2927.009511] [drm:drm_mode_addfb2] [FB:54]
>[ 2927.009514] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2927.009526] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2927.009527] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2927.009549] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2927.009550] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2927.009551] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2927.009553] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2927.009554] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2927.009555] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2927.009563] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2927.009571] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2927.009572] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2927.009573] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2927.009574] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 2927.009575] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2927.009576] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2927.009577] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 2927.009578] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2927.009580] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2927.009581] [drm:intel_dump_pipe_config] requested mode:
>[ 2927.009583] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2927.009583] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2927.009585] [drm:drm_mode_debug_printmodeline] Modeline 0:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2927.009587] [drm:intel_dump_crtc_timings] crtc timings: 25175 640 656 752 800 480 490 492 525, type: 0x40 flags: 0xa
>[ 2927.009588] [drm:intel_dump_pipe_config] port clock: 25175
>[ 2927.009589] [drm:intel_dump_pipe_config] pipe src size: 640x480
>[ 2927.009590] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2927.009591] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2927.009592] [drm:intel_dump_pipe_config] ips: 0
>[ 2927.009593] [drm:intel_dump_pipe_config] double wide: 0
>[ 2927.009597] [drm:intel_display_power_get] enabling always-on
>[ 2927.010724] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2927.010726] [drm:intel_ddi_pll_select] WRPLL: 25175KHz refresh rate with p=26, n2=40 r2=33
>[ 2927.013070] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2560
>[ 2927.013074] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:640x480]
>[ 2927.013075] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2927.013076] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2927.013077] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2927.013079] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2927.013079] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2927.013083] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2927.013084] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2927.013085] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0070fa60
>[ 2927.013087] [drm:haswell_write_eld] ELD on pipe C
>[ 2927.013088] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25175 (0x00000000)
>[ 2927.031234] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2927.031246] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2927.031248] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2927.031250] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2927.031252] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2927.031253] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2927.031255] [drm:check_crtc_state] [CRTC:5]
>[ 2927.031258] [drm:check_crtc_state] [CRTC:8]
>[ 2927.031260] [drm:check_crtc_state] [CRTC:11]
>[ 2934.052316] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2934.052340] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2934.052342] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2934.052343] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2934.052344] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2934.052345] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2934.052354] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2934.079518] [drm:intel_update_fbc] no output, disabling
>[ 2934.079521] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2934.079527] [drm:intel_display_power_put] disabling always-on
>[ 2934.079536] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2934.079538] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2934.079539] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2934.079541] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2934.079542] [drm:check_crtc_state] [CRTC:5]
>[ 2934.079545] [drm:check_crtc_state] [CRTC:8]
>[ 2934.079547] [drm:check_crtc_state] [CRTC:11]
>[ 2934.079780] [drm:drm_mode_addfb2] [FB:53]
>[ 2934.079818] [drm:drm_mode_addfb2] [FB:54]
>[ 2934.079821] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2934.079833] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2934.079835] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2934.079858] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2934.079859] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[ 2934.079861] [drm:drm_mode_debug_printmodeline] Modeline 55:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[ 2934.079862] [drm:drm_mode_debug_printmodeline] Modeline 55:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[ 2934.079864] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2934.079865] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2934.079866] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2934.079867] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2934.079868] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2934.079876] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2934.079884] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2934.079887] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2934.079888] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2934.079890] [drm:intel_modeset_pipe_config] plane bpp: 18, pipe bpp: 24, dithering: 1
>[ 2934.079891] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2934.079892] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2934.079893] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 1
>[ 2934.079894] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2934.079895] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2934.079896] [drm:intel_dump_pipe_config] requested mode:
>[ 2934.079898] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[ 2934.079899] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2934.079900] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[ 2934.079902] [drm:intel_dump_crtc_timings] crtc timings: 28320 720 738 846 900 400 412 414 449, type: 0x40 flags: 0x6
>[ 2934.079903] [drm:intel_dump_pipe_config] port clock: 28320
>[ 2934.079904] [drm:intel_dump_pipe_config] pipe src size: 720x400
>[ 2934.079905] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2934.079906] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2934.079907] [drm:intel_dump_pipe_config] ips: 0
>[ 2934.079908] [drm:intel_dump_pipe_config] double wide: 0
>[ 2934.079912] [drm:intel_display_power_get] enabling always-on
>[ 2934.080741] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2934.080743] [drm:intel_ddi_pll_select] WRPLL: 28320KHz refresh rate with p=26, n2=30 r2=22
>[ 2934.082183] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 1472
>[ 2934.082187] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:720x400]
>[ 2934.082188] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2934.082189] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2934.082190] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2934.082192] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2934.082193] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2934.082196] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2934.082198] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2934.082199] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0070fa60
>[ 2934.082200] [drm:haswell_write_eld] ELD on pipe C
>[ 2934.082201] [drm:audio_config_hdmi_pixel_clock] HDMI audio pixel clock setting for 28320 not found, falling back to defaults
>[ 2934.082203] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2934.097522] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2934.097534] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2934.097537] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2934.097539] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2934.097540] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2934.097542] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2934.097544] [drm:check_crtc_state] [CRTC:5]
>[ 2934.097546] [drm:check_crtc_state] [CRTC:8]
>[ 2934.097549] [drm:check_crtc_state] [CRTC:11]
>[ 2941.136594] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2941.136617] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2941.136619] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2941.136620] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2941.136621] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2941.136622] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2941.136631] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2941.153812] [drm:intel_update_fbc] no output, disabling
>[ 2941.153815] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2941.153821] [drm:intel_display_power_put] disabling always-on
>[ 2941.153830] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2941.153832] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2941.153833] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2941.153835] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2941.153836] [drm:check_crtc_state] [CRTC:5]
>[ 2941.153839] [drm:check_crtc_state] [CRTC:8]
>[ 2941.153841] [drm:check_crtc_state] [CRTC:11]
>[ 2941.154009] [drm:drm_mode_addfb2] could not create framebuffer
>[ 2941.154082] [drm:drm_mode_addfb2] [FB:53]
>[ 2941.154116] [drm:drm_mode_addfb2] [FB:54]
>[ 2941.154119] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2941.154132] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2941.154133] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2941.154156] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2941.154157] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2941.154159] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2941.154160] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2941.154161] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2941.154162] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2941.154170] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2941.154178] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2941.154181] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2941.154182] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2941.154183] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 2941.154184] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2941.154185] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2941.154186] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 2941.154188] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2941.154189] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2941.154190] [drm:intel_dump_pipe_config] requested mode:
>[ 2941.154192] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[ 2941.154193] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2941.154194] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[ 2941.154196] [drm:intel_dump_crtc_timings] crtc timings: 28320 720 738 846 900 400 412 414 449, type: 0x40 flags: 0x6
>[ 2941.154197] [drm:intel_dump_pipe_config] port clock: 28320
>[ 2941.154198] [drm:intel_dump_pipe_config] pipe src size: 720x400
>[ 2941.154199] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2941.154200] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2941.154201] [drm:intel_dump_pipe_config] ips: 0
>[ 2941.154202] [drm:intel_dump_pipe_config] double wide: 0
>[ 2941.154206] [drm:intel_display_power_get] enabling always-on
>[ 2941.155083] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2941.155085] [drm:intel_ddi_pll_select] WRPLL: 28320KHz refresh rate with p=26, n2=30 r2=22
>[ 2941.157024] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2880
>[ 2941.157028] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:720x400]
>[ 2941.157029] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2941.157030] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2941.157031] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2941.157033] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2941.157034] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2941.157037] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2941.157038] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2941.157040] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2941.157041] [drm:haswell_write_eld] ELD on pipe C
>[ 2941.157042] [drm:audio_config_hdmi_pixel_clock] HDMI audio pixel clock setting for 28320 not found, falling back to defaults
>[ 2941.157043] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2941.172820] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2941.172832] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2941.172835] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2941.172836] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2941.172838] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2941.172839] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2941.172842] [drm:check_crtc_state] [CRTC:5]
>[ 2941.172844] [drm:check_crtc_state] [CRTC:8]
>[ 2941.172847] [drm:check_crtc_state] [CRTC:11]
>[ 2948.193577] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2948.193601] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2948.193602] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2948.193604] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2948.193605] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2948.193606] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2948.193614] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2948.215095] [drm:intel_update_fbc] no output, disabling
>[ 2948.215097] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2948.215103] [drm:intel_display_power_put] disabling always-on
>[ 2948.215111] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2948.215113] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2948.215114] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2948.215116] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2948.215118] [drm:check_crtc_state] [CRTC:5]
>[ 2948.215120] [drm:check_crtc_state] [CRTC:8]
>[ 2948.215122] [drm:check_crtc_state] [CRTC:11]
>[ 2948.215344] [drm:drm_mode_addfb2] [FB:53]
>[ 2948.215379] [drm:drm_mode_addfb2] [FB:54]
>[ 2948.215382] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2948.215394] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2948.215395] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2948.215418] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2948.215419] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2948.215420] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2948.215422] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2948.215423] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2948.215424] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2948.215432] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2948.215440] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2948.215441] [drm:connected_sink_compute_bpp] clamping display bpp (was 30) to default limit of 24
>[ 2948.215444] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2948.215445] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2948.215446] [drm:intel_modeset_pipe_config] plane bpp: 30, pipe bpp: 24, dithering: 1
>[ 2948.215447] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2948.215448] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2948.215449] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 1
>[ 2948.215450] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2948.215452] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2948.215453] [drm:intel_dump_pipe_config] requested mode:
>[ 2948.215455] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[ 2948.215455] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2948.215457] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[ 2948.215459] [drm:intel_dump_crtc_timings] crtc timings: 28320 720 738 846 900 400 412 414 449, type: 0x40 flags: 0x6
>[ 2948.215460] [drm:intel_dump_pipe_config] port clock: 28320
>[ 2948.215461] [drm:intel_dump_pipe_config] pipe src size: 720x400
>[ 2948.215462] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2948.215463] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2948.215464] [drm:intel_dump_pipe_config] ips: 0
>[ 2948.215465] [drm:intel_dump_pipe_config] double wide: 0
>[ 2948.215469] [drm:intel_display_power_get] enabling always-on
>[ 2948.216315] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2948.216317] [drm:intel_ddi_pll_select] WRPLL: 28320KHz refresh rate with p=26, n2=30 r2=22
>[ 2948.218270] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2880
>[ 2948.218274] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:720x400]
>[ 2948.218275] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2948.218276] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2948.218277] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2948.218279] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2948.218280] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2948.218283] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2948.218285] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2948.218286] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2948.218287] [drm:haswell_write_eld] ELD on pipe C
>[ 2948.218288] [drm:audio_config_hdmi_pixel_clock] HDMI audio pixel clock setting for 28320 not found, falling back to defaults
>[ 2948.218290] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2948.234102] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2948.234115] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2948.234117] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2948.234119] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2948.234121] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2948.234122] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2948.234125] [drm:check_crtc_state] [CRTC:5]
>[ 2948.234127] [drm:check_crtc_state] [CRTC:8]
>[ 2948.234130] [drm:check_crtc_state] [CRTC:11]
>[ 2955.306985] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2955.307008] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2955.307010] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2955.307011] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2955.307012] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2955.307013] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2955.307022] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2955.332442] [drm:intel_update_fbc] no output, disabling
>[ 2955.332445] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2955.332451] [drm:intel_display_power_put] disabling always-on
>[ 2955.332460] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2955.332461] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2955.332463] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2955.332464] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2955.332466] [drm:check_crtc_state] [CRTC:5]
>[ 2955.332468] [drm:check_crtc_state] [CRTC:8]
>[ 2955.332471] [drm:check_crtc_state] [CRTC:11]
>[ 2955.332698] [drm:drm_mode_addfb2] [FB:53]
>[ 2955.332733] [drm:drm_mode_addfb2] [FB:54]
>[ 2955.332736] [drm:drm_mode_setcrtc] [CRTC:11]
>[ 2955.332749] [drm:drm_mode_setcrtc] [CONNECTOR:24:HDMI-A-3]
>[ 2955.332750] [drm:intel_crtc_set_config] [CRTC:11] [FB:53] #connectors=1 (x y) (0 0)
>[ 2955.332773] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2955.332774] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2955.332776] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2955.332777] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:11]
>[ 2955.332778] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2955.332779] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2955.332787] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 4, prepare: 4, disable: 0
>[ 2955.332795] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2955.332798] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2955.332799] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2955.332801] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 2955.332802] [drm:intel_dump_pipe_config] [CRTC:11][modeset] config for pipe C
>[ 2955.332803] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[ 2955.332804] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 2955.332805] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2955.332806] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2955.332807] [drm:intel_dump_pipe_config] requested mode:
>[ 2955.332809] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[ 2955.332810] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2955.332812] [drm:drm_mode_debug_printmodeline] Modeline 0:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[ 2955.332813] [drm:intel_dump_crtc_timings] crtc timings: 28320 720 738 846 900 400 412 414 449, type: 0x40 flags: 0x6
>[ 2955.332814] [drm:intel_dump_pipe_config] port clock: 28320
>[ 2955.332815] [drm:intel_dump_pipe_config] pipe src size: 720x400
>[ 2955.332817] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2955.332818] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2955.332819] [drm:intel_dump_pipe_config] ips: 0
>[ 2955.332820] [drm:intel_dump_pipe_config] double wide: 0
>[ 2955.332824] [drm:intel_display_power_get] enabling always-on
>[ 2955.333653] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe C
>[ 2955.333654] [drm:intel_ddi_pll_select] WRPLL: 28320KHz refresh rate with p=26, n2=30 r2=22
>[ 2955.335630] [drm:ironlake_update_primary_plane] Writing base 01190000 00000000 0 0 2880
>[ 2955.335634] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:720x400]
>[ 2955.335635] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe C
>[ 2955.335636] [drm:intel_ddi_mode_set] HDMI audio on pipe C on DDI
>[ 2955.335637] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2955.335639] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2955.335640] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2955.335643] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000400
>[ 2955.335645] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000500
>[ 2955.335646] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2955.335647] [drm:haswell_write_eld] ELD on pipe C
>[ 2955.335649] [drm:audio_config_hdmi_pixel_clock] HDMI audio pixel clock setting for 28320 not found, falling back to defaults
>[ 2955.335650] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 25200 (0x00010000)
>[ 2955.351448] [drm:intel_update_fbc] plane not A, disabling compression
>[ 2955.351460] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2955.351462] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2955.351464] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2955.351466] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2955.351467] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2955.351469] [drm:check_crtc_state] [CRTC:5]
>[ 2955.351472] [drm:check_crtc_state] [CRTC:8]
>[ 2955.351474] [drm:check_crtc_state] [CRTC:11]
>[ 2962.372243] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2962.372267] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=1, fb_changed=0
>[ 2962.372269] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [NOCRTC]
>[ 2962.372270] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2962.372271] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2962.372272] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[ 2962.372281] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 4
>[ 2962.393723] [drm:intel_update_fbc] no output, disabling
>[ 2962.393726] [drm:intel_ddi_put_crtc_pll] Disabling WRPLL 1
>[ 2962.393732] [drm:intel_display_power_put] disabling always-on
>[ 2962.393740] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2962.393742] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2962.393744] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2962.393745] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2962.393747] [drm:check_crtc_state] [CRTC:5]
>[ 2962.393750] [drm:check_crtc_state] [CRTC:8]
>[ 2962.393752] [drm:check_crtc_state] [CRTC:11]
>[ 2962.394049] [drm:intel_crtc_cursor_set] cursor off
>[ 2962.394060] [drm:intel_crtc_set_config] [CRTC:5] [FB:52] #connectors=1 (x y) (0 0)
>[ 2962.394080] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[ 2962.394081] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[ 2962.394082] [drm:drm_mode_debug_printmodeline] Modeline 55:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[ 2962.394084] [drm:drm_mode_debug_printmodeline] Modeline 51:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[ 2962.394085] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[ 2962.394085] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch
>[ 2962.394086] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:5]
>[ 2962.394087] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[ 2962.394088] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[ 2962.394096] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[ 2962.394104] [drm:connected_sink_compute_bpp] [CONNECTOR:24:HDMI-A-3] checking for sink bpp constrains
>[ 2962.394105] [drm:intel_hdmi_compute_config] picking bpc to 8 for HDMI output
>[ 2962.394106] [drm:intel_hdmi_compute_config] forcing pipe bpc to 24 for HDMI
>[ 2962.394107] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[ 2962.394108] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[ 2962.394108] [drm:intel_dump_pipe_config] cpu_transcoder: A
>[ 2962.394109] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[ 2962.394110] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2962.394111] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[ 2962.394111] [drm:intel_dump_pipe_config] requested mode:
>[ 2962.394113] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[ 2962.394113] [drm:intel_dump_pipe_config] adjusted mode:
>[ 2962.394114] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[ 2962.394115] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[ 2962.394116] [drm:intel_dump_pipe_config] port clock: 148500
>[ 2962.394117] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[ 2962.394117] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[ 2962.394118] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[ 2962.394118] [drm:intel_dump_pipe_config] ips: 0
>[ 2962.394119] [drm:intel_dump_pipe_config] double wide: 0
>[ 2962.394125] [drm:intel_display_power_get] enabling always-on
>[ 2962.394959] [drm:intel_ddi_pll_select] Using WRPLL 1 on pipe A
>[ 2962.394960] [drm:intel_ddi_pll_select] WRPLL: 148500KHz refresh rate with p=6, n2=33 r2=20
>[ 2962.395817] [drm:ironlake_update_primary_plane] Writing base 00585000 00000000 0 0 7680
>[ 2962.395826] [drm:intel_crtc_mode_set] [ENCODER:23:TMDS-23] set [MODE:0:1920x1080]
>[ 2962.395827] [drm:intel_ddi_mode_set] Preparing DDI mode on port D, pipe A
>[ 2962.395828] [drm:intel_ddi_mode_set] HDMI audio on pipe A on DDI
>[ 2962.395828] [drm:intel_ddi_mode_set] HDMI audio: write eld information
>[ 2962.395829] [drm:intel_write_eld] ELD on [CONNECTOR:24:HDMI-A-3], [ENCODER:23:TMDS-23]
>[ 2962.395830] [drm:haswell_write_eld] HDMI audio: enable codec
>[ 2962.395832] [drm:haswell_write_eld] HDMI audio: pin eld vld status=0x00000004
>[ 2962.395833] [drm:haswell_write_eld] HDMI audio: eld vld status=0x00000005
>[ 2962.395834] [drm:haswell_write_eld] HDMI audio: audio conf: 0x0071fa60
>[ 2962.395835] [drm:haswell_write_eld] ELD on pipe A
>[ 2962.395836] [drm:audio_config_hdmi_pixel_clock] Configuring HDMI audio for pixel clock 148500 (0x00090000)
>[ 2962.413731] [drm:intel_update_fbc] framebuffer not tiled or fenced, disabling compression
>[ 2962.413745] [drm:intel_connector_check_state] [CONNECTOR:24:HDMI-A-3]
>[ 2962.413746] [drm:check_encoder_state] [ENCODER:14:DAC-14]
>[ 2962.413748] [drm:check_encoder_state] [ENCODER:15:TMDS-15]
>[ 2962.413749] [drm:check_encoder_state] [ENCODER:20:TMDS-20]
>[ 2962.413750] [drm:check_encoder_state] [ENCODER:23:TMDS-23]
>[ 2962.413751] [drm:check_crtc_state] [CRTC:5]
>[ 2962.413759] [drm:check_crtc_state] [CRTC:8]
>[ 2962.413761] [drm:check_crtc_state] [CRTC:11]
>[ 2962.413768] [drm:intel_crtc_cursor_set] cursor off
>[ 2962.413769] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[ 2962.413790] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[ 2962.413791] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:5]
>[ 2962.413795] [drm:intel_crtc_cursor_set] cursor off
>[ 2962.413796] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2962.413814] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=0, fb_changed=0
>[ 2962.413815] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:5]
>[ 2962.413821] [drm:intel_crtc_set_config] [CRTC:5] [FB:52] #connectors=1 (x y) (0 0)
>[ 2962.413840] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[ 2962.413841] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:5]
>[ 2962.413853] [drm:intel_crtc_set_config] [CRTC:5] [FB:52] #connectors=1 (x y) (0 0)
>[ 2962.413872] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[ 2962.413873] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:5]
>[ 2962.419092] [drm:intel_crtc_cursor_set] cursor off
>[ 2962.419096] [drm:intel_crtc_set_config] [CRTC:5] [FB:52] #connectors=1 (x y) (0 0)
>[ 2962.419115] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[ 2962.419117] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:5]
>[ 2962.419122] [drm:intel_crtc_cursor_set] cursor off
>[ 2962.419123] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[ 2962.419142] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[ 2962.419143] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:5]
>[ 2962.419148] [drm:intel_crtc_cursor_set] cursor off
>[ 2962.419150] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[ 2962.419168] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=0, fb_changed=0
>[ 2962.419169] [drm:intel_modeset_stage_output_state] [CONNECTOR:24:HDMI-A-3] to [CRTC:5]

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Attachments on bug 77709: 97659 | 97660

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