Bug 101744

Summary:	32 bit PCI domain limits cause breakage on Azure
Product:	xorg	Reporter:	Stephen Hemminger <stephen>
Component:	Lib/pciaccess	Assignee:	Xorg Project Team <xorg-team>
Status:	RESOLVED MOVED	QA Contact:	Xorg Project Team <xorg-team>
Severity:	normal
Priority:	medium
Version:	unspecified
Hardware:	x86-64 (AMD64)
OS:	Linux (All)
Whiteboard:
i915 platform:		i915 features:

Description Stephen Hemminger 2017-07-10 18:32:02 UTC

On Microsoft Azure, a PCI device passed through to guest (such as a GPU) will have a 32 PCI domain value. This is done so that the PCI device will not conflict with ACPI PCI buses.

The kernel and pci-utils already support 32 bit domain values.

Comment 1 GitLab Migration User 2018-08-10 20:19:00 UTC

-- GitLab Migration Automatic Message --

This bug has been migrated to freedesktop.org's GitLab instance and has been closed from further activity.

You can subscribe and participate further through the new bug through this link to our GitLab instance: https://gitlab.freedesktop.org/xorg/lib/libpciaccess/issues/10.

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