Bug 103168

Summary:	[CI] igt@prime_mmap_coherency@write - fail - Failed assertion: !(stale)
Product:	DRI	Reporter:	Marta Löfstedt <marta.lofstedt>
Component:	IGT	Assignee:	Default DRI bug account <dri-devel>
Status:	CLOSED WORKSFORME	QA Contact:
Severity:	critical
Priority:	high	CC:	intel-gfx-bugs
Version:	DRI git
Hardware:	Other
OS:	All
Whiteboard:	ReadyForDev
i915 platform:	BXT	i915 features:	GEM/Other

Description Marta Löfstedt 2017-10-09 12:52:47 UTC

(prime_mmap_coherency:1442) CRITICAL: Test assertion failure function main, file prime_mmap_coherency.c:330:
(prime_mmap_coherency:1442) CRITICAL: Failed assertion: !(!stale)
(prime_mmap_coherency:1442) CRITICAL: couldn't find any stale cache lines
Subtest write-and-fail failed.

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3191/shard-apl4/igt@prime_mmap_coherency@write-and-fail.html

Comment 1 Chris Wilson 2017-10-09 12:56:30 UTC

Just a silliness in the test to assume it was able to hit the cache coherency issue.

Comment 2 Marta Löfstedt 2017-10-18 11:08:44 UTC

Also, GLK-shards fail on igt@prime_mmap_coherency@write

(prime_mmap_coherency:1627) CRITICAL: Test assertion failure function main, file prime_mmap_coherency.c:302:
(prime_mmap_coherency:1627) CRITICAL: Failed assertion: !(stale)
(prime_mmap_coherency:1627) CRITICAL: num of stale cache lines 304
Subtest write failed.
**** DEBUG ****
(prime_mmap_coherency:1627) DEBUG: Test requirement passed: !(errno == EINVAL)

https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3255/shard-glkb4/igt@prime_mmap_coherency@write.html

Comment 3 Chris Wilson 2017-10-18 11:15:09 UTC

Test removed in

commit 22fdae38cbad3794a315bfd8d9fd833eba4a35dc
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Wed Oct 11 10:51:22 2017 +0100

    igt/prime_mmap_coherency: Only assert correct usage of sync API
    
    Ignore the unexpected success when the CPU cache is randomly flushed
    that makes !llc appear to work without sync. It happens, the cpu cache
    is a fickle beast that we do not have sole control over. Instead limit
    the test to detect failures when the API is being adhered to.

Comment 4 Marta Löfstedt 2017-10-18 13:58:40 UTC

(In reply to Chris Wilson from comment #3)
> Test removed in
> 
> commit 22fdae38cbad3794a315bfd8d9fd833eba4a35dc
> Author: Chris Wilson <chris@chris-wilson.co.uk>
> Date:   Wed Oct 11 10:51:22 2017 +0100
> 
>     igt/prime_mmap_coherency: Only assert correct usage of sync API
>     
>     Ignore the unexpected success when the CPU cache is randomly flushed
>     that makes !llc appear to work without sync. It happens, the cpu cache
>     is a fickle beast that we do not have sole control over. Instead limit
>     the test to detect failures when the API is being adhered to.
>
I agree that:
igt@prime_mmap_coherency@write-and-fail
is skipped from CI_DRM_3254 on APL-shards. However, before I realized this I had already filed igt@prime_mmap_coherency@write for GLK-shards on this bug.
The currently latest occurrence of igt@prime_mmap_coherency@write issue is on:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3256/shard-glkb3/igt@prime_mmap_coherency@write.html
which is after the patch was merged.

Comment 5 Marta Löfstedt 2017-12-08 07:52:45 UTC

last seen CI_DRM_3320: 2017-11-08 / 189 runs ago I will close and archive

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.