Bug 105067

Summary: Tesselation broken for dEQP tests
Product: Mesa Reporter: Mark Janes <mark.a.janes>
Component: Drivers/DRI/i965Assignee: Intel 3D Bugs Mailing List <intel-3d-bugs>
Status: RESOLVED FIXED QA Contact: Intel 3D Bugs Mailing List <intel-3d-bugs>
Severity: normal    
Priority: medium CC: brianp
Version: git   
Hardware: Other   
OS: All   
Whiteboard:
i915 platform: i915 features:

Description Mark Janes 2018-02-13 01:55:51 UTC 
dozens of tests regressed on each i965 platform, eg:
dEQP-GLES31.functional.tessellation_geometry_interaction.feedback.tessellation_output_isolines_geometry_output_points

Standard Output

Testing isolines->lines primitive conversion with and without transform feedback.
Sending a patch of 4 vertices (2x2 uniform grid) to tessellation control shader.
Control shader emits a patch of 9 vertices (3x3 uniform grid).
Setting outer tessellation level = 3, inner = 3.
Primitive generator emits isolines
Geometry shader transforms emitted primitives to points
Reading back vertex positions of generated primitives using transform feedback.
Verifying rendered image and feedback vertices are consistent.
Rendering scene again with identical shader program, but without setting feedback varying. Expecting similar output image.
Rendering with transform feedback
Begin transform feedback with mode GL_POINTS
Calling drawArrays with mode GL_PATCHES
Verifying GL_PRIMITIVES_GENERATED, expecting 18
Error, GL_PRIMITIVES_GENERATED was 0


Bisected to:
commit e149a0253c12d103805230bc7bc0a36887c3b8df
Author: Marek Olšák <marek.olsak@amd.com>
Date:   Thu Nov 16 04:29:35 2017 +0100
    mesa,glsl,nir: reduce gl_state_index size to 2 bytes
    
    Let's use the new gl_state_index16 type everywhere and remove
    the typecasts.
    
    This helps reduce the size of gl_program_parameter.
    
    Reviewed-by: Brian Paul <brianp@vmware.com>
Comment 1 Marek Olšák 2018-02-13 03:41:31 UTC 
radeonsi passes the test. This is an Intel-specific issue. I recommend you try this:

diff --git a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
index 9c4fb22..10a4ff4 100644
--- a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
+++ b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
@@ -251,7 +251,7 @@ brw_nir_lower_patch_vertices_in_to_uniform(nir_shader *nir)
       if (var->data.location != SYSTEM_VALUE_VERTICES_IN)
          continue;
 
-      gl_state_index tokens[STATE_LENGTH] = {
+      gl_state_index16 tokens[STATE_LENGTH] = {
          STATE_INTERNAL,
          nir->info.stage == MESA_SHADER_TESS_CTRL ?
             STATE_TCS_PATCH_VERTICES_IN : STATE_TES_PATCH_VERTICES_IN,
Comment 2 Matt Turner 2018-02-13 05:27:28 UTC 
(In reply to Marek Olšák from comment #1)
> radeonsi passes the test. This is an Intel-specific issue.

One that you caused...? :)
Comment 3 Mark Janes 2018-02-13 08:28:10 UTC 
I've reverted a minimal set of the size optimization that were too small for i965.

f4ea2b2a9e99d93fbf36c3f0e5f6f384be3cdb89 contained several size reductions that broke our driver.  I spent some time figuring out which members were responsible for the various piglit failures before I gave up -- there was still a long list of broken tests.  I reverted the full patch, though there are likely several members that could use less storage.

Our CI is functional again, and developers can test their patches.

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.