Summary: | amdgpu cannot set 2560x1440@60 mode even though monitor,gpu and motherboard support it | ||||||||
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Product: | DRI | Reporter: | philipmorant | ||||||
Component: | DRM/AMDgpu | Assignee: | Default DRI bug account <dri-devel> | ||||||
Status: | RESOLVED NOTABUG | QA Contact: | |||||||
Severity: | normal | ||||||||
Priority: | medium | ||||||||
Version: | unspecified | ||||||||
Hardware: | x86-64 (AMD64) | ||||||||
OS: | Linux (All) | ||||||||
Whiteboard: | |||||||||
i915 platform: | i915 features: | ||||||||
Attachments: |
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Description
philipmorant
2018-03-16 00:00:46 UTC
Please attach your dmesg output. Note that Raven does not support dual-link DVI. There is only a single digital encoder connected to each connector on the motherboards. You need two encoders (one for each link) per connector to run dual link DVI. You need to use native DP or HDMI for high res modes. Will this work with an HDMI to DVI-D cable then ? (In reply to philipmorant from comment #2) > Will this work with an HDMI to DVI-D cable then ? No, DVI only supports up to 1920×1200 @ 60Hz with a single link. It doesn't matter if the output is HDMI or DVI as long as your monitor only supports DVI input. What you can use is either an active DP to dual DVI converter (probably rather expensive if such a thing even exists) or native DP/HDMI (if the monitor has connectors for that). Thanks for replies. My monitor is DVI DL only. My old Haswell i5 4670 with HD4600 graphics was also single link DVI only (https://communities.intel.com/thread/44135), and it worked at 60Hz. Could somebody please explain why haswell can do it but raven can't ? Otherwise I find myself assuming that the hardware is capable of DL DVI, just that the manufacturers aren't validating for it, ergo fixable in software. I understand if AMD object to coding for something that hasn't been validated (I'd do the same myself). Would it be possible alternatively to provide hints in log output or code comments or on a wiki somewhere, such that people in my position can hack the source themselves ? Secondly, even accepting the single link limitation, shouldn't it be possible to run at 33 refresh rate ? I tried at 30 and got nothing. Thirdly, why does amdgpu refer to the connection as HDMI-A-3 ? There's no HDMI in the setup at all. (In reply to Christian König from comment #3) > What you can use is either an active DP to dual DVI converter (probably > rather expensive if such a thing even exists) or native DP/HDMI (if the > monitor has connectors for that). They are actually relatively common for just these sorts of scenarios. Not sure about cost however. (In reply to philipmorant from comment #4) > Thanks for replies. My monitor is DVI DL only. > > My old Haswell i5 4670 with HD4600 graphics was also single link DVI only > (https://communities.intel.com/thread/44135), and it worked at 60Hz. Could > somebody please explain why haswell can do it but raven can't ? I'm not sure how the intel hw is designed. I can't comment on exactly what is happening. I suspect what is happening is that the intel driver is not validating the link requirements and treating the DVI port like HDMI and sending the high bandwidth mode over a single TMDS link. The monitor just happens to accept it. > > Otherwise I find myself assuming that the hardware is capable of DL DVI, > just that the manufacturers aren't validating for it, ergo fixable in > software. No. DL DVI requires two digital transmitters, one for each TMDS link. We only wire a single transmitter to each physical connector. For DL DVI, you need two transmitters connected to the physical connector. > > I understand if AMD object to coding for something that hasn't been > validated (I'd do the same myself). Would it be possible alternatively to > provide hints in log output or code comments or on a wiki somewhere, such > that people in my position can hack the source themselves ? You could try hacking the driver to treat the monitor as HDMI even through it's DL DVI. Maybe your monitor will accept the timing over a single TMDS link. > > Secondly, even accepting the single link limitation, shouldn't it be > possible to run at 33 refresh rate ? I tried at 30 and got nothing. > It depends on the hardware and the panel in the monitor. The monitor hardware may not like 30 Hz refresh rates. > Thirdly, why does amdgpu refer to the connection as HDMI-A-3 ? There's no > HDMI in the setup at all. The display connectors are read from a table in the bios and are determined by the OEM that designs the board. It our case the OEM seems to have set it up as 3 HDMI connectors and a DP connector. What physical connectors are actually on the board? (In reply to Alex Deucher from comment #5) > (In reply to Christian König from comment #3) > > What you can use is either an active DP to dual DVI converter (probably > > rather expensive if such a thing even exists) or native DP/HDMI (if the > > monitor has connectors for that). > > They are actually relatively common for just these sorts of scenarios. Not > sure about cost however. > > (In reply to philipmorant from comment #4) > > Thanks for replies. My monitor is DVI DL only. > > > > My old Haswell i5 4670 with HD4600 graphics was also single link DVI only > > (https://communities.intel.com/thread/44135), and it worked at 60Hz. Could > > somebody please explain why haswell can do it but raven can't ? > > I'm not sure how the intel hw is designed. I can't comment on exactly what > is happening. I suspect what is happening is that the intel driver is not > validating the link requirements and treating the DVI port like HDMI and > sending the high bandwidth mode over a single TMDS link. The monitor just > happens to accept it. FYI in i915 we validate everything when enumerating the modes, but during a modeset we allow the user mode to exceed the DP++ dongle and sink limitations for just these sort of cases (source limitations we enforce always). The user has manually added the out-of-spec mode so presumably they know what they're doing... Also we can't reliably tell what kind of connector is present on the board so we treat DVI and HDMI the same. DP++ we treat a little special because we can't actually read out the state of the CONFIG1 pin so we can't tell whether a type1 DVI DP++ dongle is present or not. So if we can't read out the dongle registers and the connector *looks* like a DP++ in the video BIOS tables we assume the dongle to be present. But again the user can still override this by forcing an out-of-spec mode. There are 3 physical motherboard sockets: HDMI, DVI DL, and D-SUB. xrandr reports the D-SUB as DisplayPort-0. In kernel versions before 4.10 I used to have to hack the i915 code as follows (in intel_hdmi.c): @@ -849,7 +849,7 @@ static int hdmi_portclock_limit(struct intel_hdmi *hdmi, bool respect_dvi_limit) { struct drm_device *dev = intel_hdmi_to_dev(hdmi); - if ((respect_dvi_limit && !hdmi->has_hdmi_sink) || IS_G4X(dev)) + if (IS_G4X(dev)) return 165000; else if (IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8) return 300000; After 4.10 came out the hack became unnecessary. (In reply to philipmorant from comment #4) > I understand if AMD object to coding for something that hasn't been > validated (I'd do the same myself). Would it be possible alternatively to > provide hints in log output or code comments or on a wiki somewhere, such > that people in my position can hack the source themselves ? The easiest way to hack this is probably to double TMDS_MAX_PIXEL_CLOCK in amd/display/include/signal_types.h from 165000 to 330000. Created attachment 138199 [details]
syslog for xrandr --addmode with drm.debug-0xe and TDMS_MAX_PIXEL_CLOCK 330000
Created attachment 138200 [details]
syslog for xrandr --output with drm.debug-0xe and TDMS_MAX_PIXEL_CLOCK 330000
#TDMS_MAX_PIXEL_CLOCK 330000 makes no difference. See syslog files attached above. static int amdgpu_connector_dvi_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) has a hard-coded 165000 and looks likely. I'll try hacking that to bits. No, that's not it either. Apparently it's not going through amdgpu_connector_dvi_mode_valid(). My trace output (using DRM_ERROR()) does not appear in syslog. (In reply to philipmorant from comment #13) > No, that's not it either. Apparently it's not going through > amdgpu_connector_dvi_mode_valid(). My trace output (using DRM_ERROR()) does > not appear in syslog. That's the legacy pre-DC code. |
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