Summary: | [CI]igt@kms_* - incomplete - last line i dmesg :[drm:i915_fifo_underrun_reset_write [i915]] Re-arming FIFO underruns on pipe A | ||
---|---|---|---|
Product: | DRI | Reporter: | Marta Löfstedt <marta.lofstedt> |
Component: | DRM/Intel | Assignee: | Intel GFX Bugs mailing list <intel-gfx-bugs> |
Status: | CLOSED WORKSFORME | QA Contact: | Intel GFX Bugs mailing list <intel-gfx-bugs> |
Severity: | normal | ||
Priority: | high | CC: | intel-gfx-bugs |
Version: | DRI git | ||
Hardware: | Other | ||
OS: | All | ||
Whiteboard: | ReadyForDev | ||
i915 platform: | KBL | i915 features: | display/Other |
Bug Depends on: | |||
Bug Blocks: | 105980 |
Description
Marta Löfstedt
2018-04-13 07:34:40 UTC
I put this on a specific bug due to last dmesg: Re-arming FIFO underruns on pipe A if from new feature to re-set the FIFO underrun to be able to re-enable FBC, that was added with: commit d52ad9cb9d6d3b696d6b7ad20a381a8f5520ea03 Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Date: Wed Mar 28 12:05:26 2018 +0200 drm/i915: Add debugfs file to clear FIFO underruns. https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4058/shard-glkb4/igt@kms_atomic_transition@plane-all-transition.html <7>[ 530.159294] [drm:i915_fifo_underrun_reset_write [i915]] Re-arming FIFO underruns on pipe A then last dmesg: <6>[ 532.692727] Console: switching to colour frame buffer device 400x112 <6>[ 532.904364] Console: switching to colour dummy device 80x25 <7>[ 532.904460] [IGT] kms_atomic_transition: executing https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_22/fi-skl-6770hq/igt@kms_frontbuffer_tracking@fbc-1p-rte.html Last dmesg: <7>[ 901.458499] [drm:i915_fifo_underrun_reset_write [i915]] Re-arming FIFO underruns on pipe B Not seen for 4 weeks. Resolving. |
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