|Summary:||r600/sb: optimizer tries to schedule access to different array elements in one instruction group|
|Product:||Mesa||Reporter:||Gert Wollny <gw.fossdev>|
|Status:||RESOLVED FIXED||QA Contact:||mesa-dev|
|i915 platform:||i915 features:|
|Attachments:||piglit test that triggers the faulty behaviour|
Description Gert Wollny 2018-04-20 22:48:08 UTC
Created attachment 138964 [details] piglit test that triggers the faulty behaviour The attached piglit test will run through in release mode, because sb bails out in the post_scheduler: ##post_scheduler: unscheduled pending instructions :MOV R6.x.1F, 0.5|3f000000 MOV R5.x.1F, 0|00000000 MOV R3.x.1F, 1|3f800000 sb: error (1) in the post_scheduler pass. sb: using unoptimized bytecode... Obviously it would be preferable if sb would generate proper code instead. Also in debug mode an assertion will fail at this point. It is another incarnation of #103142, but I think it is better to open this as a new bug.
Comment 1 Gert Wollny 2018-06-03 11:32:30 UTC
A patch fixing this has been submitted to the ML: https://patchwork.freedesktop.org/series/44053/
Comment 2 mirh 2018-08-03 11:46:11 UTC
This.. seems to have been fixed, I think? My own case at least does.
Comment 3 Gert Wollny 2018-08-03 12:35:57 UTC
Yes, fixed with eebb65258d15af2b2fc50d3b64b5d2eafbffcb47 r600/sb: give the scheduler more margin to find valid instructions groups