Bug 107382

Summary: [CI][BAT] igt@*(s3|suspend|s4|hibernate)* - dmesg-warn - *ERROR* power well DC off state mismatch (refcount 0/enabled 1)
Product: DRI Reporter: Martin Peres <martin.peres>
Component: DRM/IntelAssignee: anusha <anusha.srivatsa>
Status: CLOSED FIXED QA Contact: Intel GFX Bugs mailing list <intel-gfx-bugs>
Severity: normal    
Priority: high CC: intel-gfx-bugs, tomi.p.sarvela
Version: XOrg git   
Hardware: Other   
OS: All   
Whiteboard: ReadyForDev
i915 platform: ICL i915 features: power/Other

Comment 1 Chris Wilson 2018-08-14 14:21:28 UTC
See https://patchwork.freedesktop.org/patch/244251/
Comment 2 Imre Deak 2018-08-14 14:52:00 UTC
(In reply to Chris Wilson from comment #1)
> See https://patchwork.freedesktop.org/patch/244251/

Hm, how? I think the problem is that we depend on HAS_CSR being 1 on platforms with a DC_OFF powerwell (even if the FW won't load), otherwise we'll try to toggle DC_OFF which is incorrect if the FW is not loaded. So:

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index e931b48369dd..bbd331f1d5d9 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -600,7 +600,7 @@ static const struct intel_device_info intel_cannonlake_info = {
 	GEN10_FEATURES, \
 	GEN(11), \
 	.ddb_size = 2048, \
-	.has_csr = 0, \
+	.has_csr = 1, \
 	.has_logical_ring_elsq = 1
 
 static const struct intel_device_info intel_icelake_11_info = {
Comment 3 Chris Wilson 2018-08-14 15:01:36 UTC
I was having fun with powerwells accessing HAS_CSR before dev_info was set.
Comment 4 Imre Deak 2018-08-14 15:58:53 UTC
(In reply to Chris Wilson from comment #3)
> I was having fun with powerwells accessing HAS_CSR before dev_info was set.

Ok, AFAICS the issue here could result only from intel_dp_get/put which shouldn't happen until after intel_power_domains_init_hw(). Checking now if .has_csr=1 fixes it.
Comment 5 Imre Deak 2018-08-16 13:41:13 UTC
*** Bug 107591 has been marked as a duplicate of this bug. ***
Comment 6 Jani Saarinen 2018-08-20 07:19:24 UTC
author	Anusha Srivatsa <anusha.srivatsa@intel.com>
committer	Rodrigo Vivi <rodrigo.vivi@intel.com>	
commit	da4468a1aa75457e6134127b19761b7ba62ce945 (patch)
tree	0c3428de8c9352642fb0f9fb479b40934f46010f
parent	66fc82960c5c68eecdcf4568e5907d3702e4fcdc (diff)
Comment 7 Martin Peres 2018-09-03 11:29:43 UTC
(In reply to Jani Saarinen from comment #6)
> author	Anusha Srivatsa <anusha.srivatsa@intel.com>
> committer	Rodrigo Vivi <rodrigo.vivi@intel.com>	
> commit	da4468a1aa75457e6134127b19761b7ba62ce945 (patch)
> tree	0c3428de8c9352642fb0f9fb479b40934f46010f
> parent	66fc82960c5c68eecdcf4568e5907d3702e4fcdc (diff)

It indeed fixed it! Thanks!

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