| Summary: | [CI][BAT] igt@drv_selftest@live_hugepages - dmesg-fail - igt_ppgtt_internal_huge failed with error -22 | ||
|---|---|---|---|
| Product: | DRI | Reporter: | Martin Peres <martin.peres> |
| Component: | DRM/Intel | Assignee: | Intel GFX Bugs mailing list <intel-gfx-bugs> |
| Status: | CLOSED FIXED | QA Contact: | Intel GFX Bugs mailing list <intel-gfx-bugs> |
| Severity: | normal | ||
| Priority: | medium | CC: | intel-gfx-bugs |
| Version: | XOrg git | ||
| Hardware: | Other | ||
| OS: | All | ||
| Whiteboard: | ReadyForDev | ||
| i915 platform: | BYT | i915 features: | GEM/PPGTT |
|
Description
Martin Peres
2018-08-06 14:20:01 UTC
<7>[ 710.756031] missed_breadcrumb bcs0 missed breadcrumb at intel_breadcrumbs_hangcheck+0x51/0x70 [i915] <7>[ 710.756104] missed_breadcrumb current seqno 2, last 3, hangcheck 0 [1816 ms] <7>[ 710.756111] missed_breadcrumb Reset count: 0 (global 0) <7>[ 710.756119] missed_breadcrumb Requests: <7>[ 710.756138] missed_breadcrumb first 3 [b8:3] @ 1788ms: bcs0 <7>[ 710.756144] missed_breadcrumb last 3 [b8:3] @ 1788ms: bcs0 <7>[ 710.756173] missed_breadcrumb active 3 [b8:3] @ 1790ms: bcs0 <7>[ 710.756180] missed_breadcrumb ring->start: 0x00022000 <7>[ 710.756185] missed_breadcrumb ring->head: 0x000000e0 <7>[ 710.756191] missed_breadcrumb ring->tail: 0x00000158 <7>[ 710.756197] missed_breadcrumb ring->emit: 0x00000158 <7>[ 710.756204] missed_breadcrumb ring->space: 0x0001fe68 <7>[ 710.756211] missed_breadcrumb [head 00e0, postfix 0130, tail 0158, batch 0xffffffff_ffffffff]: <7>[ 710.756247] missed_breadcrumb [0000] 13244001 00000104 00000000 00000000 11000001 00022220 ffffffff 11000001 <7>[ 710.756256] missed_breadcrumb [0020] 00022228 00070000 12400001 00022228 7fffc000 00000000 18800100 00010000 <7>[ 710.756270] missed_breadcrumb [0040] 13204001 00000104 00000000 00000000 11000001 00002044 00000003 11000001 <7>[ 710.756277] missed_breadcrumb [0060] 00012040 00000003 10800001 000000c0 00000003 01000000 <7>[ 710.756952] missed_breadcrumb RING_START: 0x00022000 <7>[ 710.756961] missed_breadcrumb RING_HEAD: 0x00000120 <7>[ 710.756967] missed_breadcrumb RING_TAIL: 0x00000158 <7>[ 710.756974] missed_breadcrumb RING_CTL: 0x0001f001 <7>[ 710.756981] missed_breadcrumb RING_MODE: 0x00000000 <7>[ 710.756987] missed_breadcrumb RING_IMR: ffbfffff <7>[ 710.756993] missed_breadcrumb SYNC_0: 0x00000002 <7>[ 710.756999] missed_breadcrumb SYNC_1: 0x00000002 <7>[ 710.757005] missed_breadcrumb ACTHD: 0x00000000_34514548 <7>[ 710.757014] missed_breadcrumb BBADDR: 0x00000000_34515541 <7>[ 710.757020] missed_breadcrumb DMA_FADDR: 0x00000000_34516380 <7>[ 710.757026] missed_breadcrumb IPEIR: 0x00000008 <7>[ 710.757032] missed_breadcrumb IPEHR: 0x00000000 <7>[ 710.757037] missed_breadcrumb PP_DIR_BASE: 0x00070000 <7>[ 710.757043] missed_breadcrumb PP_DIR_BASE_READ: 0x00000000 <7>[ 710.757049] missed_breadcrumb PP_DIR_DCLV: 0xffffffff <7>[ 710.757105] missed_breadcrumb E 3 [b8:3] @ 1790ms: bcs0 <7>[ 710.757185] missed_breadcrumb Queue priority: -2147483648 <7>[ 710.757247] missed_breadcrumb drv_selftest [8275] waiting for 3 <7>[ 710.757326] missed_breadcrumb IRQ? 0x0 (breadcrumbs? no) <7>[ 710.757333] missed_breadcrumb HWSP: <7>[ 710.757341] missed_breadcrumb [0000] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 <7>[ 710.757345] missed_breadcrumb * <7>[ 710.757352] missed_breadcrumb [00c0] 00000002 00000000 00000000 00000000 00000000 00000000 00000000 00000000 <7>[ 710.757359] missed_breadcrumb [00e0] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 <7>[ 710.757363] missed_breadcrumb * <7>[ 710.757369] missed_breadcrumb Idle? no Is saying that we didn't end up in our batch. commit e6a59382924e2d007b554a2aebcd4445ebb01fef (HEAD -> drm-intel-next-queued, drm-intel/drm-intel-next-queued) Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Mon Aug 6 15:46:04 2018 +0100 drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start Experience teaches us over and over again that coherency on Baytrail requires the odd heavy hammer, and in particular clflush alone is not enough to guarrantee that writes from the CPU are picked up by the CS. Do as we do elsewhere and ensure we have an unconditional i915_gem_chipset_flush() after writing to memory and submitting a batch to HW. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107499 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180806144604.8346-1-chris@chris-wilson.co.uk Tests showing all green, closing Last seen 3 weeks before, Closing the bug. This issue occurred only once 117 rounds ago. No issues noticed recently. Closing this bug. |
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