Bug 111390

Summary: [CI][SHARDS] igt@kms_* - dmesg-warn - KSV list failed to become ready (-110)
Product: DRI Reporter: Martin Peres <martin.peres>
Component: IGTAssignee: Ramalingam C <ramalingam.c>
Status: RESOLVED FIXED QA Contact:
Severity: normal    
Priority: high    
Version: XOrg git   
Hardware: Other   
OS: All   
Whiteboard: ReadyForDev
i915 platform: i915 features:

Description Martin Peres 2019-08-13 07:09:18 UTC
It seems like we are attempting to use HDCP in tests that do not need content protection:

https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5128/shard-apl7/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html

<7> [1747.235381] [drm:intel_hdcp_auth [i915]] KSV list failed to become ready (-110)
<7> [1747.235601] [drm:_intel_hdcp_enable [i915]] HDCP Auth failure (-110)
<7> [1747.235754] [drm:_intel_hdcp_disable [i915]] [DP-1:100] HDCP is being disabled...
<7> [1747.238782] [drm:_intel_hdcp_disable [i915]] HDCP is disabled

Please make sure HDCP is disabled in KMS tests which are not content-protection related.
Comment 1 CI Bug Log 2019-08-13 07:18:00 UTC
The CI Bug Log issue associated to this bug has been updated.

### New filters associated

* APL KBL: random kms tests - dmesg-warn - KSV list failed to become ready (-110)
  - https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5128/shard-apl7/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5128/shard-kbl1/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6687/shard-apl3/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13987/shard-apl1/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13987/shard-kbl4/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13988/shard-apl3/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13988/shard-kbl4/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_4766/shard-apl5/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_4766/shard-kbl2/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5129/shard-kbl3/igt@kms_cursor_crc@pipe-a-cursor-dpms.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13989/shard-apl4/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13989/shard-kbl7/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13990/shard-apl4/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13990/shard-kbl3/igt@kms_plane@plane-position-hole-dpms-pipe-b-planes.html
  - https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6688/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-dpms.html
Comment 2 Ramalingam C 2019-08-13 07:56:51 UTC
Looks like once again failure exit path is broken again!
Comment 3 Ramalingam C 2019-08-13 10:59:03 UTC
This should be the sufficient https://patchwork.freedesktop.org/series/65122/
Comment 4 Petri Latvala 2019-08-14 09:54:48 UTC
commit f50ce93c889c4fdc1fd63fd77626a96afd8388a3
Author: Ramalingam C <ramalingam.c@intel.com>
Date:   Tue Aug 13 13:30:10 2019 +0530

    lib/display_require: reset hdcp on all connectors
    
    At the start of every test, reset HDCP state to UNDESIRED on all
    connectors, so that we will not have any hdcp related noises in
    the subsequent tests.
    
    v2:
      igt_output_set_prop_enum is used.
      Documentation of display_reset is updated.
    
    Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111390
    Reviewed-by: Simon Ser <simon.ser@intel.com>
    Reviewed-by: Petri Latvala <petri.latvala@intel.com>

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