Bug 111432

Summary: [bisected][tonga] Boot failures on agd5f's drm-next branch
Product: DRI Reporter: Mike Lothian <mike>
Component: DRM/AMDgpuAssignee: Default DRI bug account <dri-devel>
Status: RESOLVED FIXED QA Contact:
Severity: normal    
Priority: medium CC: mike, sunpeng.li
Version: DRI git   
Hardware: Other   
OS: All   
Whiteboard:
i915 platform: i915 features:
Attachments:
Description Flags
Wont Boot
none
Fix calc_pll_max_vco_construct none

Description Mike Lothian 2019-08-19 19:17:07 UTC
Created attachment 145104 [details]
Wont Boot

I've since compiled amdgpu as a module to get the following dmesg:

X still doesn't start, I've not had time to bisect yet
Comment 1 Mike Lothian 2019-08-19 19:17:50 UTC
Just to be clear the machine doesn't boot when amdgpu is compiled in, it does boot when it's as a module but doesn't behave correctly after the module has been loaded
Comment 2 Mike Lothian 2019-08-20 13:53:22 UTC
I've bisected this to:

9adc8050bf3ca3e49c65e13259a4c310640542f1 is the first bad commit
commit 9adc8050bf3ca3e49c65e13259a4c310640542f1
Author: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Date:   Fri Jul 12 15:06:06 2019 -0400

    drm/amd/display: make firmware info only load once during dc_bios create

    Currently every time DC wants to access firmware info we make a call
    into VBIOS. This makes no sense as there is nothing that can change
    runtime inside fw info and can cause issues when calling unstable
    bios during bringup.

    This change eliminate this behavior by only calling bios once for fw
    info and keeping it stored as part of dc_bios.

    Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
    Reviewed-by: Chris Park <Chris.Park@amd.com>
    Acked-by: Leo Li <sunpeng.li@amd.com>
    Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

 drivers/gpu/drm/amd/display/dc/bios/bios_parser.c  |  3 +-
 drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c |  3 +-
 .../amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c    | 17 ++++--------
 .../drm/amd/display/dc/clk_mgr/dcn10/rv1_clk_mgr.c |  6 ++--
 drivers/gpu/drm/amd/display/dc/core/dc_resource.c  |  7 ++---
 drivers/gpu/drm/amd/display/dc/dc_bios_types.h     |  5 ++--
 .../gpu/drm/amd/display/dc/dce/dce_clock_source.c  | 32 ++++++++--------------
 drivers/gpu/drm/amd/display/dc/dce/dce_i2c_hw.c    | 13 +--------
 .../drm/amd/display/dc/dce100/dce100_resource.c    |  4 +--
 .../drm/amd/display/dc/dce110/dce110_resource.c    |  4 +--
 .../gpu/drm/amd/display/dc/dce80/dce80_resource.c  | 12 ++------
 drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c |  9 +++---
 12 files changed, 36 insertions(+), 79 deletions(-)
Comment 3 Mike Lothian 2019-08-20 13:58:20 UTC
lspci:

00:00.0 Host bridge [0600]: Intel Corporation Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor Host Bridge/DRAM Registers [8086:1910] (rev 07)
00:01.0 PCI bridge [0604]: Intel Corporation Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor PCIe Controller (x16) [8086:1901] (rev 07)
00:02.0 VGA compatible controller [0300]: Intel Corporation HD Graphics 530 [8086:191b] (rev 06)
00:04.0 Signal processing controller [1180]: Intel Corporation Xeon E3-1200 v5/E3-1500 v5/6th Gen Core Processor Thermal Subsystem [8086:1903] (rev 07)
00:14.0 USB controller [0c03]: Intel Corporation 100 Series/C230 Series Chipset Family USB 3.0 xHCI Controller [8086:a12f] (rev 31)
00:14.2 Signal processing controller [1180]: Intel Corporation 100 Series/C230 Series Chipset Family Thermal Subsystem [8086:a131] (rev 31)
00:16.0 Communication controller [0780]: Intel Corporation 100 Series/C230 Series Chipset Family MEI Controller #1 [8086:a13a] (rev 31)
00:17.0 SATA controller [0106]: Intel Corporation HM170/QM170 Chipset SATA Controller [AHCI Mode] [8086:a103] (rev 31)
00:1c.0 PCI bridge [0604]: Intel Corporation 100 Series/C230 Series Chipset Family PCI Express Root Port #1 [8086:a110] (rev f1)
00:1c.4 PCI bridge [0604]: Intel Corporation 100 Series/C230 Series Chipset Family PCI Express Root Port #5 [8086:a114] (rev f1)
00:1c.5 PCI bridge [0604]: Intel Corporation 100 Series/C230 Series Chipset Family PCI Express Root Port #6 [8086:a115] (rev f1)
00:1c.6 PCI bridge [0604]: Intel Corporation 100 Series/C230 Series Chipset Family PCI Express Root Port #7 [8086:a116] (rev f1)
00:1d.0 PCI bridge [0604]: Intel Corporation 100 Series/C230 Series Chipset Family PCI Express Root Port #9 [8086:a118] (rev f1)
00:1f.0 ISA bridge [0601]: Intel Corporation HM170 Chipset LPC/eSPI Controller [8086:a14e] (rev 31)
00:1f.2 Memory controller [0580]: Intel Corporation 100 Series/C230 Series Chipset Family Power Management Controller [8086:a121] (rev 31)
00:1f.3 Audio device [0403]: Intel Corporation 100 Series/C230 Series Chipset Family HD Audio Controller [8086:a170] (rev 31)
00:1f.4 SMBus [0c05]: Intel Corporation 100 Series/C230 Series Chipset Family SMBus [8086:a123] (rev 31)
01:00.0 Display controller [0380]: Advanced Micro Devices, Inc. [AMD/ATI] Amethyst XT [Radeon R9 M295X] [1002:6921]
3b:00.0 Ethernet controller [0200]: Qualcomm Atheros Killer E2400 Gigabit Ethernet Controller [1969:e0a1] (rev 10)
3c:00.0 Network controller [0280]: Qualcomm Atheros QCA6174 802.11ac Wireless Network Adapter [168c:003e] (rev 32)
3d:00.0 Unassigned class [ff00]: Realtek Semiconductor Co., Ltd. RTS5227 PCI Express Card Reader [10ec:5227] (rev 01)
3e:00.0 Non-Volatile memory controller [0108]: Samsung Electronics Co Ltd NVMe SSD Controller SM951/PM951 [144d:a802] (rev 01)
Comment 4 Mike Lothian 2019-08-20 13:58:59 UTC
This is a PRIME laptop with both i915 & amdgpu graphics
Comment 5 Mike Lothian 2019-08-20 14:25:59 UTC
I've tried https://lore.kernel.org/patchwork/patch/1116218/ but it doesn't fix things either
Comment 6 Leo Li 2019-08-20 16:24:22 UTC
Created attachment 145106 [details] [review]
Fix calc_pll_max_vco_construct

Please give the attached patch a shot, should fix the issue. Lmk otherwise.
Comment 7 Mike Lothian 2019-08-21 00:36:35 UTC
That's it booting again, thanks

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