| Summary: | [CI][RESUME] igt@gem_exec_schedule@deep-* - incomplete - NMI watchdog | ||
|---|---|---|---|
| Product: | DRI | Reporter: | Martin Peres <martin.peres> |
| Component: | DRM/Intel | Assignee: | Intel GFX Bugs mailing list <intel-gfx-bugs> |
| Status: | RESOLVED FIXED | QA Contact: | Intel GFX Bugs mailing list <intel-gfx-bugs> |
| Severity: | not set | ||
| Priority: | high | CC: | intel-gfx-bugs |
| Version: | XOrg git | ||
| Hardware: | Other | ||
| OS: | All | ||
| Whiteboard: | |||
| i915 platform: | TGL | i915 features: | GEM/Other |
|
Description
Martin Peres
2019-09-12 10:24:59 UTC
The CI Bug Log issue associated to this bug has been updated. ### New filters associated * TGL: igt@gem_exec_schedule@deep-* - incomplete - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_366/fi-tgl-u/igt@gem_exec_schedule@deep-blt.html - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_366/fi-tgl-u/igt@gem_exec_schedule@deep-bsd1.html - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_365/fi-tgl-u/igt@gem_exec_schedule@deep-bsd2.html - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_365/fi-tgl-u/igt@gem_exec_schedule@deep-bsd1.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@gem_exec_schedule@deep-bsd2.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@gem_exec_schedule@deep-render.html - https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@gem_exec_schedule@deep-vebox.html - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_363/fi-tgl-u/igt@gem_exec_schedule@deep-blt.html - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_363/fi-tgl-u/igt@gem_exec_schedule@deep-render.html So it looks like it got caught in a loop in schedule. Given the GEM_BUG_ON(!node_signaled(dep->signaler)) we've seen in bug 111660, it's not completely out of the question for both to have the same root cause. Something is not happy with the execlists execution. Presuming commit c210e85b8f3371168ce78c8da00b913839a84ec7 (HEAD -> drm-intel-next-queued, drm-intel/drm-intel-next-queued) Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Tue Sep 17 13:30:55 2019 +0100 drm/i915/tgl: Extend MI_SEMAPHORE_WAIT On Tigerlake, MI_SEMAPHORE_WAIT grew an extra dword, so be sure to update the length field and emit that extra parameter and any padding noop as required. v2: Define the token shift while we are adding the updated MI_SEMAPHORE_WAIT v3: Use int instead of bool in the addition so that readers are not left wondering about the intricacies of the C spec. Now they just have to worry what the integer value of a boolean operation is... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Michal Winiarski <michal.winiarski@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190917123055.28965-1-chris@chris-wilson.co.uk is causing trouble here as well. |
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