Summary: |
Please add support for interlace TV resolutions on VGA port |
Product: |
xorg
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Reporter: |
Alistair Buxton <a.j.buxton> |
Component: |
Driver/intel | Assignee: |
MaLing <ling.ma> |
Status: |
RESOLVED
DUPLICATE
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QA Contact: |
Xorg Project Team <xorg-team> |
Severity: |
enhancement
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Priority: |
medium
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Version: |
unspecified | |
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Hardware: |
Other | |
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OS: |
All | |
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Whiteboard: |
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i915 platform:
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i915 features:
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Attachments: |
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Created attachment 26150 [details] register dump while running 768x576pali modeline. Current intel driver is not able to handle modelines such as: ModeLine "1024x576pali" 19.750 1024 1056 1152 1264 576 581 586 625 -hsync -vsync interlace # 16:9 ModeLine "720x576pali" 13.500 720 722 786 864 576 581 586 625 -hsync -vsync interlace # 4:3 DVB ModeLine "768x576pali" 14.750 768 789 858 944 576 581 586 625 -hsync -vsync interlace # Analogue There are two reasons. Dot clock is too low and interlace mode is not supported. However, the hardware supports it (at least 945 does.) By lowering the minimum dot clock and vco that the driver will accept (in i830_display.c) and by manually setting the pipe configuration to turn on interlace, I was able to use the above modelines. Basically all I changed: #define I9XX_DOT_MIN 1000 #define I9XX_VCO_MIN 930000 and added a call like: OUTREG(PIPEACONF, pI830->savePIPEACONF | PIPECONF_INTERLACE_W_FIELD_INDICATION);