| Summary: | [r600g] glean glsl1-shadow2D(): [1-4] regression | ||
|---|---|---|---|
| Product: | Mesa | Reporter: | Vinson Lee <vlee> |
| Component: | Drivers/Gallium/r600 | Assignee: | Default DRI bug account <dri-devel> |
| Status: | CLOSED FIXED | QA Contact: | |
| Severity: | critical | ||
| Priority: | medium | ||
| Version: | git | ||
| Hardware: | x86 (IA32) | ||
| OS: | Linux (All) | ||
| Whiteboard: | |||
| i915 platform: | i915 features: | ||
There are only 'skip'ped commits left to test. The first bad commit could be any of: 323ef3a1f07ba4333dadebab571ddcd49d95f45c 6e9b0f6807c7a22f096f483961ae71512f8d9f41 4c6d6dd8fc61239ac2008267f3c5cf76f4124d11 We cannot bisect more! bisect run cannot continue any more commit 323ef3a1f07ba4333dadebab571ddcd49d95f45c Author: Christian König <deathsimple@vodafone.de> Date: Fri Jan 14 18:46:11 2011 +0100 r600g: add more missing instructions to r600_bc_get_num_operands commit 6e9b0f6807c7a22f096f483961ae71512f8d9f41 Author: Kristian Høgsberg <krh@bitplanet.net> Date: Fri Jan 14 16:11:28 2011 -0500 gles2: Also support GL_BGRA_EXT for glTexSubImage2d commit 4c6d6dd8fc61239ac2008267f3c5cf76f4124d11 Author: Vinson Lee <vlee@vmware.com> Date: Fri Jan 14 13:47:37 2011 -0800 r600g: Disable V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR case. The usage of macro V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR was introduced by commit 323ef3a1f07ba4333dadebab571ddcd49d95f45c but the macro is undefined. Disable this case to fix the build for now. Fixed with commit a124490262a29d2e873fe50ca57974f246946b85 mesa: a124490262a29d2e873fe50ca57974f246946b85 (master) Verified fixed. |
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mesa: 568e0083651dd29e5bce94ade8625a64a0e85e88 (master) chipset: RV620 system architecture: i686 libdrm-dev: 2.14.21-1ubuntu2.1 kernel version: 2.6.35-24-generic Linux distribution: Ubuntu 10.10 i386 Run glean glsl1 'shadow2D(): 1' test. $ PIGLIT_TEST="shadow2D(): 1" ./bin/glean -r results -t glsl1 glsl1: Running single test: shadow2D(): 1 Segmentation fault (gdb) bt #0 r600_bc_add_alu_type (bc=0xa38338c, alu=0xbfe1687c, type=8) at src/gallium/drivers/r600/r600_asm.c:1134 #1 0x0107c2c5 in r600_bc_add_alu (bc=0xa38338c, alu=0xbfe1687c) at src/gallium/drivers/r600/r600_asm.c:1195 #2 0x01086280 in tgsi_tex (ctx=0xbfe16f74) at src/gallium/drivers/r600/r600_shader.c:1848 #3 0x01081d8b in r600_shader_from_tgsi (tokens=0xa385c70, shader=0xa383388, literals=0xbfe17588) at src/gallium/drivers/r600/r600_shader.c:600 #4 0x01080dec in r600_pipe_shader_create (ctx=0x9d4c690, shader=0xa383388, tokens=0xa385c70) at src/gallium/drivers/r600/r600_shader.c:246 #5 0x0106f119 in r600_create_shader_state (ctx=0x9d4c690, state=0xa218afc) at src/gallium/drivers/r600/r600_state_common.c:276 #6 0x011ca8ac in st_translate_fragment_program (st=0xa088020, stfp=0xa214860, key=0xbfe178b0) at src/mesa/state_tracker/st_program.c:625 #7 0x011ca9a3 in st_get_fp_variant (st=0xa088020, stfp=0xa214860, key=0xbfe178b0) at src/mesa/state_tracker/st_program.c:656 #8 0x0125f21c in update_fp (st=0xa088020) at src/mesa/state_tracker/st_atom_shader.c:86 #9 0x0125b18f in st_validate_state (st=0xa088020) at src/mesa/state_tracker/st_atom.c:196 #10 0x01266c71 in st_Clear (ctx=0xa048700, mask=17) at src/mesa/state_tracker/st_cb_clear.c:464 #11 0x011f0d08 in _mesa_Clear (mask=16640) at src/mesa/main/clear.c:242 #12 0x080efe96 in GLEAN::GLSLTest::testProgram(GLEAN::ShaderProgram const&) () #13 0x080f02f3 in GLEAN::GLSLTest::runOne(GLEAN::MultiTestResult&, GLEAN::Window&) () #14 0x080c591e in GLEAN::BaseTest<GLEAN::MultiTestResult>::run(GLEAN::Environment&) () #15 0x080bdc46 in main () (gdb) frame 0 #0 r600_bc_add_alu_type (bc=0xa38338c, alu=0xbfe1687c, type=8) at src/gallium/drivers/r600/r600_asm.c:1134 1134 r600_bc_special_constants( (gdb) l 1129 for (i = 0; i < 3; i++) { 1130 if (nalu->src[i].sel >= bc->ngpr && nalu->src[i].sel < 128) { 1131 bc->ngpr = nalu->src[i].sel + 1; 1132 } 1133 if (nalu->src[i].sel == V_SQ_ALU_SRC_LITERAL) 1134 r600_bc_special_constants( 1135 nalu->src[i].value[nalu->src[i].chan], 1136 &nalu->src[i].sel, &nalu->src[i].neg); 1137 } 1138 if (nalu->dst.sel >= bc->ngpr) { (gdb) print nalu->src[i].value $1 = (u32 *) 0x0