Bug 34110

Summary:	'high' profile does not set the engine and the memory clocks to the max value
Product:	DRI	Reporter:	darkbasic <darkbasic>
Component:	DRM/Radeon	Assignee:	Default DRI bug account <dri-devel>
Status:	RESOLVED NOTABUG	QA Contact:
Severity:	normal
Priority:	medium
Version:	XOrg git
Hardware:	Other
OS:	All
Whiteboard:
i915 platform:		i915 features:

Description darkbasic 2011-02-09 13:33:28 UTC

gentoo ~ # power-profile high
Power profile set to HIGH!
gentoo ~ # power-profile status
profile
default
default engine clock: 776000 kHz
current engine clock: 769500 kHz
default memory clock: 1126000 kHz
current memory clock: 1125000 kHz
voltage: 1300 mV
PCIE lanes: 16
gentoo ~ # power-profile low
Power profile set to LOW!
gentoo ~ # power-profile status
profile
low
default engine clock: 776000 kHz
current engine clock: 297000 kHz
default memory clock: 1126000 kHz
current memory clock: 1125000 kHz
voltage: 1258 mV
PCIE lanes: 16

Shouldn't it set the engine to 776000 and the memory to 1126000?

RV670 with R600g, 2.6.38-rc4, xorg-server-1.9.4, mesa git, libdrm git, xf86-video-ati git, pageflipping on, colortiling on, swapbufferwaits off.

Comment 1 Alex Deucher 2011-02-09 14:13:53 UTC

The values set are not always exactly the the same as the values in the table, they are as close a possible within the constraints of the pll dividers.

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