Bug 42806

Summary: [bisected] piglit fbo/fbo-alphatest-nocolor fails on Ironlake
Product: Mesa Reporter: fangxun <xunx.fang>
Component: Drivers/DRI/i965Assignee: Eric Anholt <eric>
Status: VERIFIED FIXED QA Contact:
Severity: normal    
Priority: medium CC: eric, stereotype441
Version: git   
Hardware: All   
OS: Linux (All)   
Whiteboard:
i915 platform: i915 features:
Bug Depends on:    
Bug Blocks: 42993    

Description fangxun 2011-11-10 22:04:28 UTC
System Environment:
--------------------------
Arch:           i386
Platform:       huronriver
Libdrm:         (master)2.4.27-1-g961bf9b5c2866ccb4fedf2b45b29fb688519d0db
Mesa:           (master)11a90af1ef6384b3ac7730d16db9a65b4a799466
Xserver:                (master)xorg-server-1.11.0-315-gf0d50cc6651dce3a8a3cd3fb84210aa92b139763
Xf86_video_intel:(master)2.16.901-108-ga72563464f53f24246379afcf1365206fae9aad3
Kernel:    (drm-intel-next)64a742fac3a22f57303d8f1b7e347350a1c48254

Bug detailed description:
------------------------- 
It fails on sandybridge and Ironlake. 
Bisect shows the first bad commit is 6d874d0ee18b3694c49e0206fa519bd8b746ec24.
commit 6d874d0ee18b3694c49e0206fa519bd8b746ec24
Author:     Eric Anholt <eric@anholt.net>
AuthorDate: Tue Nov 8 19:27:46 2011 -0800
Commit:     Eric Anholt <eric@anholt.net>
CommitDate: Wed Nov 9 12:59:20 2011 -0800

    i965/fs: Add support for user-defined out variables.

    Before, I was tracking the ir_variable * found for gl_FragColor or
    gl_FragData[].  Instead, when visiting those variables, set up an
    array of per-render-target fs_regs to copy the output data from.  This
    cleans up the color emit path, while making handling of multiple
    user-defined out variables easier.

    v2: incorporate idr's feedback about ir->location (changes by Kenneth Graunke)

    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>


Reproduce steps:
----------------
1. start X
2. ./fbo-alphatest-nocolor -auto
Comment 1 Gordon Jin 2011-11-22 16:26:40 UTC
Eric, comments?
Comment 2 Eric Anholt 2011-11-23 10:22:17 UTC
patch to be sent for review soon.
Comment 3 Eric Anholt 2011-11-30 13:44:48 UTC
commit 51e5a266c1e1c12c4f0d82bee3caff008a41c9fd
Author: Eric Anholt <eric@anholt.net>
Date:   Wed Nov 23 10:20:12 2011 -0800

    i965/fs: Fix regression in fbo-alphatest-nocolor.
    
    In the refactor for handling user-defined out params, we failed to set
    up the new color output tracking when there was no color drawbuffer in
    place but alpha testing was on.  Just always set up at least one when
    handling gl_FragColor, since we won't make use of its value unless we
    need to.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42806
Comment 4 fangxun 2011-12-20 00:51:12 UTC
It is fixed on sandybridge, but still fails on ironlake.
Comment 5 Paul Berry 2012-01-30 19:56:21 UTC
The Ironlake failure was an unrelated problem, and was fixed by:

commit a6dd4bf5fcce2520ab199201fdd1ad155457d781
Author: Chad Versace <chad.versace@linux.intel.com>
Date:   Tue Jan 17 15:41:46 2012 -0800

    i965/gen5: Fix rendering of depth buffers without stencil [v2]
    
    Fixes the following OGLConform tests on gen5:
        depth-stencil(misc.state_on.depth_int)
        fbo_db_ARBfp(basic.OnlyDepthBuffDrawBufferRender)
    
    The problem was that, if the depth buffer's Mesa format was X8_Z24, then
    we emitted the hardware format D24_UNORM_X8. But, on gen5, D24_UNORM_S8
    must be emitted.
    
    This bug was introduced by:
        commit d84a180417d1eabd680554970f1eaaa93abcd41e
        Author: Eric Anholt <eric@anholt.net>
        i965: Base HW depth format setup based on MESA_FORMAT, not bpp.
    
    v2: Deref 'intel' directly. Move the branch for newer chipset to top.
        Quote the PRM. As requested by Ken.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=43408
    Note: This is a candidate for the 8.0 branch.
    Reported-by: Xunx Fang <xunx.fang@intel.com>
    Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
    Signed-off-by: Chad Versace <chad.versace@linux.intel.com>
Comment 6 fangxun 2012-02-07 01:43:41 UTC
Verified with mesa master branch(84a1273e7fe) and 8.0 branch(65b500857ef).

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