Bug 50233

Summary:	[IVB, VLV] workaround: need DOP clock gating disable
Product:	DRI	Reporter:	Jesse Barnes <jbarnes>
Component:	DRM/Intel	Assignee:	Daniel Vetter <daniel>
Status:	CLOSED FIXED	QA Contact:
Severity:	normal
Priority:	medium	CC:	ben, chris, daniel, florian, jbarnes
Version:	XOrg git
Hardware:	Other
OS:	All
Whiteboard:
i915 platform:		i915 features:

Description Jesse Barnes 2012-05-22 13:44:33 UTC

Need to set bit 27 of 0xb034 to serialed URB reads to the same cacheline

Comment 1 Chris Wilson 2012-10-17 16:51:12 UTC

commit 61939d977d66951b04cfd4fbe75705614b98ecad
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date:   Tue Oct 2 17:43:38 2012 -0500

    drm/i915: implement WaForceL3Serialization on VLV and IVB
    
    References: https://bugs.freedesktop.org/show_bug.cgi?id=50250
    Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

Comment 2 Florian Mickler 2012-12-22 09:25:07 UTC

A patch referencing this bug report has been merged in Linux v3.8-rc1:

commit 8ab4397640de51f4a93845b09270ad717244ccb3
Author: Jesse Barnes <jbarnes@virtuousgeek.org>
Date:   Thu Oct 25 12:15:42 2012 -0700

    drm/i915: implement WaDisableDopClockGatingisable on VLV and IVB

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