Bug 60140

Summary: [SNB]igt/kms_flip/flip-vs-modeset-vs-hang causes system hung
Product: DRI Reporter: lu hua <huax.lu>
Component: DRM/IntelAssignee: Intel GFX Bugs mailing list <intel-gfx-bugs>
Status: CLOSED FIXED QA Contact: Intel GFX Bugs mailing list <intel-gfx-bugs>
Severity: major    
Priority: high CC: bingx.a.yan, florian, yangweix.shui
Version: unspecified   
Hardware: All   
OS: Linux (All)   
Whiteboard:
i915 platform: i915 features:
Attachments:
Description Flags
i915_error_state
none
igt-cannotrun.dmesg none

Description lu hua 2013-02-01 02:22:42 UTC
Created attachment 74029 [details]
i915_error_state

System Environment:
--------------------------
Arch:           i386
Platform:       sandybridge
Kernel: (drm-intel-next-queued)699c938d75d5e0e4b6173f40727def6bb788a39d
Some additional commit info:
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Wed Jan 30 15:59:56 2013 +0100

    drm/i915: don't run hsw power well code on !hsw

Bug detailed description:
-------------------------
It causes GPU hung on sandybridge. It happens on -queued kernel and -fixes kernel.
test commit:
(drm-intel-fixes)4518f611ba21ba165ea3714055938a8984a44ff9
(drm-intel-next-queued)699c938d75d5e0e4b6173f40727def6bb788a39d

output:
Using monotonic timestamps
running testcase: flip-vs-modeset-vs-hang
Beginning flip-vs-modeset-vs-hang on crtc 3, connector 7
  1600x900 60 1600 1664 1706 1970 900 903 906 912 0xa 0x48 107800
.

dmesg:
[   35.548779] [drm:i915_driver_open],
[   35.548796] [drm:intel_crtc_set_config], [CRTC:3] [FB:11] #connectors=1 (x y) (0 0)
[   35.548802] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [CRTC:3]
[   35.548804] [drm:intel_crtc_set_config], [CRTC:5] [NOFB]
[   35.548806] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [CRTC:3]
[   35.548813] [drm:i915_driver_open],
[   35.548894] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[8] ENCODERS[8]
[   35.548899] [drm:drm_mode_getresources], CRTC[2] CONNECTORS[8] ENCODERS[8]
[   35.548907] [drm:drm_mode_getconnector], [CONNECTOR:7:?]
[   35.548909] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1]
[   35.548921] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:7:LVDS-1] probed modes :
[   35.548923] [drm:drm_mode_debug_printmodeline], Modeline 30:"1600x900" 60 107800 1600 1664 1706 1970 900 903 906 912 0x48 0xa
[   35.548925] [drm:drm_mode_debug_printmodeline], Modeline 31:"1600x900" 40 71870 1600 1664 1706 1970 900 903 906 912 0x40 0xa
[   35.548929] [drm:drm_mode_getconnector], [CONNECTOR:7:?]
[   35.605399] [drm:drm_mode_addfb], [FB:32]
[   35.618087] [drm:drm_mode_addfb], [FB:33]
[   35.618122] [drm:drm_mode_setcrtc], [CRTC:3]
[   35.618126] [drm:drm_mode_setcrtc], [CONNECTOR:7:LVDS-1]
[   35.618128] [drm:intel_crtc_set_config], [CRTC:3] [FB:32] #connectors=1 (x y) (0 0)
[   35.618133] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [CRTC:3]
[   35.620056] [drm:ironlake_update_plane], Writing base 005F1000 00000000 0 0 6400
[   35.631312] [drm:intel_update_fbc], fbc set to per-chip default
[   35.631321] [drm:intel_update_fbc], fbc disabled per module param
[   35.647411] [drm:drm_mode_setcrtc], [CRTC:3]
[   35.647426] [drm:drm_mode_setcrtc], [CONNECTOR:7:LVDS-1]
[   35.647432] [drm:intel_crtc_set_config], [CRTC:3] [FB:32] #connectors=1 (x y) (0 0)
[   35.647443] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [CRTC:3]
[   35.647451] [drm:ironlake_update_plane], Writing base 005F1000 00000000 0 0 6400
[   35.665272] [drm:intel_update_fbc], fbc set to per-chip default
[   35.665281] [drm:intel_update_fbc], fbc disabled per module param
[   35.665387] [drm:i915_driver_open],
[   35.665392] [drm:intel_update_fbc], fbc set to per-chip default
[   35.665396] [drm:intel_update_fbc], fbc disabled per module param
[   35.665412] [drm:i915_ring_stop_write], Stopping rings 0x0000000f
[   35.665433] [drm:drm_mode_setcrtc], [CRTC:3]
[   35.665435] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
[   35.665437] [drm:intel_modeset_stage_output_state], [CONNECTOR:7:LVDS-1] to [NOCRTC]
[   35.665438] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
[   35.665440] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
[   35.665442] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 1
[   35.665444] [drm:intel_panel_actually_set_backlight], set backlight PWM = 0
[   43.671116] [drm:i915_hangcheck_hung] *ERROR* Hangcheck timer elapsed... GPU hung
[   43.671161] [drm] capturing error event; look for more information in /debug/dri/0/i915_error_state
[   43.674881] [drm:i915_error_work_func], resetting chip
[   43.675048] [drm:gm45_get_vblank_counter], trying to get vblank count for disabled pipe B

Reproduce steps:
----------------
1. ./kms_flip --run-subtest flip-vs-modeset-vs-hang
Comment 1 Daniel Vetter 2013-02-01 08:47:24 UTC
It's a new test from Ville in i-g-t and is supposed to cause a gpu hang (with the same simulation mechnism as the ZZ_hangman test).
Comment 2 lu hua 2013-02-01 08:59:09 UTC
(In reply to comment #1)
> It's a new test from Ville in i-g-t and is supposed to cause a gpu hang
> (with the same simulation mechnism as the ZZ_hangman test).

It causes system hang.
output:
Using monotonic timestamps
running testcase: flip-vs-modeset-vs-hang
Beginning flip-vs-modeset-vs-hang on crtc 3, connector 7
  1600x900 60 1600 1664 1706 1970 900 903 906 912 0xa 0x48 107800
.
Comment 3 Ville Syrjala 2013-02-12 13:28:07 UTC
(In reply to comment #2)
> (In reply to comment #1)
> > It's a new test from Ville in i-g-t and is supposed to cause a gpu hang
> > (with the same simulation mechnism as the ZZ_hangman test).
> 
> It causes system hang.
> output:
> Using monotonic timestamps
> running testcase: flip-vs-modeset-vs-hang
> Beginning flip-vs-modeset-vs-hang on crtc 3, connector 7
>   1600x900 60 1600 1664 1706 1970 900 903 906 912 0xa 0x48 107800
> .

Yes, unfortunately that's expected until the kernel fixes I made are merged.
Comment 4 Daniel Vetter 2013-02-13 17:05:05 UTC
Fix merged into dinq, please test:

commit 21efa5d8f2ebe3b928d7d20f7ea77a8b894a2f42
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Tue Jan 29 18:13:34 2013 +0200

    drm/i915: Don't wait for page flips if there was GPU reset
Comment 5 yanbing 2013-02-21 02:33:14 UTC
Now I retest this case with the latest dinq,but I found all i-g-t case can not run.

I replaced some old kernels,and reset the i-g-t to the version of 20130131,but also cann't run.

STDOUT
Using monotonic timestamps

It just happend on my SNB and IVB marchine ,and I have no idea what happend.I attached the dmesg.

Is it releated with the change of the igt case?Can you give me some advice to solve this issue? 

Thanks!
Comment 6 yanbing 2013-02-21 02:38:14 UTC
Created attachment 75219 [details]
igt-cannotrun.dmesg
Comment 7 lu hua 2013-02-26 05:22:10 UTC
It fixed on -queued kernel(commit:90a72f8774b606097).
Still happens on -fixes kernel(commit:202adf4b9f5957b26a1cb9), I will close it if fixed on -fixes kernel.
Comment 8 yanbing 2013-02-26 05:24:43 UTC
(In reply to comment #5)
> Now I retest this case with the latest dinq,but I found all i-g-t case can
> not run.
> 
> I replaced some old kernels,and reset the i-g-t to the version of
> 20130131,but also cann't run.
> 
> STDOUT
> Using monotonic timestamps
> 
> It just happend on my SNB and IVB marchine ,and I have no idea what
> happend.I attached the dmesg.
> 
> Is it releated with the change of the igt case?Can you give me some advice
> to solve this issue? 
> 
> Thanks!

Eh,may be it's my mistake of building case. Now it can run.
Comment 9 Yi Sun 2013-02-28 06:36:00 UTC
Since the fix has already been on the -nightly branch, I think we can close it.
Comment 10 Florian Mickler 2013-03-04 22:57:44 UTC
A patch referencing this bug report has been merged in Linux v3.9-rc1:

commit 10d8373064762b21e16e73bc7dfde49d68f4e31f
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Tue Jan 29 18:13:34 2013 +0200

    drm/i915: Don't wait for page flips if there was GPU reset
Comment 11 Jari Tahvanainen 2017-01-12 07:02:47 UTC
Closing verified+fixed.

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