Bug 65486

Summary: [lvds] External monitor flashes when opening lid
Product: DRI Reporter: Chris Wilson <chris>
Component: DRM/IntelAssignee: Intel GFX Bugs mailing list <intel-gfx-bugs>
Status: CLOSED NOTABUG QA Contact: Intel GFX Bugs mailing list <intel-gfx-bugs>
Severity: normal    
Priority: medium    
Version: unspecified   
Hardware: Other   
OS: All   
Whiteboard:
i915 platform: i915 features:
Attachments:
Description Flags
Use modeset rather than a forced restore none

Description Chris Wilson 2013-06-06 22:43:20 UTC 
X is running, and I have it on good authority that it did not request a modeset, yet the kernel did this all by itself against my wishes:


[  451.242887] [drm:intel_modeset_setup_hw_state], [CRTC:3] hw state readout: enabled
[  451.242898] [drm:intel_modeset_setup_hw_state], [CRTC:4] hw state readout: disabled
[  451.242905] [drm:intel_modeset_setup_hw_state], [ENCODER:6:LVDS-6] hw state readout: disabled, pipe=0
[  451.242913] [drm:intel_modeset_setup_hw_state], [ENCODER:14:DAC-14] hw state readout: enabled, pipe=0
[  451.242920] [drm:intel_modeset_setup_hw_state], [CONNECTOR:5:LVDS-1] hw state readout: disabled
[  451.242927] [drm:intel_modeset_setup_hw_state], [CONNECTOR:13:VGA-1] hw state readout: enabled
[  451.242936] [drm:intel_dump_pipe_config], [CRTC:3][setup_hw_state] config for pipe A
[  451.242941] [drm:intel_dump_pipe_config], cpu_transcoder: A
[  451.242945] [drm:intel_dump_pipe_config], pipe bpp: 0, dithering: 0
[  451.242950] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
[  451.242956] [drm:intel_dump_pipe_config], requested mode:
[  451.242961] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 1920 0 0 0 1080 0 0 0 0x0 0x0
[  451.242969] [drm:intel_dump_pipe_config], adjusted mode:
[  451.242973] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x5
[  451.242981] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
[  451.242986] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
[  451.242991] [drm:intel_dump_pipe_config], ips: 0
[  451.242997] [drm:intel_dump_pipe_config], [CRTC:4][setup_hw_state] config for pipe B
[  451.243002] [drm:intel_dump_pipe_config], cpu_transcoder: B
[  451.243006] [drm:intel_dump_pipe_config], pipe bpp: 0, dithering: 0
[  451.243011] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
[  451.243017] [drm:intel_dump_pipe_config], requested mode:
[  451.243021] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
[  451.243029] [drm:intel_dump_pipe_config], adjusted mode:
[  451.243033] [drm:drm_mode_debug_printmodeline], Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
[  451.243041] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
[  451.243046] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
[  451.243051] [drm:intel_dump_pipe_config], ips: 0
[  451.243057] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
[  451.243065] [drm:connected_sink_compute_bpp], [CONNECTOR:13:VGA-1] checking for sink bpp constrains
[  451.243071] [drm:intel_modeset_pipe_config], plane bpp: 24, pipe bpp: 24, dithering: 0
[  451.243077] [drm:intel_dump_pipe_config], [CRTC:3][modeset] config for pipe A
[  451.243082] [drm:intel_dump_pipe_config], cpu_transcoder: A
[  451.243086] [drm:intel_dump_pipe_config], pipe bpp: 24, dithering: 0
[  451.243091] [drm:intel_dump_pipe_config], fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
[  451.243097] [drm:intel_dump_pipe_config], requested mode:
[  451.243101] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[  451.243110] [drm:intel_dump_pipe_config], adjusted mode:
[  451.243114] [drm:drm_mode_debug_printmodeline], Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[  451.243123] [drm:intel_dump_pipe_config], gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
[  451.243129] [drm:intel_dump_pipe_config], pch pfit: pos: 0x00000000, size: 0x00000000
[  451.243133] [drm:intel_dump_pipe_config], ips: 0
[  451.283865] [drm:pineview_update_wm], Self-refresh is disabled
[  451.285211] [drm:i9xx_update_plane], Writing base 01000000 00000000 0 0 8192
[  451.285222] [drm:pineview_update_wm], Self-refresh is disabled
[  451.285228] [drm:intel_crtc_mode_set], [ENCODER:14:DAC-14] set [MODE:0:1920x1080]
[  451.285236] [drm:intel_calculate_wm], FIFO entries required for mode: 32
[  451.285241] [drm:intel_calculate_wm], FIFO watermark level: 470
[  451.285246] [drm:pineview_update_wm], DSPFW1 register is eb030f0f
[  451.285251] [drm:intel_calculate_wm], FIFO entries required for mode: 37
[  451.285255] [drm:intel_calculate_wm], FIFO watermark level: 470
[  451.285260] [drm:intel_calculate_wm], FIFO entries required for mode: 310
[  451.285264] [drm:intel_calculate_wm], FIFO watermark level: 192
[  451.285270] [drm:intel_calculate_wm], FIFO entries required for mode: 314
[  451.285274] [drm:intel_calculate_wm], FIFO watermark level: 193
[  451.285279] [drm:pineview_update_wm], DSPFW3 register is 3f3f00c0
[  451.285284] [drm:pineview_update_wm], Self-refresh is enabled
[  451.308112] [drm:intel_modeset_affected_pipes], set mode pipe masks: modeset: 0, prepare: 0, disable: 0
[  451.308126] [drm:intel_connector_check_state], [CONNECTOR:13:VGA-1]
[  451.308133] [drm:intel_modeset_check_state], [ENCODER:6:LVDS-6]
[  451.308139] [drm:intel_modeset_check_state], [ENCODER:14:DAC-14]
[  451.308144] [drm:intel_modeset_check_state], [CRTC:3]
[  451.308153] [drm:intel_modeset_check_state], [CRTC:4]
Comment 1 Chris Wilson 2013-06-06 23:23:14 UTC 
See bug 54677 and bug 57434
Comment 2 Chris Wilson 2013-06-06 23:30:02 UTC 
IIRC, the promise is that modeset becomes intelligent enough to notice the no-op.
Comment 3 Daniel Vetter 2013-06-07 05:59:59 UTC 
Hm, I wonder a bit why we have not read out adjusted_mode properly ... otherwise this smells like a "can I haz fastboot plz" bug report ;-)
Comment 4 Chris Wilson 2013-06-07 12:48:52 UTC 
Created attachment 80475 [details] [review]
Use modeset rather than a forced restore

And here's the reason the major modeset code was working as intended, we forgot to call it!
Comment 5 Daniel Vetter 2013-11-18 17:50:08 UTC 
Hm, could be that we need Chris fancy fix for the setup_hw_state function. Please test

https://patchwork.kernel.org/patch/3197021/
Comment 6 Jani Nikula 2014-08-14 13:31:00 UTC 
Still an issue, Chris?
Comment 7 Daniel Vetter 2014-11-04 16:15:58 UTC 
This is just a feature request for our current mode_set not being intelligent enough I think. The mode/fb_changed logic needs to be moved, together with the fastboot pfit hack. That should address Chris' hack from comment #4. Ander is actually signed up to make that happen, but really a feature request for jira, not a bug.

Wrt the patch I've mentioned in comment #5 I think we agreed that this is a an issue in userspace. There's at least been an sna patch resulting (to treat unknown as "don't touch, certainly don't disable"), but I can't find it right now.

So closing this one here.

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