Bug 74964

Summary: [BYT]I-G-T/testdisplay && 1920x1080i showing half screen on DP mode
Product: DRI Reporter: Guo Jinxian <jinxianx.guo>
Component: DRM/IntelAssignee: Intel GFX Bugs mailing list <intel-gfx-bugs>
Status: CLOSED FIXED QA Contact: Intel GFX Bugs mailing list <intel-gfx-bugs>
Severity: normal    
Priority: high CC: intel-gfx-bugs, yi.sun
Version: XOrg git   
Hardware: Other   
OS: All   
Whiteboard:
i915 platform: i915 features:
Attachments:
Description Flags
dmesg
none
snapshot
none
Select between sdvo and dp interlace modes none

Description Guo Jinxian 2014-02-14 07:26:56 UTC
Created attachment 94046 [details]
dmesg

Environment:
--------------------------
Platform: BayTrail
Kernel: (drm-intel-testing) 54b927ca040f2adee35f9ee95c9ce40d6be2f0e8


Bug detailed description:
-----------------------------
DP mode shows half screen only. It's not full,you can see it on the attachment and the dmesg.

Steps:
---------------------------
./testdisplay -o 20,3
Comment 1 Guo Jinxian 2014-02-14 07:27:57 UTC
Created attachment 94047 [details]
snapshot
Comment 2 Guo Jinxian 2014-02-14 07:36:57 UTC
It's first time to testing DP port on Baytrail.
Comment 3 Daniel Vetter 2014-02-14 07:59:52 UTC
Does the same setup (DP screen) work correctly on other platforms?
Comment 4 Guo Jinxian 2014-02-14 08:58:55 UTC
(In reply to comment #3)
> Does the same setup (DP screen) work correctly on other platforms?

Other platforms(like BDW, IVK)1920x1080i showing not full (Bug 58701), the phenomenon is not same with this.
Comment 5 Damien Lespiau 2014-02-14 14:11:11 UTC
This is not an overscan issue, it seems more like we don't support interlaced modes on BYT yet.
Comment 6 Damien Lespiau 2014-02-14 14:12:56 UTC
To be more precise about why this is not an overscan issue: you can see the pixels first line and columns of the fb (we draw the corners of the fb for that reason).

The whole fb is squashed in one field of the interlaced mode.
Comment 7 Chris Wilson 2014-02-20 21:11:12 UTC
A quick test would be to try:

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d5eafd1..d58966a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5333,7 +5333,7 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)
 
        if (!IS_GEN2(dev) &&
            intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
-               pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
+               pipeconf |= PIPECONF_INTERLACE_W_SYNC_SHIFT_PANEL;
        else
                pipeconf |= PIPECONF_PROGRESSIVE;
 

(This is likely to regress HDMI though and !BYT - but we should also see a similar bug on gm45.)
Comment 8 Guo Jinxian 2014-02-21 08:56:39 UTC
(In reply to comment #7)
> A quick test would be to try:
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index d5eafd1..d58966a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5333,7 +5333,7 @@ static void i9xx_set_pipeconf(struct intel_crtc
> *intel_crtc)
>  
>         if (!IS_GEN2(dev) &&
>             intel_crtc->config.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE)
> -               pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
> +               pipeconf |= PIPECONF_INTERLACE_W_SYNC_SHIFT_PANEL;
>         else
>                 pipeconf |= PIPECONF_PROGRESSIVE;
>  
> 
> (This is likely to regress HDMI though and !BYT - but we should also see a
> similar bug on gm45.)

1920x1080i unable to display with this patch. it shows "Display No Signal" thanks.
Comment 9 Chris Wilson 2014-02-21 09:21:00 UTC
Created attachment 94491 [details] [review]
Select between sdvo and dp interlace modes

I've checked that the DP connector on my byt board is bust, so if someone else could test, that would be grand.
Comment 10 Todd Previte 2014-02-21 16:16:20 UTC
Using xrandr to set for 1080i on the ByT-I system I have kills the display as well. I'll give you patch a try shortly, Chris. Also going to do some reg dumps and see what I can find.

-T
Comment 11 Todd Previte 2014-04-28 23:16:48 UTC
I tried your patch on an earlier 3.13 kernel and it didn't affect this issue. Using xrandr to set the resolution still resulted in a dead display. I'm working on getting the patch to apply to a 3.15 kernel now. Results shortly.

-T
Comment 12 Chris Wilson 2014-04-30 10:34:12 UTC
Didn't Jesse send a patch that should affect this bug... Actually Ville ended up sending it,

commit efc2cfff28a9424a0f9f8b068c6c8697435664c3
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Fri Mar 28 23:29:31 2014 +0200

    drm/i915: Fix the interlace mode selection for gmch platforms
    
    PIPECONF_INTERLACE_W_FIELD_INDICATION is only meant to be used for sdvo
    since it implies a slightly weird vsync shift of htotal/2. For everything
    else we should use PIPECONF_INTERLACE_W_SYNC_SHIFT and let the value in
    the VSYNCSHIFT register take effect.
    
    The only exception is gen3 simply because VSYNCSHIFT didn't exist yet.
    Gen2 doesn't support interlaced modes at all, so we can drop the
    explicit gen2 checks.
    
    Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Comment 13 Guo Jinxian 2014-05-04 06:48:17 UTC
Tested on latest -fixes(9bbfd20abe5025adbb0ac75160bd2e41158a9e83) which include the patch(efc2cfff28a9424a0f9f8b068c6c8697435664c3), unable to display. "DisplayPort No Signal" shows on the monitor.
Comment 14 Todd Previte 2014-05-16 22:21:13 UTC
I had a similar experience with the 3.15 kernel I built - no display. I think at this point I'm going to follow up with Damien's point above and check into some some of the buffer management stuff for interlaced modes. I have a new ByT system coming in that I'll use for this as well. I'll capture some new register dumps as well to make sure everything's setup correct.
Comment 15 Jesse Barnes 2014-12-04 21:06:45 UTC
Can you try with a more recent kernel?  It has some fixes for interlaced modes:

commit 5a11f7f829a8d1b5c1c4774afcd263a2066d3179
Author: Clint Taylor <clinton.a.taylor@intel.com>
Date:   Fri Sep 26 09:55:24 2014 -0700

    drm/edid: Add missing interlaced flag to 576i@100 modes.

commit 697c4078c765c02b9c4ca2d828ae4d7af62453a6
Author: Clint Taylor <clinton.a.taylor@intel.com>
Date:   Tue Sep 2 17:03:36 2014 -0700

    drm/i915/hdmi: Enable pipe pixel replication for SD interlaced modes

commit fb01d28070b711b164d84ff80a28dcc7cca506e7
Author: Clint Taylor <clinton.a.taylor@intel.com>
Date:   Tue Sep 2 17:03:35 2014 -0700

    drm/edid: Reduce horizontal timings for pixel replicated modes

Though the middle one is HDMI only...
Comment 16 Jesse Barnes 2014-12-04 21:07:18 UTC
Jinxian or Yi, that's a request for you btw. :)
Comment 17 Guo Jinxian 2014-12-08 08:36:35 UTC
The failure unable to reproduce on latest -nightly(bfdd01aa1825aa0068f9236b21362b550f6d630f)
Comment 18 Elizabeth 2017-10-06 14:39:57 UTC
Closing old verified.

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