Bug 78938

Created attachment 99380 [details]
dmesg

==System Environment==
--------------------------
Regression: Yes. 
Good commit on -next-queued(b7c0d9df97c10ec5693a838df2fd53058f8e9e96)

Non-working platforms: BDW

==kernel==
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-nightly: f79ba79cf037eea9ee757ad37730b00f43d5ef80 (fails)
-queued: d3b448d9917a3d6531e499d88bfb13ea5e31e4ad (fails)
    Author: Chris Wilson <chris@chris-wilson.co.uk>
    Date:   Fri May 16 18:59:00 2014 +0100

    drm/i915: Only unpin the default ctx object if it exists

    Since commit 691e6415c891b8b2b082a120b896b443531c4d45
    Author: Chris Wilson <chris@chris-wilson.co.uk>
    Date:   Wed Apr 9 09:07:36 2014 +0100

        drm/i915: Always use kref tracking for all contexts.

    we have contexts everywhere, and so we must be careful to distinguish
    fake contexts, which do not have an associated bo, and real ones, which
    do. In particular, we now need to be careful not to dereference NULL
    pointers.

    This is one such example, as the commit highlighted above failed to move
    the unpinning of the default ctx object into the real-context-only
    branch.

    Reported-by: Daniel Vetter <daniel.vetter@ffwll.ch>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78792
    Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
    Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
    Cc: Ben Widawsky <benjamin.widawsky@intel.com>
    Cc: Mika Kuoppala <mika.kuoppala@intel.com>
    Cc: Jani Nikula <jani.nikula@intel.com>
    Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

-fixes: e95a2f7509f5219177d6821a0a8754f93892ca56 (works)
    Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Date:   Thu May 8 15:09:19 2014 +0300

    drm/i915: Increase WM memory latency values on SNB

    On SNB the BIOS provided WM memory latency values seem insufficient to
    handle high resolution displays.

    In this particular case the display mode was a 2560x1440@60Hz, which
    makes the pixel clock 241.5 MHz. It was empirically found that a memory
    latency value if 1.2 usec is enough to avoid underruns, whereas the BIOS
    provided value of 0.7 usec was clearly too low. Incidentally 1.2 usec
    is what the typical BIOS provided values are on IVB systems.

    Increase the WM memory latency values to at least 1.2 usec on SNB.
    Hopefully this won't have a significant effect on power consumption.

    v2: Increase the latency values regardless of the pixel clock

    Cc: Robert N <crshman@gmail.com>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70254
    Tested-by: Robert Navarro <crshman@gmail.com>
    Tested-by: Vitaly Minko <vitaly.minko@gmail.com>
    Cc: stable@vger.kernel.org
    Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Signed-off-by: Jani Nikula <jani.nikula@intel.com>

==Bug detailed description==
-----------------------------
./gem_render_tiled_blits fails

Output:
./gem_render_tiled_blits
IGT-Version: 1.6-gd71add5 (x86_64) (Linux: 3.15.0-rc3_drm-intel-nightly_f79ba7_20140519+ x86_64)
not enough RAM to run test, reducing buffer count
Using 3478 1MiB buffers
Using a snoop linear buffer for comparisons
Verifying initialisation...
Test assertion failure function check_bo, file gem_render_tiled_blits.c:91:
Last errno: 0, Success
Failed assertion: ptr[i] == val
Expected 0x00000001, found 0x00000000 at offset 0x00000004

==Reproduce steps==
---------------------------- 
1. ./gem_render_tiled_blits