Summary: | r600g+nine: Bioshock shader failure after 7b1c0cbc90d456384b0950ad21faa3c61a6b43ff | ||
---|---|---|---|
Product: | Mesa | Reporter: | David Heidelberg (okias) <david> |
Component: | Drivers/Gallium/r600 | Assignee: | Default DRI bug account <dri-devel> |
Status: | RESOLVED FIXED | QA Contact: | |
Severity: | normal | ||
Priority: | medium | CC: | glenn.kennard |
Version: | git | ||
Hardware: | x86-64 (AMD64) | ||
OS: | Linux (All) | ||
Whiteboard: | |||
i915 platform: | i915 features: | ||
Attachments: | debug_vs_ps_sbdry.txt |
Description
David Heidelberg (okias)
2014-10-31 12:08:42 UTC
I realized it may be: 7b1c0cbc90d456384b0950ad21faa3c61a6b43ff r600g: Implement sm5 UBO/sampler indexing Reverted and recompiling. http://cgit.freedesktop.org/mesa/mesa/commit/?id=7b1c0cbc90d456384b0950ad21faa3c61a6b43ff Verified, this commit broke it on r600g. Adding Glenn Kennard to CC. Created attachment 108777 [details]
debug_vs_ps_sbdry.txt
It's bug in Nine. Instead of one available ADDR[0], we try use DCL ADDR[0..1]. ADDR[0] is allocated by LOOP (for counter purposes) and then later is allocated ADDR[1]. 0 is the address register (already allocated by LOOP, but in this case unused) 1 is UBO index register (misused by location for MOVA (coverted)-> ARR) 2 is sampler index register (not used, correctly). Axel had idea we could do something like: . if wants to use rL to index constant register . . if a0 is used somewhere in the shader . . then copy the content to temp. load rL to a0. do the op. restore a0 . . else copy rL to a0 and use it . else do nothing particular (In reply to David Heidelberg (okias) from comment #4) > It's bug in Nine. > > Instead of one available ADDR[0], we try use DCL ADDR[0..1]. > > ADDR[0] is allocated by LOOP (for counter purposes) and then later is > allocated ADDR[1]. > > 0 is the address register (already allocated by LOOP, but in this case > unused) > 1 is UBO index register (misused by location for MOVA (coverted)-> ARR) > 2 is sampler index register (not used, correctly). While the opengl state tracker uses ADDR in this way, it is not in any way required by TGSI or gallium that this be the case. ADDR registers can be used however you want, they're just registers like any other, except that they can be used for indirect indexing into TEMP and CONST registers (perhaps IN and OUT as well, not sure), and with ARB_gs5, into SAMP as well. In testing repository [1] fixed by commit: st/nine: Rewrite LOOP implementation, and a0 aL handling Now it also passes wine tests without killing driver (r600g). [1] https://github.com/iXit/Mesa-3D/commits/master Fixed in mesa repository by commit 6a8e5e48be0bad4606b2d5d7ba736a3d2a277c55 . Closing. |
Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.