Summary: | [ HSW Bisected ] VGA was white screen when resume in test S3 with 3pipe | ||||||||
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Product: | DRI | Reporter: | xubin <bin.a.xu> | ||||||
Component: | DRM/Intel | Assignee: | Intel GFX Bugs mailing list <intel-gfx-bugs> | ||||||
Status: | CLOSED FIXED | QA Contact: | Intel GFX Bugs mailing list <intel-gfx-bugs> | ||||||
Severity: | normal | ||||||||
Priority: | medium | CC: | christophe.prigent, intel-gfx-bugs | ||||||
Version: | unspecified | Keywords: | bisected, regression | ||||||
Hardware: | Other | ||||||||
OS: | Linux (All) | ||||||||
Whiteboard: | |||||||||
i915 platform: | HSW | i915 features: | power/suspend-resume | ||||||
Attachments: |
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Bisect shows:e81918499f060fe35ee12298e66fbfc2c6159b19 is the first bad commit. commit e81918499f060fe35ee12298e66fbfc2c6159b19 Author: Mika Kuoppala <mika.kuoppala@linux.intel.com> AuthorDate: Fri Mar 13 15:21:53 2015 +0200 Commit: Daniel Vetter <daniel.vetter@ffwll.ch> CommitDate: Fri Mar 13 18:34:45 2015 +0100 drm/i915: Fix vmap_batch page iterator overrun vmap_batch() calculates amount of needed pages for the mapping we are going to create. And it uses this page count as an argument for the for_each_sg_pages() macro. The macro takes the number of sg list entities as an argument, not the page count. So we ended up iterating through all the pages on the mapped object, corrupting memory past the smaller pages[] array. Fix this by bailing out when we have enough pages. This regression has been introduced in commit 17cabf571e50677d980e9ab2a43c5f11213003ae Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Wed Jan 14 11:20:57 2015 +0000 drm/i915: Trim the command parser allocations Cc: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Your dmesg lacks debug information. Please add 'drm.debug=0x1e log_buf_len=4M' to the kernel command line and attach new dmesg. When you say the VGA screen was white, do you mean it was filled with a solid white color, or was it just a blank, i.e., as if the display is disabled? Also, could you please double check the bisect is correct? Test that you see the issue with the bad commit, then revert it and test it again. When I said VGA was screen, I mean that the full screen was white after resume. Here ,I bisect again,but was blocked when I use the drm-intel-nightly kernel(commit f7def439e21cacf7656539edc55a4884734743de), because when I do "xinit &",start X failed, the screen just freezed,so the next step coluld not do. And the attachment is the dmesg when I blocked. Created attachment 116557 [details]
dmesg while blocked
Timeout, assuming that this is fixed by now. If this is not the case and problem still persist, please reopen this with results against latest kernel drm-tip. |
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Created attachment 114827 [details] dmesg ==System Environment== -------------------------- Regression: Yes. Good commit: 4fa23142a15526f4a4b5df61f26eacdd558a849a. Non-working platforms: Haswell ==kernel== -------------------------- -nightly: 60c5b7f582e8ced10dcd557db4ea66665e6a4dff (fails) drm-intel-nightly: 2015y-03m-26d-21h-48m-18s UTC integration manifest -queued: d21bd67bbbc635424b336b7c881dbcdf6098f9f5(fails) drm/i915: Don't use encoder->new_crtc in intel_lvds_compute_config() -fixes: 5f407751b0ca9bd876fe8f15ff28153661c6ba0a (fails) drm/i915: Fixup legacy plane->crtc link for initial fb config ==Bug detailed description== ----------------------------- Test S3 with 3 pipe,all monitor can resume successfully,but the VGA was white screen. ==Reproduce steps== ---------------------------- 1.xinit & 2.echo mem > /sys/power/state 3.Knock on the keyboard VGA was white screen when resume in test S3 with 3pipe,2 DP was normal.