Summary: | [BSW]Piglit/spec/nv_conditional_render/dlist fails intermittently | ||
---|---|---|---|
Product: | Mesa | Reporter: | lu hua <huax.lu> |
Component: | Drivers/DRI/i965 | Assignee: | Neil Roberts <nroberts> |
Status: | RESOLVED FIXED | QA Contact: | Intel 3D Bugs Mailing List <intel-3d-bugs> |
Severity: | normal | ||
Priority: | medium | CC: | christophe.prigent |
Version: | git | ||
Hardware: | All | ||
OS: | Linux (All) | ||
URL: | http://patchwork.freedesktop.org/patch/57758/ | ||
Whiteboard: | |||
i915 platform: | i915 features: |
Description
lu hua
2015-05-28 01:31:17 UTC
Is this caused by 426023050d1d3cd1b5fc0b3508dd7e1ee3b061e7? (In reply to Kenneth Graunke from comment #1) > Is this caused by 426023050d1d3cd1b5fc0b3508dd7e1ee3b061e7? Test this commit 10 cycles, it works well. commit 6817e0f1ce71d2a6d347d4c182f2cf4742dd5deb Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Fri Aug 21 15:28:22 2015 +0100 i965: Move control flush into pipelined conditional render The nv_conditional_render piglits were sporadically failing. Moving the control flush from the write and placing it just before the read was sufficient to make the piglits pass a 1000/1000 times. The bspec says that the flush enable bit "waits until all previous writes of immediate data from post sync circles are complete before executing the next command" - the operative word being previous! Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90691 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Neil Roberts <neil@linux.intel.com> Cc: Kenneth Graunke <kenneth@whitecape.org> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> |
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