Bug 93542

Summary: [GEN7] piglit.spec.arb_tessellation_shader.execution.{tess_with_geometry,quads,variable-indexing.tes-both-input-array-vec4-index-rd} fails
Product: Mesa Reporter: Dylan Baker <baker.dylan.c>
Component: Drivers/DRI/i965Assignee: Intel 3D Bugs Mailing List <intel-3d-bugs>
Status: RESOLVED FIXED QA Contact: Intel 3D Bugs Mailing List <intel-3d-bugs>
Severity: minor    
Priority: medium CC: mark.a.janes
Version: git   
Hardware: Other   
OS: Linux (All)   
Whiteboard:
i915 platform: i915 features:

Description Dylan Baker 2015-12-30 22:43:11 UTC
commit 381a89cf2a0c1e7babb0f134a3b5b662045092a2 adds the following failing tests:

byt, ivb, hsw (64 bit):
piglit.spec.arb_tessellation_shader.execution.variable-indexing.tes-both-input-array-vec4-index-rd
piglit.spec.arb_shader_atomic_counters.semantics

byt, ivb, hsw (32 bit):
piglit.spec.arb_tessellation_shader.execution.variable-indexing.tes-both-input-array-vec4-index-rd
piglit.spec.arb_tessellation_shader.execution.tess_with_geometry
piglit.spec.arb_shader_atomic_counters.semantics
piglit.spec.arb_tessellation_shader.execution.quads


There were also some arb_program_interface regressions that bisect to this commit, but I can replicate them further back than this, so I've removed them.

I believe Ken that you're aware of these, but I'm documenting them so we can better track them with Jenkins.
Comment 1 Kenneth Graunke 2016-01-01 09:51:48 UTC
Yep.  spec/arb_tessellation_shader/execution/variable-indexing/tes-both-input-array-vec4-index-rd fails due to register pressure being too high and our spilling code being unable to cope.  Not too concerned about it, but it would be nice to have it passing.

I actually think the spec/arb_shader_atomic_counters/semantics tessellation evaluation shader test is broken.  I think it relies on a specific ordering of generated primitives, which is undefined and up to the hardware.  The test should probably be improved.

I have no idea why quads fails.  It passes for me locally 100% of the time.

Not sure about tess_with_geometry either.
Comment 2 Kenneth Graunke 2016-01-03 08:53:09 UTC
Ilia sent a Piglit patch to fix spec/arb_shader_atomic_counters/semantics:
http://lists.freedesktop.org/archives/piglit/2016-January/018546.html
Comment 3 Mark Janes 2016-01-07 16:11:12 UTC
Ken, arb_tessellation_shader.execution.quads fails only on 32 bit machines.  That's why it passes locally for you.
Comment 4 Kenneth Graunke 2016-01-10 00:40:38 UTC
(In reply to Mark Janes from comment #3)
> Ken, arb_tessellation_shader.execution.quads fails only on 32 bit machines. 
> That's why it passes locally for you.

Yeah, but I've tried a 32-bit build, and it works fine...
Comment 5 Matt Turner 2016-11-02 23:32:43 UTC
I cannot reproduce 32-bit failures with 

piglit.spec.arb_tessellation_shader.execution.tess_with_geometry
piglit.spec.arb_tessellation_shader.execution.quads

on my Haswell. Unfortunately valgrind is pretty useless on my system for 32-bit builds so it doesn't turn up anything.


piglit.spec.arb_tessellation_shader.execution.variable-indexing.tes-both-input-array-vec4-index-rd indeed fails.
Comment 6 Mark Janes 2017-02-03 02:42:13 UTC
Ken, Matt:  would you have tested this with a 32bit piglit build, as well as a 32bit Mesa?

These failures have been consistent for years in the CI.  They are the only 32-bit specific failures for piglit on most platforms.
Comment 7 Denis 2018-09-14 12:25:04 UTC
Hi. For the record:
>Yep.  spec/arb_tessellation_shader/execution/variable-indexing/tes-both-input-array-vec4-index-rd fails due to register pressure being too high and our spilling code being unable to cope.  Not too concerned about it, but it would be nice to have it passing.

Test was fixed (now passing also) and marked in intel CI as fixed too:

piglit.spec.arb_tessellation_shader.execution.variable-indexing.tes-both-input-array-vec4-index-rd = mesa 40e9f2f13847ddd94e1216088aa00456d7b02d2b

going to re-check x32 tests
Comment 8 Mark Janes 2018-09-14 14:16:51 UTC
passing 32 bit in ci.

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.