| Summary: | Wrong gl_TessLevelOuter interpretation for isolines | ||
|---|---|---|---|
| Product: | Mesa | Reporter: | James Legg <lankyleggy> |
| Component: | Drivers/DRI/i965 | Assignee: | Kenneth Graunke <kenneth> |
| Status: | VERIFIED FIXED | QA Contact: | Intel 3D Bugs Mailing List <intel-3d-bugs> |
| Severity: | normal | ||
| Priority: | medium | ||
| Version: | git | ||
| Hardware: | x86-64 (AMD64) | ||
| OS: | Linux (All) | ||
| Whiteboard: | |||
| i915 platform: | i915 features: | ||
| Attachments: | Piglit patch to add failing test | ||
Thanks a ton for tracking this down and writing a test! This patch should fix the problem: https://lists.freedesktop.org/archives/mesa-dev/2016-March/109935.html Oh, this landed a while ago, along with some other fixes: commit 5b2d8c2273c6f48e764a1386240ec674cb4aa4ad Author: Kenneth Graunke <kenneth@whitecape.org> Date: Mon Mar 14 14:22:39 2016 -0700 i965: Fix gl_TessLevelOuter[] for isolines. commit a3dc99f3d48df3da1e997d95961747daed0ba6b9 Author: Kenneth Graunke <kenneth@whitecape.org> Date: Thu May 26 00:29:56 2016 -0700 i965: Fix the passthrough TCS for isolines. commit 25e1b8d366a6131bc9d46fe27f6bc476f05a7a58 Author: Kenneth Graunke <kenneth@whitecape.org> Date: Tue May 31 21:00:43 2016 -0700 i965: Fix isoline reads in scalar TES. |
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Created attachment 122269 [details] Piglit patch to add failing test On Intel Haswell (at least: I don't have other hardware to test), on Mesa git aa3b85f, when using the isolines tessellation primitive mode, the outer tessellation levels are interpreted the wrong way around. The GL_ARB_tessellation_shader specification says, under the header "Isoline Tessellation": The number of isolines generated is derived from the first outer tessellation level; the number of segments in each isoline is derived from the second outer tessellation level. However, the number of isolines is currently taken from gl_TessLevelOuter[1], and the number of segments in each from gl_TessLevelOuter[0]. I've attached a Piglit patch that adds a test for this.