Attachment 124508 Details for Bug 90481 – GALLIUM_DDEBUG="800 noflush" dump

GALLIUM_DDEBUG="800 noflush" dump

specops.i386_3640_00000000 (text/plain), 36.00 KB, created by Daniel Scharrer on 2016-06-13 15:40:05 UTC

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Creator: Daniel Scharrer

Created: 2016-06-13 15:40:05 UTC

Size: 36.00 KB

patch

obsolete

>Driver vendor: X.Org
>Device vendor: AMD
>Device name: AMD TONGA (DRM 3.1.0 / 4.6.0-rc3+, LLVM 3.9.0)
>
>dd: GPU hang detected in pipe->flush().
>
>
>*****************************************************************************
>Driver-specific state:
>
>Memory-mapped registers:
>        [1;33mGRBM_STATUS[0m <- ME0PIPE0_CMDFIFO_AVAIL = 8
>                       SRBM_RQ_PENDING = 1
>                       ME0PIPE0_CF_RQ_PENDING = 0
>                       ME0PIPE0_PF_RQ_PENDING = 0
>                       GDS_DMA_RQ_PENDING = 0
>                       DB_CLEAN = 0
>                       CB_CLEAN = 0
>                       TA_BUSY = 0
>                       GDS_BUSY = 0
>                       WD_BUSY_NO_DMA = 0
>                       VGT_BUSY = 0
>                       IA_BUSY_NO_DMA = 0
>                       IA_BUSY = 1
>                       SX_BUSY = 1
>                       WD_BUSY = 0
>                       SPI_BUSY = 1
>                       BCI_BUSY = 1
>                       SC_BUSY = 1
>                       PA_BUSY = 0
>                       DB_BUSY = 1
>                       CP_COHERENCY_BUSY = 0
>                       CP_BUSY = 1
>                       CB_BUSY = 1
>                       GUI_ACTIVE = 1
>        [1;33mGRBM_STATUS2[0m <- ME0PIPE1_CMDFIFO_AVAIL = 8
>                        ME0PIPE1_CF_RQ_PENDING = 0
>                        ME0PIPE1_PF_RQ_PENDING = 0
>                        ME1PIPE0_RQ_PENDING = 0
>                        ME1PIPE1_RQ_PENDING = 0
>                        ME1PIPE2_RQ_PENDING = 0
>                        ME1PIPE3_RQ_PENDING = 0
>                        ME2PIPE0_RQ_PENDING = 0
>                        ME2PIPE1_RQ_PENDING = 0
>                        ME2PIPE2_RQ_PENDING = 0
>                        ME2PIPE3_RQ_PENDING = 0
>                        RLC_RQ_PENDING = 0
>                        RLC_BUSY = 0
>                        TC_BUSY = 0
>                        TCC_CC_RESIDENT = 0
>                        CPF_BUSY = 1
>                        CPC_BUSY = 0
>                        CPG_BUSY = 1
>        [1;33mGRBM_STATUS_SE0[0m <- DB_CLEAN = 0
>                           CB_CLEAN = 0
>                           BCI_BUSY = 1
>                           VGT_BUSY = 0
>                           PA_BUSY = 0
>                           TA_BUSY = 0
>                           SX_BUSY = 1
>                           SPI_BUSY = 1
>                           SC_BUSY = 1
>                           DB_BUSY = 1
>                           CB_BUSY = 1
>        [1;33mGRBM_STATUS_SE1[0m <- DB_CLEAN = 0
>                           CB_CLEAN = 0
>                           BCI_BUSY = 1
>                           VGT_BUSY = 0
>                           PA_BUSY = 0
>                           TA_BUSY = 0
>                           SX_BUSY = 1
>                           SPI_BUSY = 1
>                           SC_BUSY = 1
>                           DB_BUSY = 1
>                           CB_BUSY = 1
>        [1;33mGRBM_STATUS_SE2[0m <- DB_CLEAN = 0
>                           CB_CLEAN = 0
>                           BCI_BUSY = 1
>                           VGT_BUSY = 0
>                           PA_BUSY = 0
>                           TA_BUSY = 0
>                           SX_BUSY = 1
>                           SPI_BUSY = 1
>                           SC_BUSY = 1
>                           DB_BUSY = 1
>                           CB_BUSY = 1
>        [1;33mGRBM_STATUS_SE3[0m <- DB_CLEAN = 0
>                           CB_CLEAN = 0
>                           BCI_BUSY = 1
>                           VGT_BUSY = 0
>                           PA_BUSY = 0
>                           TA_BUSY = 0
>                           SX_BUSY = 1
>                           SPI_BUSY = 1
>                           SC_BUSY = 1
>                           DB_BUSY = 1
>                           CB_BUSY = 1
>        [1;33mSDMA0_STATUS_REG[0m <- IDLE = 1
>                            REG_IDLE = 1
>                            RB_EMPTY = 1
>                            RB_FULL = 0
>                            RB_CMD_IDLE = 1
>                            RB_CMD_FULL = 0
>                            IB_CMD_IDLE = 1
>                            IB_CMD_FULL = 0
>                            BLOCK_IDLE = 1
>                            INSIDE_IB = 0
>                            EX_IDLE = 1
>                            EX_IDLE_POLL_TIMER_EXPIRE = 1
>                            PACKET_READY = 0
>                            MC_WR_IDLE = 1
>                            SRBM_IDLE = 1
>                            CONTEXT_EMPTY = 1
>                            DELTA_RPTR_FULL = 0
>                            RB_MC_RREQ_IDLE = 1
>                            IB_MC_RREQ_IDLE = 1
>                            MC_RD_IDLE = 1
>                            DELTA_RPTR_EMPTY = 1
>                            MC_RD_RET_STALL = 0
>                            MC_RD_NO_POLL_IDLE = 1
>                            PREV_CMD_IDLE = 1
>                            SEM_IDLE = 1
>                            SEM_REQ_STALL = 0
>                            SEM_RESP_STATE = 0
>                            INT_IDLE = 1
>                            INT_REQ_STALL = 0
>        [1;33mSDMA1_STATUS_REG[0m <- IDLE = 1
>                            REG_IDLE = 1
>                            RB_EMPTY = 1
>                            RB_FULL = 0
>                            RB_CMD_IDLE = 1
>                            RB_CMD_FULL = 0
>                            IB_CMD_IDLE = 1
>                            IB_CMD_FULL = 0
>                            BLOCK_IDLE = 1
>                            INSIDE_IB = 0
>                            EX_IDLE = 1
>                            EX_IDLE_POLL_TIMER_EXPIRE = 1
>                            PACKET_READY = 0
>                            MC_WR_IDLE = 1
>                            SRBM_IDLE = 1
>                            CONTEXT_EMPTY = 1
>                            DELTA_RPTR_FULL = 0
>                            RB_MC_RREQ_IDLE = 1
>                            IB_MC_RREQ_IDLE = 1
>                            MC_RD_IDLE = 1
>                            DELTA_RPTR_EMPTY = 1
>                            MC_RD_RET_STALL = 0
>                            MC_RD_NO_POLL_IDLE = 1
>                            PREV_CMD_IDLE = 1
>                            SEM_IDLE = 1
>                            SEM_REQ_STALL = 0
>                            SEM_RESP_STATE = 0
>                            INT_IDLE = 1
>                            INT_REQ_STALL = 0
>        [1;33mSRBM_STATUS[0m <- UVD_RQ_PENDING = 0
>                       SAMMSP_RQ_PENDING = 0
>                       ACP_RQ_PENDING = 0
>                       SMU_RQ_PENDING = 0
>                       GRBM_RQ_PENDING = 0
>                       HI_RQ_PENDING = 1
>                       VMC_BUSY = 0
>                       MCB_BUSY = 0
>                       MCB_NON_DISPLAY_BUSY = 0
>                       MCC_BUSY = 0
>                       MCD_BUSY = 0
>                       VMC1_BUSY = 0
>                       SEM_BUSY = 0
>                       ACP_BUSY = 0
>                       IH_BUSY = 0
>                       UVD_BUSY = 0
>                       SAMMSP_BUSY = 0
>                       GCATCL2_BUSY = 0
>                       OSATCL2_BUSY = 0
>                       BIF_BUSY = 1
>        [1;33mSRBM_STATUS2[0m <- SDMA_RQ_PENDING = 0
>                        TST_RQ_PENDING = 0
>                        SDMA1_RQ_PENDING = 0
>                        VCE0_RQ_PENDING = 0
>                        VP8_BUSY = 0
>                        SDMA_BUSY = 0
>                        SDMA1_BUSY = 0
>                        VCE0_BUSY = 0
>                        XDMA_BUSY = 0
>                        CHUB_BUSY = 0
>                        SDMA2_BUSY = 0
>                        SDMA3_BUSY = 0
>                        SAMSCP_BUSY = 0
>                        ISP_BUSY = 0
>                        VCE1_BUSY = 0
>                        ODE_BUSY = 0
>                        SDMA2_RQ_PENDING = 0
>                        SDMA3_RQ_PENDING = 0
>                        SAMSCP_RQ_PENDING = 0
>                        ISP_RQ_PENDING = 0
>                        VCE1_RQ_PENDING = 0
>        [1;33mSRBM_STATUS3[0m <- MCC0_BUSY = 0
>                        MCC1_BUSY = 0
>                        MCC2_BUSY = 0
>                        MCC3_BUSY = 0
>                        MCC4_BUSY = 0
>                        MCC5_BUSY = 0
>                        MCC6_BUSY = 0
>                        MCC7_BUSY = 0
>                        MCD0_BUSY = 0
>                        MCD1_BUSY = 0
>                        MCD2_BUSY = 0
>                        MCD3_BUSY = 0
>                        MCD4_BUSY = 0
>                        MCD5_BUSY = 0
>                        MCD6_BUSY = 0
>                        MCD7_BUSY = 0
>        [1;33mCP_STAT[0m <- ROQ_RING_BUSY = 1
>                   ROQ_INDIRECT1_BUSY = 1
>                   ROQ_INDIRECT2_BUSY = 0
>                   ROQ_STATE_BUSY = 0
>                   DC_BUSY = 0
>                   ATCL2IU_BUSY = 0
>                   PFP_BUSY = 1
>                   MEQ_BUSY = 1
>                   ME_BUSY = 1
>                   QUERY_BUSY = 0
>                   SEMAPHORE_BUSY = 0
>                   INTERRUPT_BUSY = 0
>                   SURFACE_SYNC_BUSY = 0
>                   DMA_BUSY = 0
>                   RCIU_BUSY = 0
>                   SCRATCH_RAM_BUSY = 0
>                   CPC_CPG_BUSY = 0
>                   CE_BUSY = 0
>                   TCIU_BUSY = 0
>                   ROQ_CE_RING_BUSY = 0
>                   ROQ_CE_INDIRECT1_BUSY = 0
>                   ROQ_CE_INDIRECT2_BUSY = 0
>                   CP_BUSY = 1
>        [1;33mCP_STALLED_STAT1[0m <- RBIU_TO_DMA_NOT_RDY_TO_RCV = 0
>                            RBIU_TO_SEM_NOT_RDY_TO_RCV = 0
>                            RBIU_TO_MEMWR_NOT_RDY_TO_RCV = 0
>                            ME_HAS_ACTIVE_CE_BUFFER_FLAG = 1
>                            ME_HAS_ACTIVE_DE_BUFFER_FLAG = 1
>                            ME_STALLED_ON_TC_WR_CONFIRM = 0
>                            ME_STALLED_ON_ATOMIC_RTN_DATA = 0
>                            ME_WAITING_ON_TC_READ_DATA = 0
>                            ME_WAITING_ON_REG_READ_DATA = 0
>                            RCIU_WAITING_ON_GDS_FREE = 0
>                            RCIU_WAITING_ON_GRBM_FREE = 0
>                            RCIU_WAITING_ON_VGT_FREE = 0
>                            RCIU_STALLED_ON_ME_READ = 0
>                            RCIU_STALLED_ON_DMA_READ = 0
>                            RCIU_STALLED_ON_APPEND_READ = 0
>                            RCIU_HALTED_BY_REG_VIOLATION = 0
>        [1;33mCP_STALLED_STAT2[0m <- PFP_TO_CSF_NOT_RDY_TO_RCV = 0
>                            PFP_TO_MEQ_NOT_RDY_TO_RCV = 0
>                            PFP_TO_RCIU_NOT_RDY_TO_RCV = 0
>                            PFP_TO_VGT_WRITES_PENDING = 0
>                            PFP_RCIU_READ_PENDING = 0
>                            PFP_WAITING_ON_BUFFER_DATA = 0
>                            ME_WAIT_ON_CE_COUNTER = 0
>                            ME_WAIT_ON_AVAIL_BUFFER = 0
>                            GFX_CNTX_NOT_AVAIL_TO_ME = 1
>                            ME_RCIU_NOT_RDY_TO_RCV = 0
>                            ME_TO_CONST_NOT_RDY_TO_RCV = 0
>                            ME_WAITING_DATA_FROM_PFP = 0
>                            ME_WAITING_ON_PARTIAL_FLUSH = 0
>                            MEQ_TO_ME_NOT_RDY_TO_RCV = 1
>                            STQ_TO_ME_NOT_RDY_TO_RCV = 0
>                            ME_WAITING_DATA_FROM_STQ = 0
>                            PFP_STALLED_ON_TC_WR_CONFIRM = 0
>                            PFP_STALLED_ON_ATOMIC_RTN_DATA = 0
>                            EOPD_FIFO_NEEDS_SC_EOP_DONE = 0
>                            EOPD_FIFO_NEEDS_WR_CONFIRM = 0
>                            STRMO_WR_OF_PRIM_DATA_PENDING = 0
>                            PIPE_STATS_WR_DATA_PENDING = 0
>                            APPEND_RDY_WAIT_ON_CS_DONE = 0
>                            APPEND_RDY_WAIT_ON_PS_DONE = 0
>                            APPEND_WAIT_ON_WR_CONFIRM = 0
>                            APPEND_ACTIVE_PARTITION = 0
>                            APPEND_WAITING_TO_SEND_MEMWRITE = 0
>                            SURF_SYNC_NEEDS_IDLE_CNTXS = 0
>                            SURF_SYNC_NEEDS_ALL_CLEAN = 0
>        [1;33mCP_STALLED_STAT3[0m <- CE_TO_CSF_NOT_RDY_TO_RCV = 0
>                            CE_TO_RAM_INIT_FETCHER_NOT_RDY_TO_RCV = 0
>                            CE_WAITING_ON_DATA_FROM_RAM_INIT_FETCHER = 0
>                            CE_TO_RAM_INIT_NOT_RDY = 0
>                            CE_TO_RAM_DUMP_NOT_RDY = 0
>                            CE_TO_RAM_WRITE_NOT_RDY = 0
>                            CE_TO_INC_FIFO_NOT_RDY_TO_RCV = 0
>                            CE_TO_WR_FIFO_NOT_RDY_TO_RCV = 0
>                            CE_WAITING_ON_BUFFER_DATA = 0
>                            CE_WAITING_ON_CE_BUFFER_FLAG = 0
>                            CE_WAITING_ON_DE_COUNTER = 0
>                            CE_WAITING_ON_DE_COUNTER_UNDERFLOW = 0
>                            TCIU_WAITING_ON_FREE = 0
>                            TCIU_WAITING_ON_TAGS = 0
>                            CE_STALLED_ON_TC_WR_CONFIRM = 0
>                            CE_STALLED_ON_ATOMIC_RTN_DATA = 0
>                            ATCL2IU_WAITING_ON_FREE = 0
>                            ATCL2IU_WAITING_ON_TAGS = 0
>                            ATCL1_WAITING_ON_TRANS = 0
>        [1;33mCP_CPC_STATUS[0m <- MEC1_BUSY = 0
>                         MEC2_BUSY = 0
>                         DC0_BUSY = 0
>                         DC1_BUSY = 0
>                         RCIU1_BUSY = 0
>                         RCIU2_BUSY = 0
>                         ROQ1_BUSY = 0
>                         ROQ2_BUSY = 0
>                         TCIU_BUSY = 0
>                         SCRATCH_RAM_BUSY = 0
>                         QU_BUSY = 0
>                         ATCL2IU_BUSY = 0
>                         CPG_CPC_BUSY = 0
>                         CPF_CPC_BUSY = 0
>                         CPC_BUSY = 0
>        [1;33mCP_CPC_BUSY_STAT[0m <- MEC1_LOAD_BUSY = 0
>                            MEC1_SEMAPOHRE_BUSY = 0
>                            MEC1_MUTEX_BUSY = 0
>                            MEC1_MESSAGE_BUSY = 0
>                            MEC1_EOP_QUEUE_BUSY = 0
>                            MEC1_IQ_QUEUE_BUSY = 0
>                            MEC1_IB_QUEUE_BUSY = 0
>                            MEC1_TC_BUSY = 0
>                            MEC1_DMA_BUSY = 0
>                            MEC1_PARTIAL_FLUSH_BUSY = 0
>                            MEC1_PIPE0_BUSY = 0
>                            MEC1_PIPE1_BUSY = 0
>                            MEC1_PIPE2_BUSY = 0
>                            MEC1_PIPE3_BUSY = 0
>                            MEC2_LOAD_BUSY = 0
>                            MEC2_SEMAPOHRE_BUSY = 0
>                            MEC2_MUTEX_BUSY = 0
>                            MEC2_MESSAGE_BUSY = 0
>                            MEC2_EOP_QUEUE_BUSY = 0
>                            MEC2_IQ_QUEUE_BUSY = 0
>                            MEC2_IB_QUEUE_BUSY = 0
>                            MEC2_TC_BUSY = 0
>                            MEC2_DMA_BUSY = 0
>                            MEC2_PARTIAL_FLUSH_BUSY = 0
>                            MEC2_PIPE0_BUSY = 0
>                            MEC2_PIPE1_BUSY = 0
>                            MEC2_PIPE2_BUSY = 0
>                            MEC2_PIPE3_BUSY = 0
>        [1;33mCP_CPC_STALLED_STAT1[0m <- RCIU_TX_FREE_STALL = 0
>                                RCIU_PRIV_VIOLATION = 0
>                                TCIU_TX_FREE_STALL = 0
>                                MEC1_DECODING_PACKET = 0
>                                MEC1_WAIT_ON_RCIU = 0
>                                MEC1_WAIT_ON_RCIU_READ = 0
>                                MEC1_WAIT_ON_ROQ_DATA = 0
>                                MEC2_DECODING_PACKET = 0
>                                MEC2_WAIT_ON_RCIU = 0
>                                MEC2_WAIT_ON_RCIU_READ = 0
>                                MEC2_WAIT_ON_ROQ_DATA = 0
>                                ATCL2IU_WAITING_ON_FREE = 0
>                                ATCL2IU_WAITING_ON_TAGS = 0
>                                ATCL1_WAITING_ON_TRANS = 0
>        [1;33mCP_CPF_STATUS[0m <- POST_WPTR_GFX_BUSY = 1
>                         CSF_BUSY = 1
>                         ROQ_ALIGN_BUSY = 0
>                         ROQ_RING_BUSY = 1
>                         ROQ_INDIRECT1_BUSY = 1
>                         ROQ_INDIRECT2_BUSY = 0
>                         ROQ_STATE_BUSY = 0
>                         ROQ_CE_RING_BUSY = 0
>                         ROQ_CE_INDIRECT1_BUSY = 0
>                         ROQ_CE_INDIRECT2_BUSY = 0
>                         SEMAPHORE_BUSY = 0
>                         INTERRUPT_BUSY = 0
>                         TCIU_BUSY = 0
>                         HQD_BUSY = 0
>                         PRT_BUSY = 0
>                         ATCL2IU_BUSY = 0
>                         CPF_GFX_BUSY = 1
>                         CPF_CMP_BUSY = 0
>                         GRBM_CPF_STAT_BUSY = 3
>                         CPC_CPF_BUSY = 0
>                         CPF_BUSY = 1
>        [1;33mCP_CPF_BUSY_STAT[0m <- REG_BUS_FIFO_BUSY = 0
>                            CSF_RING_BUSY = 1
>                            CSF_INDIRECT1_BUSY = 1
>                            CSF_INDIRECT2_BUSY = 0
>                            CSF_STATE_BUSY = 0
>                            CSF_CE_INDR1_BUSY = 0
>                            CSF_CE_INDR2_BUSY = 0
>                            CSF_ARBITER_BUSY = 0
>                            CSF_INPUT_BUSY = 0
>                            OUTSTANDING_READ_TAGS = 0
>                            HPD_PROCESSING_EOP_BUSY = 0
>                            HQD_DISPATCH_BUSY = 0
>                            HQD_IQ_TIMER_BUSY = 0
>                            HQD_DMA_OFFLOAD_BUSY = 0
>                            HQD_WAIT_SEMAPHORE_BUSY = 0
>                            HQD_SIGNAL_SEMAPHORE_BUSY = 0
>                            HQD_MESSAGE_BUSY = 0
>                            HQD_PQ_FETCHER_BUSY = 0
>                            HQD_IB_FETCHER_BUSY = 0
>                            HQD_IQ_FETCHER_BUSY = 0
>                            HQD_EOP_FETCHER_BUSY = 0
>                            HQD_CONSUMED_RPTR_BUSY = 0
>                            HQD_FETCHER_ARB_BUSY = 0
>                            HQD_ROQ_ALIGN_BUSY = 0
>                            HQD_ROQ_EOP_BUSY = 0
>                            HQD_ROQ_IQ_BUSY = 0
>                            HQD_ROQ_PQ_BUSY = 0
>                            HQD_ROQ_IB_BUSY = 0
>                            HQD_WPTR_POLL_BUSY = 0
>                            HQD_PQ_BUSY = 0
>                            HQD_IB_BUSY = 0
>        [1;33mCP_CPF_STALLED_STAT1[0m <- RING_FETCHING_DATA = 0
>                                INDR1_FETCHING_DATA = 1
>                                INDR2_FETCHING_DATA = 0
>                                STATE_FETCHING_DATA = 0
>                                TCIU_WAITING_ON_FREE = 0
>                                TCIU_WAITING_ON_TAGS = 0
>                                ATCL2IU_WAITING_ON_FREE = 0
>                                ATCL2IU_WAITING_ON_TAGS = 0
>                                ATCL1_WAITING_ON_TRANS = 0
>
>[1;33mColor buffer 0:[0m
>  Info: npix_x=1680, npix_y=1050, npix_z=1, blk_w=1, blk_h=1, blk_d=1, array_size=1, last_level=0, bpe=4, nsamples=1, flags=0x110301, b8g8r8x8_unorm
>  Layout: size=8257536, alignment=131072, bankw=1, bankh=4, nbanks=16, mtilea=4, tilesplit=512, pipeconfig=12, scanout=1
>  Level[0]: offset=0, slice_size=8257536, npix_x=1680, npix_y=1050, npix_z=1, nblk_x=1792, nblk_y=1152, nblk_z=1, pitch_bytes=7168, mode=3
>
>SHADER KEY
>  instance_divisors = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
>  as_es = 0
>  as_ls = 0
>  export_prim_id = 0
>
>Vertex Shader as VS:
>Shader prolog disassembly:
>	v_add_i32_e32 v4, vcc, s12, v0 ; 3208000C
>	v_mov_b32_e32 v5, v4           ; 7E0A0304
>Shader main disassembly:
>	s_load_dwordx4 s[0:3], s[10:11], 0x0                 ; C00A0005 00000000
>	s_load_dwordx4 s[4:7], s[10:11], 0x10                ; C00A0105 00000010
>	s_waitcnt lgkmcnt(0)                                 ; BF8C007F
>	buffer_load_format_xyzw v[6:9], v4, s[0:3], 0 idxen  ; E00C2000 80000604
>	s_waitcnt vmcnt(0)                                   ; BF8C0F70
>	buffer_load_format_xyzw v[9:12], v5, s[4:7], 0 idxen ; E00C2000 80010905
>	s_waitcnt vmcnt(0)                                   ; BF8C0F70
>	exp 15, 32, 0, 0, 0, v9, v10, v0, v0                 ; C400020F 00000A09
>	s_waitcnt expcnt(0)                                  ; BF8C0F0F
>	v_mov_b32_e32 v0, 1.0                                ; 7E0002F2
>	exp 15, 12, 0, 1, 0, v6, v7, v8, v0                  ; C40008CF 00080706
>	s_waitcnt expcnt(0)                                  ; BF8C0F0F
>Shader epilog disassembly:
>	s_endpgm ; BF810000
>
>*** SHADER STATS ***
>SGPRS: 80
>VGPRS: 16
>Spilled VGPRs: 0
>Code Size: 84 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>SHADER KEY
>  prolog.color_two_side = 0
>  prolog.poly_stipple = 0
>  prolog.force_persample_interp = 0
>  epilog.spi_shader_col_format = 0x4
>  epilog.color_is_int8 = 0x0
>  epilog.last_cbuf = 0
>  epilog.alpha_func = 7
>  epilog.alpha_to_one = 0
>  epilog.poly_line_smoothing = 0
>  epilog.clamp_color = 0
>
>Pixel Shader:
>Shader main disassembly:
>	s_wqm_b64 exec, exec                                    ; BEFE077E
>	s_load_dwordx8 s[12:19], s[4:5], 0x0                    ; C00E0302 00000000
>	s_load_dwordx4 s[0:3], s[4:5], 0x30                     ; C00A0002 00000030
>	s_mov_b32 m0, s11                                       ; BEFC000B
>	v_interp_p1_f32 v0, v2, 0, 0, [m0]                      ; D4000002
>	v_interp_p2_f32 v0, [v0], v3, 0, 0, [m0]                ; D4010003
>	v_interp_p1_f32 v1, v2, 1, 0, [m0]                      ; D4040102
>	v_interp_p2_f32 v1, [v1], v3, 1, 0, [m0]                ; D4050103
>	s_waitcnt lgkmcnt(0)                                    ; BF8C007F
>	image_sample v[0:3], v[0:1], s[12:19], s[0:3] dmask:0xf ; F0800F00 00030000
>	s_waitcnt vmcnt(0)                                      ; BF8C0F70
>Shader epilog disassembly:
>	v_cvt_pkrtz_f16_f32_e64 v0, v0, v1 ; D2960000 00020300
>	v_cvt_pkrtz_f16_f32_e64 v1, v2, v3 ; D2960001 00020702
>	exp 15, 0, 1, 1, 1, v0, v1, v0, v0 ; C4001C0F 00000100
>	s_endpgm                           ; BF810000
>
>*** SHADER CONFIG ***
>SPI_PS_INPUT_ADDR = 0xd077
>SPI_PS_INPUT_ENA  = 0x0002
>*** SHADER STATS ***
>SGPRS: 80
>VGPRS: 15
>Spilled VGPRs: 0
>Code Size: 84 bytes
>LDS: 0 blocks
>Scratch: 0 bytes per wave
>Max Waves: 10
>********************
>Buffer list (in units of pages = 4kB):
>[1;33m        Size    VM start page         VM end page           Usage[0m
>          16    0x000000010004b       0x000000010005b       BORDER_COLORS
>           1    0x000000010005b       0x000000010005c       IB2
>          19    -- hole --
>           8    0x000000010006f       0x0000000100077       SAMPLER_TEXTURE
>          24    -- hole --
>           4    0x000000010008f       0x0000000100093       VERTEX_BUFFER
>        2126    -- hole --
>          16    0x00000001008e1       0x00000001008f1       CONST_BUFFER
>           1    0x00000001008f1       0x00000001008f2       CONST_BUFFER
>           1    0x00000001008f2       0x00000001008f3       VERTEX_BUFFER
>           1    0x00000001008f3       0x00000001008f4       USER_SHADER
>           1    0x00000001008f4       0x00000001008f5       USER_SHADER
>           1    0x00000001008f5       0x00000001008f6       USER_SHADER
>           1    0x00000001008f6       0x00000001008f7       USER_SHADER
>           1    0x00000001008f7       0x00000001008f8       USER_SHADER
>         297    -- hole --
>        1000    0x0000000100a21       0x0000000100e09       CONST_BUFFER
>        1000    0x0000000100e09       0x00000001011f1       CONST_BUFFER
>          63    0x00000001011f1       0x0000000101230       CONST_BUFFER
>          63    0x0000000101230       0x000000010126f       CONST_BUFFER
>         177    -- hole --
>        2024    0x0000000101320       0x0000000101b08       COLOR_BUFFER
>         256    0x0000000101b08       0x0000000101c08       RINGS_STREAMOUT
>         256    0x0000000101c08       0x0000000101d08       DESCRIPTORS
>        1135    -- hole --
>           4    0x0000000102177       0x000000010217b       SAMPLER_TEXTURE
>         261    -- hole --
>          64    0x0000000102280       0x00000001022c0       SAMPLER_TEXTURE
>        2802    -- hole --
>           2    0x0000000102db2       0x0000000102db4       VERTEX_BUFFER
>           2    0x0000000102db4       0x0000000102db6       INDEX_BUFFER
>          36    -- hole --
>          27    0x0000000102dda       0x0000000102df5       VERTEX_BUFFER
>           5    0x0000000102df5       0x0000000102dfa       INDEX_BUFFER
>           2    -- hole --
>          12    0x0000000102dfc       0x0000000102e08       VERTEX_BUFFER
>           2    0x0000000102e08       0x0000000102e0a       INDEX_BUFFER
>         326    -- hole --
>          11    0x0000000102f50       0x0000000102f5b       VERTEX_BUFFER
>           2    0x0000000102f5b       0x0000000102f5d       INDEX_BUFFER
>          55    -- hole --
>          38    0x0000000102f94       0x0000000102fba       VERTEX_BUFFER
>           6    0x0000000102fba       0x0000000102fc0       INDEX_BUFFER
>        1091    -- hole --
>           1    0x0000000103403       0x0000000103404       USER_SHADER
>           9    -- hole --
>           1    0x000000010340d       0x000000010340e       USER_SHADER
>           1    0x000000010340e       0x000000010340f       USER_SHADER
>         896    -- hole --
>           1    0x000000010378f       0x0000000103790       SAMPLER_TEXTURE
>         536    -- hole --
>          16    0x00000001039a8       0x00000001039b8       SAMPLER_TEXTURE
>         808    -- hole --
>          17    0x0000000103ce0       0x0000000103cf1       SAMPLER_TEXTURE
>          59    -- hole --
>           1    0x0000000103d2c       0x0000000103d2d       SAMPLER_TEXTURE
>           2    -- hole --
>           1    0x0000000103d2f       0x0000000103d30       VERTEX_BUFFER
>          17    -- hole --
>           1    0x0000000103d41       0x0000000103d42       SAMPLER_TEXTURE
>        3582    -- hole --
>        2024    0x0000000104b40       0x0000000105328       SAMPLER_TEXTURE, COLOR_BUFFER
>        6136    -- hole --
>        2024    0x0000000106b20       0x0000000107308       SAMPLER_TEXTURE, COLOR_BUFFER
>          24    -- hole --
>        2024    0x0000000107320       0x0000000107b08       SAMPLER_TEXTURE, COLOR_BUFFER
>        2104    -- hole --
>         386    0x0000000108340       0x00000001084c2       SAMPLER_TEXTURE
>        2750    -- hole --
>        1285    0x0000000108f80       0x0000000109485       CP_DMA, SAMPLER_TEXTURE, COLOR_BUFFER
>        2715    -- hole --
>        2024    0x0000000109f20       0x000000010a708       SAMPLER_TEXTURE
>           1    -- hole --
>           1    0x000000010a709       0x000000010a70a       USER_SHADER
>           1    0x000000010a70a       0x000000010a70b       USER_SHADER
>           1    -- hole --
>           1    0x000000010a70c       0x000000010a70d       CMASK
>          51    -- hole --
>        1285    0x000000010a740       0x000000010ac45       SAMPLER_TEXTURE, COLOR_BUFFER
>          16    -- hole --
>           1    0x000000010ac55       0x000000010ac56       USER_SHADER
>           1    0x000000010ac56       0x000000010ac57       USER_SHADER
>          36    -- hole --
>           1    0x000000010ac7b       0x000000010ac7c       SCRATCH_BUFFER
>        2180    -- hole --
>         386    0x000000010b500       0x000000010b682       CP_DMA, SAMPLER_TEXTURE, COLOR_BUFFER
>          62    -- hole --
>         386    0x000000010b6c0       0x000000010b842       SAMPLER_TEXTURE, COLOR_BUFFER
>        1470    -- hole --
>         386    0x000000010be00       0x000000010bf82       CP_DMA, SAMPLER_TEXTURE, COLOR_BUFFER
>          62    -- hole --
>         386    0x000000010bfc0       0x000000010c142       SAMPLER_TEXTURE, COLOR_BUFFER
>         512    0x000000010c142       0x000000010c342       VERTEX_BUFFER
>        3626    -- hole --
>         512    0x000000010d16c       0x000000010d36c       CONST_BUFFER, DESCRIPTORS
>        7700    -- hole --
>           1    0x000000010f180       0x000000010f181       USER_SHADER
>           1    0x000000010f181       0x000000010f182       USER_SHADER
>           1    0x000000010f182       0x000000010f183       USER_SHADER
>           1    0x000000010f183       0x000000010f184       USER_SHADER
>           1    0x000000010f184       0x000000010f185       USER_SHADER
>         652    -- hole --
>           1    0x000000010f411       0x000000010f412       USER_SHADER
>           1    0x000000010f412       0x000000010f413       USER_SHADER
>           1    0x000000010f413       0x000000010f414       USER_SHADER
>           1    0x000000010f414       0x000000010f415       USER_SHADER
>           3    -- hole --
>           1    0x000000010f418       0x000000010f419       USER_SHADER
>           1    0x000000010f419       0x000000010f41a       USER_SHADER
>           1    0x000000010f41a       0x000000010f41b       USER_SHADER
>           1    0x000000010f41b       0x000000010f41c       USER_SHADER
>           1    0x000000010f41c       0x000000010f41d       USER_SHADER
>           1    0x000000010f41d       0x000000010f41e       USER_SHADER
>           1    0x000000010f41e       0x000000010f41f       USER_SHADER
>           1    0x000000010f41f       0x000000010f420       USER_SHADER
>        2464    -- hole --
>         172    0x000000010fdc0       0x000000010fe6c       SAMPLER_TEXTURE
>        3968    -- hole --
>          64    0x0000000110dec       0x0000000110e2c       HTILE
>         736    -- hole --
>          64    0x000000011110c       0x000000011114c       CONST_BUFFER
>          44    -- hole --
>           1    0x0000000111178       0x0000000111179       USER_SHADER
>           1    0x0000000111179       0x000000011117a       USER_SHADER
>           1    0x000000011117a       0x000000011117b       USER_SHADER
>           1    0x000000011117b       0x000000011117c       USER_SHADER
>        5592    -- hole --
>          16    0x0000000112754       0x0000000112764       CONST_BUFFER
>         916    -- hole --
>           1    0x0000000112af8       0x0000000112af9       USER_SHADER
>           1    0x0000000112af9       0x0000000112afa       USER_SHADER
>           1    -- hole --
>           1    0x0000000112afb       0x0000000112afc       USER_SHADER
>           1    0x0000000112afc       0x0000000112afd       USER_SHADER
>        7706    -- hole --
>           1    0x0000000114917       0x0000000114918       USER_SHADER
>           1    0x0000000114918       0x0000000114919       USER_SHADER
>        2056    -- hole --
>           6    0x0000000115121       0x0000000115127       SAMPLER_TEXTURE, COLOR_BUFFER
>         167    -- hole --
>           1    0x00000001151ce       0x00000001151cf       USER_SHADER
>           1    0x00000001151cf       0x00000001151d0       USER_SHADER
>           1    0x00000001151d0       0x00000001151d1       USER_SHADER
>          12    -- hole --
>           1    0x00000001151dd       0x00000001151de       USER_SHADER
>           2    -- hole --
>           1    0x00000001151e0       0x00000001151e1       USER_SHADER
>          15    -- hole --
>           1    0x00000001151f0       0x00000001151f1       USER_SHADER
>          19    -- hole --
>           1    0x0000000115204       0x0000000115205       USER_SHADER
>           1    0x0000000115205       0x0000000115206       USER_SHADER
>           1    0x0000000115206       0x0000000115207       USER_SHADER
>           1    0x0000000115207       0x0000000115208       USER_SHADER
>          14    -- hole --
>           1    0x0000000115216       0x0000000115217       USER_SHADER
>           1    0x0000000115217       0x0000000115218       USER_SHADER
>           8    -- hole --
>           1    0x0000000115220       0x0000000115221       USER_SHADER
>           1    0x0000000115221       0x0000000115222       USER_SHADER
>           3    -- hole --
>           1    0x0000000115225       0x0000000115226       USER_SHADER
>           1    0x0000000115226       0x0000000115227       USER_SHADER
>           1    0x0000000115227       0x0000000115228       USER_SHADER
>           1    0x0000000115228       0x0000000115229       USER_SHADER
>           1    0x0000000115229       0x000000011522a       USER_SHADER
>           1    0x000000011522a       0x000000011522b       USER_SHADER
>        1028    -- hole --
>           1    0x000000011562f       0x0000000115630       USER_SHADER
>          28    -- hole --
>           1    0x000000011564c       0x000000011564d       USER_SHADER
>          52    -- hole --
>           1    0x0000000115681       0x0000000115682       USER_SHADER
>           1    0x0000000115682       0x0000000115683       USER_SHADER
>          61    -- hole --
>        4048    0x00000001156c0       0x0000000116690       SAMPLER_TEXTURE, COLOR_BUFFER
>          48    -- hole --
>        4048    0x00000001166c0       0x0000000117690       SAMPLER_TEXTURE, COLOR_BUFFER
>          48    -- hole --
>        1285    0x00000001176c0       0x0000000117bc5       SAMPLER_TEXTURE, COLOR_BUFFER
>        1371    -- hole --
>        2024    0x0000000118120       0x0000000118908       SAMPLER_TEXTURE, COLOR_BUFFER
>        9312    -- hole --
>        4096    0x000000011ad68       0x000000011bd68       DEPTH_BUFFER
>        5144    -- hole --
>        1285    0x000000011d180       0x000000011d685       SAMPLER_TEXTURE, COLOR_BUFFER
>           2    -- hole --
>           1    0x000000011d687       0x000000011d688       USER_SHADER
>           1    0x000000011d688       0x000000011d689       USER_SHADER
>           1    0x000000011d689       0x000000011d68a       USER_SHADER
>           1    0x000000011d68a       0x000000011d68b       USER_SHADER
>           1    0x000000011d68b       0x000000011d68c       USER_SHADER
>           1    0x000000011d68c       0x000000011d68d       USER_SHADER
>       19722    -- hole --
>           1    0x0000000122397       0x0000000122398       IB1
>        9422    -- hole --
>         512    0x0000000124866       0x0000000124a66       VERTEX_BUFFER
>        7412    -- hole --
>          23    0x000000012675a       0x0000000126771       SAMPLER_TEXTURE
>         375    -- hole --
>         177    0x00000001268e8       0x0000000126999       SAMPLER_TEXTURE
>         595    -- hole --
>         128    0x0000000126bec       0x0000000126c6c       VERTEX_BUFFER
>         107    -- hole --
>         128    0x0000000126cd7       0x0000000126d57       VERTEX_BUFFER
>         649    -- hole --
>          32    0x0000000126fe0       0x0000000127000       VERTEX_BUFFER
>         172    -- hole --
>          13    0x00000001270ac       0x00000001270b9       SAMPLER_TEXTURE
>        1070    -- hole --
>          23    0x00000001274e7       0x00000001274fe       SAMPLER_TEXTURE
>        2713    -- hole --
>          64    0x0000000127f97       0x0000000127fd7       IB1
>         233    -- hole --
>         172    0x00000001280c0       0x000000012816c       SAMPLER_TEXTURE
>         340    -- hole --
>         172    0x00000001282c0       0x000000012836c       SAMPLER_TEXTURE
>        1670    -- hole --
>          16    0x00000001289f2       0x0000000128a02       INDEX_BUFFER
>          22    0x0000000128a02       0x0000000128a18       SAMPLER_TEXTURE
>         367    -- hole --
>          22    0x0000000128b87       0x0000000128b9d       SAMPLER_TEXTURE
>         478    -- hole --
>          44    0x0000000128d7b       0x0000000128da7       SAMPLER_TEXTURE
>        1021    -- hole --
>           6    0x00000001291a4       0x00000001291aa       VERTEX_BUFFER
>           5    0x00000001291aa       0x00000001291af       VERTEX_BUFFER
>         175    -- hole --
>           2    0x000000012925e       0x0000000129260       SAMPLER_TEXTURE
>           2    0x0000000129260       0x0000000129262       SAMPLER_TEXTURE
>           2    0x0000000129262       0x0000000129264       SAMPLER_TEXTURE
>           5    0x0000000129264       0x0000000129269       INDEX_BUFFER
>           2    0x0000000129269       0x000000012926b       VERTEX_BUFFER
>        3989    -- hole --
>          64    0x000000012a200       0x000000012a240       IB1
>        2721    -- hole --
>          23    0x000000012ace1       0x000000012acf8       SAMPLER_TEXTURE
>         808    -- hole --
>          32    0x000000012b020       0x000000012b040       IB1
>        3925    -- hole --
>          12    0x000000012bf95       0x000000012bfa1       SAMPLER_TEXTURE
>        1493    -- hole --
>           1    0x000000012c576       0x000000012c577       INDEX_BUFFER
>           2    0x000000012c577       0x000000012c579       VERTEX_BUFFER
>           1    0x000000012c579       0x000000012c57a       VERTEX_BUFFER
>           1    0x000000012c57a       0x000000012c57b       VERTEX_BUFFER
>        1569    -- hole

Actions: View

Attachments on bug 90481: 115834 | 115859 | 121426 | 121577 | 124508 | 125752 | 125754 | 125765

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