Attachment 16317 Details for Bug 15432 – Xorg.0.log

Xorg.0.log

Xorg.0.log (text/plain), 32.72 KB, created by Billy Macdonald on 2008-05-02 18:34:57 UTC

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Creator: Billy Macdonald

Created: 2008-05-02 18:34:57 UTC

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>
>X Window System Version 1.3.0
>Release Date: 19 April 2007
>X Protocol Version 11, Revision 0, Release 1.3
>Build Operating System: Fedora 8 Red Hat, Inc.
>Current Operating System: Linux myth04 2.6.24.5-85.fc8 #1 SMP Sat Apr 19 12:39:34 EDT 2008 i686
>Build Date: 14 March 2008
>Build ID: xorg-x11-server 1.3.0.0-44.fc8 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Fri May  2 21:33:19 2008
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "single head configuration"
>(**) |-->Screen "Screen0" (0)
>(**) |   |-->Monitor "<default monitor>"
>(**) |   |-->Device "Videocard0"
>(WW) No monitor specified for screen "Screen0".
>	Using a default monitor configuration.
>(**) |-->Input Device "Keyboard0"
>(==) |-->Input Device "<default pointer>"
>(WW) The core pointer device wasn't specified explicitly in the layout.
>	Using the default mouse configuration.
>(WW) No FontPath specified.  Using compiled-in default.
>(==) FontPath set to:
>	catalogue:/etc/X11/fontpath.d,
>	built-ins
>(==) RgbPath set to "/usr/share/X11/rgb"
>(==) ModulePath set to "/usr/lib/xorg/modules"
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) Loader magic: 0x820cfa0
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.3
>	X.Org Video Driver: 1.2
>	X.Org XInput driver : 0.7
>	X.Org Server Extension : 0.3
>	X.Org Font Renderer : 0.5
>(II) Loader running on linux
>(II) LoadModule: "pcidata"
>(II) Loading /usr/lib/xorg/modules//libpcidata.so
>(II) Module pcidata: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.2
>(++) using VT number 7
>
>(II) PCI: PCI scan (all values are in hex)
>(II) PCI: 00:00:0: chip 8086,2580 card 1028,0179 rev 04 class 06,00,00 hdr 00
>(II) PCI: 00:01:0: chip 8086,2581 card 0000,0000 rev 04 class 06,04,00 hdr 01
>(II) PCI: 00:02:0: chip 8086,2582 card 1028,0179 rev 04 class 03,00,00 hdr 80
>(II) PCI: 00:02:1: chip 8086,2782 card 1028,0179 rev 04 class 03,80,00 hdr 80
>(II) PCI: 00:1c:0: chip 8086,2660 card 0000,0000 rev 03 class 06,04,00 hdr 81
>(II) PCI: 00:1c:1: chip 8086,2662 card 0000,0000 rev 03 class 06,04,00 hdr 81
>(II) PCI: 00:1d:0: chip 8086,2658 card 1028,0179 rev 03 class 0c,03,00 hdr 80
>(II) PCI: 00:1d:1: chip 8086,2659 card 1028,0179 rev 03 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:2: chip 8086,265a card 1028,0179 rev 03 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:3: chip 8086,265b card 1028,0179 rev 03 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:7: chip 8086,265c card 1028,0179 rev 03 class 0c,03,20 hdr 00
>(II) PCI: 00:1e:0: chip 8086,244e card 0000,0000 rev d3 class 06,04,01 hdr 81
>(II) PCI: 00:1e:2: chip 8086,266e card 1028,0179 rev 03 class 04,01,00 hdr 00
>(II) PCI: 00:1f:0: chip 8086,2640 card 0000,0000 rev 03 class 06,01,00 hdr 80
>(II) PCI: 00:1f:1: chip 8086,266f card 1028,0179 rev 03 class 01,01,8a hdr 00
>(II) PCI: 00:1f:2: chip 8086,2651 card 1028,0179 rev 03 class 01,01,8f hdr 00
>(II) PCI: 00:1f:3: chip 8086,266a card 1028,0179 rev 03 class 0c,05,00 hdr 00
>(II) PCI: 02:00:0: chip 14e4,1677 card 1028,0179 rev 01 class 02,00,00 hdr 00
>(II) PCI: 04:01:0: chip 4444,0803 card 0070,4001 rev 01 class 04,00,00 hdr 00
>(II) PCI: End of PCI scan
>(II) Intel Bridge workaround enabled
>(II) Host-to-PCI bridge:
>(II) Bus 0: bridge is at (0:0:0), (0,0,4), BCTRL: 0x0008 (VGA_EN is set)
>(II) Bus 0 I/O range:
>	[0] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) Bus 0 non-prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) Bus 0 prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 1: bridge is at (0:1:0), (0,1,1), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 1 non-prefetchable memory range:
>	[0] -1	0	0xdfd00000 - 0xdfdfffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 2: bridge is at (0:28:0), (0,2,2), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 2 non-prefetchable memory range:
>	[0] -1	0	0xdfc00000 - 0xdfcfffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 3: bridge is at (0:28:1), (0,3,3), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 3 non-prefetchable memory range:
>	[0] -1	0	0xdfb00000 - 0xdfbfffff (0x100000) MX[B]
>(II) Subtractive PCI-to-PCI bridge:
>(II) Bus 4: bridge is at (0:30:0), (0,4,4), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 4 prefetchable memory range:
>	[0] -1	0	0xd0000000 - 0xd3ffffff (0x4000000) MX[B]
>(II) PCI-to-ISA bridge:
>(II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
>(--) PCI:*(0:2:0) Intel Corporation 82915G/GV/910GL Integrated Graphics Controller rev 4, Mem @ 0xdff00000/19, 0xc0000000/28, 0xdfec0000/18, I/O @ 0xe898/3
>(--) PCI: (0:2:1) Intel Corporation 82915G Integrated Graphics Controller rev 4, Mem @ 0xdff80000/19
>(--) PCI: (4:1:0) unknown vendor (0x4444) unknown chipset (0x0803) rev 1, Mem @ 0xd0000000/26
>(II) Addressable bus resource ranges are
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>	[1] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) OS-reported resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) Active PCI resource ranges:
>	[0] -1	0	0xdfcf0000 - 0xdfcfffff (0x10000) MX[B]
>	[1] -1	0	0xdfebfd00 - 0xdfebfdff (0x100) MX[B]
>	[2] -1	0	0xdfebfe00 - 0xdfebffff (0x200) MX[B]
>	[3] -1	0	0xffa80800 - 0xffa80bff (0x400) MX[B]
>	[4] -1	0	0xd0000000 - 0xd3ffffff (0x4000000) MX[B](B)
>	[5] -1	0	0xdff80000 - 0xdfffffff (0x80000) MX[B](B)
>	[6] -1	0	0xdfec0000 - 0xdfefffff (0x40000) MX[B](B)
>	[7] -1	0	0xc0000000 - 0xcfffffff (0x10000000) MX[B](B)
>	[8] -1	0	0xdff00000 - 0xdff7ffff (0x80000) MX[B](B)
>	[9] -1	0	0x0000e8a0 - 0x0000e8bf (0x20) IX[B]
>	[10] -1	0	0x0000fea0 - 0x0000feaf (0x10) IX[B]
>	[11] -1	0	0x0000fe30 - 0x0000fe33 (0x4) IX[B]
>	[12] -1	0	0x0000fe20 - 0x0000fe27 (0x8) IX[B]
>	[13] -1	0	0x0000fe10 - 0x0000fe13 (0x4) IX[B]
>	[14] -1	0	0x0000fe00 - 0x0000fe07 (0x8) IX[B]
>	[15] -1	0	0x0000ffa0 - 0x0000ffaf (0x10) IX[B]
>	[16] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[17] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[18] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[19] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[20] -1	0	0x0000e8c0 - 0x0000e8ff (0x40) IX[B]
>	[21] -1	0	0x0000ec00 - 0x0000ecff (0x100) IX[B]
>	[22] -1	0	0x0000ff20 - 0x0000ff3f (0x20) IX[B]
>	[23] -1	0	0x0000ff40 - 0x0000ff5f (0x20) IX[B]
>	[24] -1	0	0x0000ff60 - 0x0000ff7f (0x20) IX[B]
>	[25] -1	0	0x0000ff80 - 0x0000ff9f (0x20) IX[B]
>	[26] -1	0	0x0000e898 - 0x0000e89f (0x8) IX[B](B)
>(II) Active PCI resource ranges after removing overlaps:
>	[0] -1	0	0xdfcf0000 - 0xdfcfffff (0x10000) MX[B]
>	[1] -1	0	0xdfebfd00 - 0xdfebfdff (0x100) MX[B]
>	[2] -1	0	0xdfebfe00 - 0xdfebffff (0x200) MX[B]
>	[3] -1	0	0xffa80800 - 0xffa80bff (0x400) MX[B]
>	[4] -1	0	0xd0000000 - 0xd3ffffff (0x4000000) MX[B](B)
>	[5] -1	0	0xdff80000 - 0xdfffffff (0x80000) MX[B](B)
>	[6] -1	0	0xdfec0000 - 0xdfefffff (0x40000) MX[B](B)
>	[7] -1	0	0xc0000000 - 0xcfffffff (0x10000000) MX[B](B)
>	[8] -1	0	0xdff00000 - 0xdff7ffff (0x80000) MX[B](B)
>	[9] -1	0	0x0000e8a0 - 0x0000e8bf (0x20) IX[B]
>	[10] -1	0	0x0000fea0 - 0x0000feaf (0x10) IX[B]
>	[11] -1	0	0x0000fe30 - 0x0000fe33 (0x4) IX[B]
>	[12] -1	0	0x0000fe20 - 0x0000fe27 (0x8) IX[B]
>	[13] -1	0	0x0000fe10 - 0x0000fe13 (0x4) IX[B]
>	[14] -1	0	0x0000fe00 - 0x0000fe07 (0x8) IX[B]
>	[15] -1	0	0x0000ffa0 - 0x0000ffaf (0x10) IX[B]
>	[16] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[17] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[18] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[19] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[20] -1	0	0x0000e8c0 - 0x0000e8ff (0x40) IX[B]
>	[21] -1	0	0x0000ec00 - 0x0000ecff (0x100) IX[B]
>	[22] -1	0	0x0000ff20 - 0x0000ff3f (0x20) IX[B]
>	[23] -1	0	0x0000ff40 - 0x0000ff5f (0x20) IX[B]
>	[24] -1	0	0x0000ff60 - 0x0000ff7f (0x20) IX[B]
>	[25] -1	0	0x0000ff80 - 0x0000ff9f (0x20) IX[B]
>	[26] -1	0	0x0000e898 - 0x0000e89f (0x8) IX[B](B)
>(II) OS-reported resource ranges after removing overlaps with PCI:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) All system resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xdfcf0000 - 0xdfcfffff (0x10000) MX[B]
>	[5] -1	0	0xdfebfd00 - 0xdfebfdff (0x100) MX[B]
>	[6] -1	0	0xdfebfe00 - 0xdfebffff (0x200) MX[B]
>	[7] -1	0	0xffa80800 - 0xffa80bff (0x400) MX[B]
>	[8] -1	0	0xd0000000 - 0xd3ffffff (0x4000000) MX[B](B)
>	[9] -1	0	0xdff80000 - 0xdfffffff (0x80000) MX[B](B)
>	[10] -1	0	0xdfec0000 - 0xdfefffff (0x40000) MX[B](B)
>	[11] -1	0	0xc0000000 - 0xcfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xdff00000 - 0xdff7ffff (0x80000) MX[B](B)
>	[13] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[14] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[15] -1	0	0x0000e8a0 - 0x0000e8bf (0x20) IX[B]
>	[16] -1	0	0x0000fea0 - 0x0000feaf (0x10) IX[B]
>	[17] -1	0	0x0000fe30 - 0x0000fe33 (0x4) IX[B]
>	[18] -1	0	0x0000fe20 - 0x0000fe27 (0x8) IX[B]
>	[19] -1	0	0x0000fe10 - 0x0000fe13 (0x4) IX[B]
>	[20] -1	0	0x0000fe00 - 0x0000fe07 (0x8) IX[B]
>	[21] -1	0	0x0000ffa0 - 0x0000ffaf (0x10) IX[B]
>	[22] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[23] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[24] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[25] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[26] -1	0	0x0000e8c0 - 0x0000e8ff (0x40) IX[B]
>	[27] -1	0	0x0000ec00 - 0x0000ecff (0x100) IX[B]
>	[28] -1	0	0x0000ff20 - 0x0000ff3f (0x20) IX[B]
>	[29] -1	0	0x0000ff40 - 0x0000ff5f (0x20) IX[B]
>	[30] -1	0	0x0000ff60 - 0x0000ff7f (0x20) IX[B]
>	[31] -1	0	0x0000ff80 - 0x0000ff9f (0x20) IX[B]
>	[32] -1	0	0x0000e898 - 0x0000e89f (0x8) IX[B](B)
>(II) LoadModule: "extmod"
>(II) Loading /usr/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "dbe"
>(II) Loading /usr/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "glx"
>(II) Loading /usr/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(==) AIGLX enabled
>(II) Loading extension GLX
>(II) LoadModule: "freetype"
>(II) Loading /usr/lib/xorg/modules/fonts//libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 1.3.0, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font FreeType
>(II) LoadModule: "type1"
>(II) Loading /usr/lib/xorg/modules/fonts//libtype1.so
>(II) Module type1: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.2
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font Type1
>(II) LoadModule: "record"
>(II) Loading /usr/lib/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension RECORD
>(II) LoadModule: "dri"
>(II) Loading /usr/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "intel"
>(II) Loading /usr/lib/xorg/modules/drivers//intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 2.3.0
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 1.2
>(II) LoadModule: "kbd"
>(II) Loading /usr/lib/xorg/modules/input//kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.2.2
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 0.7
>(II) LoadModule: "mouse"
>(II) Loading /usr/lib/xorg/modules/input//mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.2.3
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 0.7
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, G35, 965Q, 946GZ,
>	965GM, 965GME/GLE, G33, Q35, Q33, Intel Integrated Graphics Device
>(II) Primary Device is: PCI 00:02:0
>(--) Assigning device section with no busID to primary device
>(WW) intel: No matching Device section for instance (BusID PCI:0:2:1) found
>(--) Chipset 915G found
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xdfcf0000 - 0xdfcfffff (0x10000) MX[B]
>	[5] -1	0	0xdfebfd00 - 0xdfebfdff (0x100) MX[B]
>	[6] -1	0	0xdfebfe00 - 0xdfebffff (0x200) MX[B]
>	[7] -1	0	0xffa80800 - 0xffa80bff (0x400) MX[B]
>	[8] -1	0	0xd0000000 - 0xd3ffffff (0x4000000) MX[B](B)
>	[9] -1	0	0xdff80000 - 0xdfffffff (0x80000) MX[B](B)
>	[10] -1	0	0xdfec0000 - 0xdfefffff (0x40000) MX[B](B)
>	[11] -1	0	0xc0000000 - 0xcfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xdff00000 - 0xdff7ffff (0x80000) MX[B](B)
>	[13] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[14] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[15] -1	0	0x0000e8a0 - 0x0000e8bf (0x20) IX[B]
>	[16] -1	0	0x0000fea0 - 0x0000feaf (0x10) IX[B]
>	[17] -1	0	0x0000fe30 - 0x0000fe33 (0x4) IX[B]
>	[18] -1	0	0x0000fe20 - 0x0000fe27 (0x8) IX[B]
>	[19] -1	0	0x0000fe10 - 0x0000fe13 (0x4) IX[B]
>	[20] -1	0	0x0000fe00 - 0x0000fe07 (0x8) IX[B]
>	[21] -1	0	0x0000ffa0 - 0x0000ffaf (0x10) IX[B]
>	[22] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[23] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[24] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[25] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[26] -1	0	0x0000e8c0 - 0x0000e8ff (0x40) IX[B]
>	[27] -1	0	0x0000ec00 - 0x0000ecff (0x100) IX[B]
>	[28] -1	0	0x0000ff20 - 0x0000ff3f (0x20) IX[B]
>	[29] -1	0	0x0000ff40 - 0x0000ff5f (0x20) IX[B]
>	[30] -1	0	0x0000ff60 - 0x0000ff7f (0x20) IX[B]
>	[31] -1	0	0x0000ff80 - 0x0000ff9f (0x20) IX[B]
>	[32] -1	0	0x0000e898 - 0x0000e89f (0x8) IX[B](B)
>(II) resource ranges after probing:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xdfcf0000 - 0xdfcfffff (0x10000) MX[B]
>	[5] -1	0	0xdfebfd00 - 0xdfebfdff (0x100) MX[B]
>	[6] -1	0	0xdfebfe00 - 0xdfebffff (0x200) MX[B]
>	[7] -1	0	0xffa80800 - 0xffa80bff (0x400) MX[B]
>	[8] -1	0	0xd0000000 - 0xd3ffffff (0x4000000) MX[B](B)
>	[9] -1	0	0xdff80000 - 0xdfffffff (0x80000) MX[B](B)
>	[10] -1	0	0xdfec0000 - 0xdfefffff (0x40000) MX[B](B)
>	[11] -1	0	0xc0000000 - 0xcfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xdff00000 - 0xdff7ffff (0x80000) MX[B](B)
>	[13] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[14] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[15] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[16] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[17] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[18] -1	0	0x0000e8a0 - 0x0000e8bf (0x20) IX[B]
>	[19] -1	0	0x0000fea0 - 0x0000feaf (0x10) IX[B]
>	[20] -1	0	0x0000fe30 - 0x0000fe33 (0x4) IX[B]
>	[21] -1	0	0x0000fe20 - 0x0000fe27 (0x8) IX[B]
>	[22] -1	0	0x0000fe10 - 0x0000fe13 (0x4) IX[B]
>	[23] -1	0	0x0000fe00 - 0x0000fe07 (0x8) IX[B]
>	[24] -1	0	0x0000ffa0 - 0x0000ffaf (0x10) IX[B]
>	[25] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[26] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[27] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[28] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[29] -1	0	0x0000e8c0 - 0x0000e8ff (0x40) IX[B]
>	[30] -1	0	0x0000ec00 - 0x0000ecff (0x100) IX[B]
>	[31] -1	0	0x0000ff20 - 0x0000ff3f (0x20) IX[B]
>	[32] -1	0	0x0000ff40 - 0x0000ff5f (0x20) IX[B]
>	[33] -1	0	0x0000ff60 - 0x0000ff7f (0x20) IX[B]
>	[34] -1	0	0x0000ff80 - 0x0000ff9f (0x20) IX[B]
>	[35] -1	0	0x0000e898 - 0x0000e89f (0x8) IX[B](B)
>	[36] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[37] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Setting vga for screen 0.
>(II) Enabling PCI device
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Loading /usr/lib/xorg/modules//libint10.so
>(II) Module int10: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) Loading sub module "vbe"
>(II) LoadModule: "vbe"
>(II) Loading /usr/lib/xorg/modules//libvbe.so
>(II) Module vbe: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 1.1.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /usr/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.3.0, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 1.2
>(**) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "ModeDebug" "True"
>(**) intel(0): Option "XvMC" "true"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) 915G
>(--) intel(0): Chipset: "915G"
>(--) intel(0): Linear framebuffer at 0xC0000000
>(--) intel(0): IO registers at addr 0xDFF00000
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x80c80084 (enabled, pipe A, stall disabled, detected, SDVO mult 2)
>(II) intel(0):                SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected, SDVO mult 1)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x80c80084 (enabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000000
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x48000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x04ff02cf (1280, 720)
>(II) intel(0):            PIPEASTAT: 0x80020203 (status: FIFO_UNDERRUN VBLANK_INT_ENABLE VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):                 FPA0: 0x00040f06 (n = 4, m1 = 15, m2 = 6)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0xd4010000 (enabled, dvo, default clock, DAC/serial mode, p1 = 1, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x067104ff (1280 active, 1650 total)
>(II) intel(0):             HBLANK_A: 0x067104ff (1280 start, 1650 end)
>(II) intel(0):              HSYNC_A: 0x0595056d (1390 start, 1430 end)
>(II) intel(0):             VTOTAL_A: 0x02ed02cf (720 active, 750 total)
>(II) intel(0):             VBLANK_A: 0x02ed02cf (720 start, 750 end)
>(II) intel(0):              VSYNC_A: 0x02d902d4 (725 start, 730 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00020202 (status: VBLANK_INT_ENABLE VSYNC_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x84800000 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x0104008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x04
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x06
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x08
>(II) intel(0):                 AR09: 0x09
>(II) intel(0):                 AR0a: 0x0a
>(II) intel(0):                 AR0b: 0x0b
>(II) intel(0):                 AR0c: 0x0c
>(II) intel(0):                 AR0d: 0x0d
>(II) intel(0):                 AR0e: 0x0e
>(II) intel(0):                 AR0f: 0x0f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x07
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x01
>(II) intel(0):                 CR0f: 0x40
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 148800 n 4 m1 15 m2 6 p1 1 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(==) intel(0): Using EXA for acceleration
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"(II) Module already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"(II) Module already built-in
>(II) intel(0): Output VGA using monitor section CRT
>(**) intel(0): Option "Ignore" "True"
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70.
>(II) intel(0): I2C bus "SDVOB DDC Bus" initialized.
>(II) intel(0): SDVO: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
>(II) intel(0): SDVO: R: 04 AA 02 00 01 01 01 00 (Success)
>(II) intel(0): Output TMDS-1 using monitor section Samsung
>(**) intel(0): Option "Enable" "True"
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
>(II) intel(0): SDVO: R: C4 09 74 40             (Success)
>(II) intel(0): SDVO device VID/DID: 04:AA.02, clock range 25.0MHz - 165.0MHz, input 1: Y, input 2: N, output 1: Y, output 2: N
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at address 0x72.
>(II) intel(0): No SDVO device found on SDVOC
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" removed.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" removed.
>(II) intel(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R: 02                      (Success)
>(II) intel(0): Current clock rate multiplier: 2
>(II) intel(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R: 01 00                   (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Not supported)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: 00 00 00 00 00 00 00 00 (Not supported)
>(II) intel(0): SDVO: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVO: R: 00 00                   (Success)
>(II) intel(0): EDID for output TMDS-1
>(II) intel(0): Output TMDS-1 enabled by config file
>(EE) intel(0): Output TMDS-1 enabled but has no modes
>(EE) intel(0): No valid modes.
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Not supported)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Not supported)
>(II) intel(0): SDVO: W: 21 02                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVO: R: 00                      (Success)
>(EE) intel(0): First SDVO output reported failure to sync
>(II) intel(0): SDVO: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) UnloadModule: "intel"
>(II) UnloadModule: "vgahw"
>(II) Unloading /usr/lib/xorg/modules//libvgahw.so
>(II) UnloadModule: "vbe"
>(II) Unloading /usr/lib/xorg/modules//libvbe.so
>(II) UnloadModule: "int10"
>(II) Unloading /usr/lib/xorg/modules//libint10.so
>(EE) Screen(s) found, but none have a usable configuration.
>
>Fatal server error:
>no screens found

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Attachments on bug 15432: 15790 | 15791 | 15792 | 16317 | 16339

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