Attachment 1933 Details for Bug 2481 – Proposed fix

[patch] Proposed fix

patch (text/plain), 3.13 KB, created by Stephane Marchesin on 2005-02-18 07:21:17 UTC

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Creator: Stephane Marchesin

Created: 2005-02-18 07:21:17 UTC

Size: 3.13 KB

patch

obsolete

>Index: radeon.h
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h,v
>retrieving revision 1.17
>diff -u -r1.17 radeon.h
>--- radeon.h	26 Jan 2005 18:23:40 -0000	1.17
>+++ radeon.h	18 Feb 2005 15:12:14 -0000
>@@ -428,6 +428,7 @@
>     DGAFunctionRec    DGAFuncs;
> 
>     RADEONFBLayout    CurrentLayout;
>+    CARD32            dst_pitch_offset;
> #ifdef XF86DRI
>     Bool              noBackBuffer;
>     Bool              directRenderingEnabled;
>@@ -524,8 +525,6 @@
>     CARD32            backPitchOffset;
>     CARD32            depthPitchOffset;
> 
>-    CARD32            dst_pitch_offset;
>-
> 				/* offscreen memory management */
>     int               backLines;
>     FBAreaPtr         backArea;
>Index: radeon_dri.h
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h,v
>retrieving revision 1.4
>diff -u -r1.4 radeon_dri.h
>--- radeon_dri.h	12 Dec 2004 02:00:48 -0000	1.4
>+++ radeon_dri.h	18 Feb 2005 15:12:14 -0000
>@@ -58,9 +58,6 @@
> 
> #define RADEON_CARD_TYPE_RADEON       1
> 
>-/* Buffer are aligned on 4096 byte boundaries */
>-#define RADEON_BUFFER_ALIGN           0x00000fff
>-
> #define RADEONCP_USE_RING_BUFFER(m)					\
>     (((m) == RADEON_CSQ_PRIBM_INDDIS) ||				\
>      ((m) == RADEON_CSQ_PRIBM_INDBM))
>Index: radeon_driver.c
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c,v
>retrieving revision 1.41
>diff -u -r1.41 radeon_driver.c
>--- radeon_driver.c	9 Feb 2005 02:22:39 -0000	1.41
>+++ radeon_driver.c	18 Feb 2005 15:12:15 -0000
>@@ -4997,7 +4997,6 @@
> 	    info->directRenderingEnabled = RADEONDRIScreenInit(pScreen);
> 	}
>     }
>-#endif
> 
>     /* Depth moves are disabled by default since they are extremely slow */
>     info->depthMoves = xf86ReturnOptValBool(info->Options,
>@@ -5012,6 +5011,7 @@
> 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
> 		   "Depth moves disabled by default\n");
>     }
>+#endif
> 
>     RADEONSetFBLocation(pScrn);
> 
>@@ -7871,7 +7871,10 @@
>     }
>     crtcoffsetcntl = INREG(regcntl) & ~0xf;
>     /* try to get rid of flickering when scrolling at least for 2d */
>-    if (!info->have3DWindows) crtcoffsetcntl &= ~RADEON_CRTC_OFFSET_FLIP_CNTL;
>+#ifdef XF86DRI
>+    if (!info->have3DWindows)
>+#endif
>+    crtcoffsetcntl &= ~RADEON_CRTC_OFFSET_FLIP_CNTL;
>     if (info->tilingEnabled) {
> 	int byteshift = info->CurrentLayout.bitsPerPixel >> 4;
> 	/* crtc uses 256(bytes)x8 "half-tile" start addresses? */
>Index: radeon_sarea.h
>===================================================================
>RCS file: /cvs/xorg/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_sarea.h,v
>retrieving revision 1.4
>diff -u -r1.4 radeon_sarea.h
>--- radeon_sarea.h	26 Jan 2005 18:23:41 -0000	1.4
>+++ radeon_sarea.h	18 Feb 2005 15:12:15 -0000
>@@ -111,6 +111,9 @@
> #define RADEON_OFFSET_ALIGN		(1 << RADEON_OFFSET_SHIFT)
> #define RADEON_OFFSET_MASK		(RADEON_OFFSET_ALIGN - 1)
> 
>+/* Buffer are aligned on 4096 byte boundaries */
>+#define RADEON_BUFFER_ALIGN           0x00000fff
>+
> #endif /* __RADEON_SAREA_DEFINES__ */
> 
> typedef struct {

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