Attachment 23460 Details for Bug 20434 – Verbose Xorg log from rotate.

Verbose Xorg log from rotate.

Xorg.0.log.rotate (text/plain), 83.26 KB, created by Brian De Wolf on 2009-03-02 17:29:45 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: Brian De Wolf

Created: 2009-03-02 17:29:45 UTC

Size: 83.26 KB

patch

obsolete

>_XSERVTransSocketOpenCOTSServer: Unable to open socket for inet6
>_XSERVTransOpen: transport open failed for inet6/meow:0
>_XSERVTransMakeAllCOTSServerListeners: failed to open listener for inet6
>
>This is a pre-release version of the X server from The X.Org Foundation.
>It is not supported in any way.
>Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/.
>Select the "xorg" product for bugs you find in this release.
>Before reporting bugs in pre-release versions please check the
>latest version in the X.Org Foundation git repository.
>See http://wiki.x.org/wiki/GitPage for git access instructions.
>
>X.Org X Server 1.6.99.1
>Release Date: (unreleased)
>X Protocol Version 11, Revision 0
>Build Operating System: Linux 2.6.29-rc6 i686 
>Current Operating System: Linux meow 2.6.29-rc6 #1 PREEMPT Thu Feb 26 14:58:28 PST 2009 i686
>Build Date: 27 February 2009  04:31:24PM
> 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Mon Mar  2 17:11:29 2009
>(++) Using config file: "/root/xorg.conf.new"
>(==) ServerLayout "X.org Configured"
>(**) |-->Screen "Screen0" (0)
>(**) |   |-->Monitor "Monitor0"
>(**) |   |-->Device "Card0"
>(**) |-->Input Device "Mouse0"
>(**) |-->Input Device "Keyboard0"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(**) FontPath set to:
>	built-ins,
>	built-ins
>(**) ModulePath set to "/usr/lib/xorg/modules"
>(WW) AllowEmptyInput is on, devices using drivers 'kbd', 'mouse' or 'vmmouse' will be disabled.
>(WW) Disabling Mouse0
>(WW) Disabling Keyboard0
>(II) Loader magic: 0x81d53a0
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.4
>	X.Org Video Driver: 5.0
>	X.Org XInput driver : 5.0
>	X.Org Server Extension : 2.0
>(--) using VT number 9
>
>(--) PCI:*(0@0:2:0) Intel Corporation Mobile 915GM/GMS/910GML Express Graphics Controller rev 3, Mem @ 0xdff00000/524288, 0xc0000000/268435456, 0xdfec0000/262144, I/O @ 0x0000ec38/8
>(--) PCI: (0@0:2:1) Intel Corporation Mobile 915GM/GMS/910GML Express Graphics Controller rev 3, Mem @ 0xdff80000/524288
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) System resource ranges:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) "extmod" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dbe" will be loaded. This was enabled by default and also specified in the config file.
>(II) "glx" will be loaded. This was enabled by default and also specified in the config file.
>(II) "record" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dri" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dri2" will be loaded. This was enabled by default and also specified in the config file.
>(II) LoadModule: "glx"
>(II) Loading /usr/lib/xorg/modules/extensions/libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(==) AIGLX enabled
>(II) Loading extension GLX
>(II) LoadModule: "extmod"
>(II) Loading /usr/lib/xorg/modules/extensions/libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "record"
>(II) Loading /usr/lib/xorg/modules/extensions/librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension RECORD
>(II) LoadModule: "dbe"
>(II) Loading /usr/lib/xorg/modules/extensions/libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "dri"
>(II) Loading /usr/lib/xorg/modules/extensions/libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "dri2"
>(II) Loading /usr/lib/xorg/modules/extensions/libdri2.so
>(II) Module dri2: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension DRI2
>(II) LoadModule: "intel"
>(II) Loading /usr/lib/xorg/modules/drivers/intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 2.6.99
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 5.0
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, IGD_GM, IGD_G, 965G, G35,
>	965Q, 946GZ, 965GM, 965GME/GLE, G33, Q35, Q33,
>	Mobile IntelÂ® GM45 Express Chipset,
>	Intel Integrated Graphics Device, G45/G43, Q45/Q43, G41
>(II) Primary Device is: PCI 00@00:02:0
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) resource ranges after probing:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /usr/lib/xorg/modules/libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 5.0
>(==) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "ModeDebug" "yes"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) 915GM
>(--) intel(0): Chipset: "915GM"
>(--) intel(0): Linear framebuffer at 0xC0000000
>(--) intel(0): IO registers at addr 0xDFF00000
>(WW) intel(0): libpciaccess reported 0 rom size, guessing 64kB
>(==) intel(0): Using EXA for acceleration
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x11987820 (XOR bank/rank, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0202 (0x0202)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x08000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x05040302 (0x0302)
>(II) intel(0):               C1DRB1: 0x07060504 (0x0504)
>(II) intel(0):               C1DRB2: 0x09080706 (0x0706)
>(II) intel(0):               C1DRB3: 0x0b0a0908 (0x0908)
>(II) intel(0):              C0DRA01: 0x00010800 (0x0800)
>(II) intel(0):              C0DRA23: 0x04020001 (0x0001)
>(II) intel(0):              C1DRA01: 0x0d0c0b0a (0x0b0a)
>(II) intel(0):              C1DRA23: 0x0f0e0d0c (0x0d0c)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00800080 (vga0 p1 = 2, p2 = 4, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00480004 (disabled, pipe A, stall disabled, detected, SDVO mult 1)
>(II) intel(0):                SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected, SDVO mult 1)
>(II) intel(0):              SDVOUDI: 0x000000ef
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc030033c (enabled, pipe B, 18 bit, 2 channels)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00480004 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
>(II) intel(0):         PP_ON_DELAYS: 0x012c0fa0
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20fa0
>(II) intel(0):           PP_DIVISOR: 0x00299909
>(II) intel(0):         PFIT_CONTROL: 0x80006668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000000
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00000000 (status:)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800000 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x49000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x99046000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 3, p2 = 7)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x06970577 (1400 active, 1688 total)
>(II) intel(0):             HBLANK_B: 0x06970577 (1400 start, 1688 end)
>(II) intel(0):              HSYNC_B: 0x061305a3 (1444 start, 1556 end)
>(II) intel(0):             VTOTAL_B: 0x04290419 (1050 active, 1066 total)
>(II) intel(0):             VBLANK_B: 0x04290419 (1050 start, 1066 end)
>(II) intel(0):              VSYNC_B: 0x041c0419 (1050 start, 1053 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00800080
>(II) intel(0):             VGACNTRL: 0x22c4008e (enabled)
>(II) intel(0):               TV_CTL: 0x000c0c00
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x0332012d
>(II) intel(0):            TV_CSC_Y2: 0x07d30104
>(II) intel(0):             TV_CSC_U: 0x0733052d
>(II) intel(0):            TV_CSC_U2: 0x05c70200
>(II) intel(0):             TV_CSC_V: 0x0340030c
>(II) intel(0):            TV_CSC_V2: 0x06d00200
>(II) intel(0):         TV_CLR_KNOBS: 0x00606000
>(II) intel(0):         TV_CLR_LEVEL: 0x010b00e1
>(II) intel(0):           TV_H_CTL_1: 0x00400359
>(II) intel(0):           TV_H_CTL_2: 0x80480022
>(II) intel(0):           TV_H_CTL_3: 0x007c0344
>(II) intel(0):           TV_V_CTL_1: 0x00f01415
>(II) intel(0):           TV_V_CTL_2: 0x00060607
>(II) intel(0):           TV_V_CTL_3: 0x80120001
>(II) intel(0):           TV_V_CTL_4: 0x000900f0
>(II) intel(0):           TV_V_CTL_5: 0x000a00f0
>(II) intel(0):           TV_V_CTL_6: 0x000900f0
>(II) intel(0):           TV_V_CTL_7: 0x000a00f0
>(II) intel(0):          TV_SC_CTL_1: 0xc1710087
>(II) intel(0):          TV_SC_CTL_2: 0x6b405140
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00360024
>(II) intel(0):          TV_WIN_SIZE: 0x02640198
>(II) intel(0):      TV_FILTER_CTL_1: 0x800010bb
>(II) intel(0):      TV_FILTER_CTL_2: 0x00028283
>(II) intel(0):      TV_FILTER_CTL_3: 0x00014141
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0xb1403000
>(II) intel(0):         TV_H_LUMA_59: 0x0000b060
>(II) intel(0):        TV_H_CHROMA_0: 0xb1403000
>(II) intel(0):       TV_H_CHROMA_59: 0x0000b060
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 0: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 1: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 1: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 2: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 2: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 3: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 3: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 4: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 4: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 5: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 5: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 6: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 6: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 7: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 7: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 8: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 8: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 9: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 9: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 10: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 10: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 11: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 11: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 12: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 12: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 13: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 13: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 14: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 14: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 15: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 15: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 112380 n 3 m1 20 m2 6 p1 3 p2 7
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"
>(II) Module "ddc" already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"
>(II) Module "i2c" already built-in
>(II) intel(0): Output VGA using monitor section Monitor0
>(II) intel(0): Output LVDS has no monitor section
>(II) intel(0): I2C bus "LVDSDDC_C" initialized.
>(II) intel(0): Attempting to determine panel fixed mode.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): EDID vendor "QDS", prod id 23
>(II) intel(0): DDCModeFromDetailedTiming: 1400x1050 Warning: We only handle separate sync.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70.
>(II) intel(0): I2C bus "SDVOB DDC Bus" initialized.
>(II) intel(0): SDVOB: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
>(II) intel(0): SDVOB: R: 04 AA 02 00 01 01 01 00 (Success)
>(II) intel(0): SDVOB: W: 9D                         (SDVO_CMD_GET_SUPP_ENCODE)
>(II) intel(0): SDVOB: R: 00 00                   (Not supported)
>(II) intel(0): Output TMDS-1 has no monitor section
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
>(II) intel(0): SDVOB: R: C4 09 74 40             (Success)
>(II) intel(0): SDVOB: device VID/DID: 04:AA.02, clock range 25.0MHz - 165.0MHz
>(II) intel(0): SDVOB: 1 input channel
>(II) intel(0): SDVOB: TMDS0 output reported
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at address 0x72.
>(II) intel(0): No SDVO device found on SDVOC
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" removed.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" removed.
>(II) intel(0): Output TV has no monitor section
>(II) intel(0): SDVOB: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R: 01                      (Success)
>(II) intel(0): Current clock rate multiplier: 1
>(II) intel(0): SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R: 00 00                   (Success)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R: 00 00 00 00 00 00 00 00 (Not supported)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R: 00 00 00 00 00 00 00 00 (Not supported)
>(II) intel(0): Resizable framebuffer: not available (1 3)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): I2C bus "CRTDDC_A" removed.
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): EDID for output VGA
>(II) intel(0): LID switch detect open with ACPI button
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: QDS  Model: 17  Serial#: 0
>(II) intel(0): Year: 2004  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 21
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.579 redY: 0.340   greenX: 0.310 greenY: 0.550
>(II) intel(0): blueX: 0.154 blueY: 0.154   whiteX: 0.314 whiteY: 0.329
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 108.0 MHz   Image Size:  285 x 214 mm
>(II) intel(0): h_active: 1400  h_sync: 1444  h_sync_end 1556 h_blank_end 1688 h_border: 0
>(II) intel(0): v_active: 1050  v_sync: 1050  v_sync_end 1053 v_blanking: 1066 v_border: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 90.0 MHz   Image Size:  285 x 214 mm
>(II) intel(0): h_active: 1400  h_sync: 1444  h_sync_end 1556 h_blank_end 1688 h_border: 0
>(II) intel(0): v_active: 1050  v_sync: 1050  v_sync_end 1053 v_blanking: 1066 v_border: 0
>(II) intel(0):  J4237
>(II) intel(0):  øæßÏ¯Y
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff004493170000000000
>(II) intel(0): 	000e0103801d15780a47a994574f8c27
>(II) intel(0): 	27505400000001010101010101010101
>(II) intel(0): 	010101010101302a7820511a10402c70
>(II) intel(0): 	03001dd61000001828237820511a1040
>(II) intel(0): 	2c7003001dd610000000000000fe004a
>(II) intel(0): 	343233370100000000000000000000fe
>(II) intel(0): 	00f8e6dfcfaf89590002010a202000f2
>(II) intel(0): EDID vendor "QDS", prod id 23
>(II) intel(0): DDCModeFromDetailedTiming: 1400x1050 Warning: We only handle separate sync.
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "320x175" (doublescan mode not supported)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "320x200" (doublescan mode not supported)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "360x200" (doublescan mode not supported)
>(II) intel(0): Not using default mode "320x240" (doublescan mode not supported)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "320x240" (doublescan mode not supported)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "320x240" (doublescan mode not supported)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "320x240" (doublescan mode not supported)
>(II) intel(0): Not using default mode "400x300" (doublescan mode not supported)
>(II) intel(0): Not using default mode "400x300" (doublescan mode not supported)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "400x300" (doublescan mode not supported)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "400x300" (doublescan mode not supported)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "400x300" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1024x768" (interlace mode not supported)
>(II) intel(0): Not using default mode "512x384" (doublescan mode not supported)
>(II) intel(0): Not using default mode "512x384" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "512x384" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "512x384" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "512x384" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
>(II) intel(0): Not using default mode "576x432" (doublescan mode not supported)
>(II) intel(0): Not using default mode "640x480" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (doublescan mode not supported)
>(II) intel(0): Not using default mode "640x512" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x512" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x512" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1600x1200" (hsync out of range)
>(II) intel(0): Not using default mode "800x600" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1792x1344" (hsync out of range)
>(II) intel(0): Not using default mode "896x672" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1792x1344" (vrefresh out of range)
>(II) intel(0): Not using default mode "896x672" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1856x1392" (hsync out of range)
>(II) intel(0): Not using default mode "928x696" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1856x1392" (vrefresh out of range)
>(II) intel(0): Not using default mode "928x696" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1920x1440" (hsync out of range)
>(II) intel(0): Not using default mode "960x720" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
>(II) intel(0): Not using default mode "960x720" (doublescan mode not supported)
>(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
>(II) intel(0): Not using default mode "416x312" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1400x1050" (hsync out of range)
>(II) intel(0): Not using default mode "700x525" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
>(II) intel(0): Not using default mode "700x525" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
>(II) intel(0): Not using default mode "960x720" (doublescan mode not supported)
>(II) intel(0): Not using default mode "2048x1536" (hsync out of range)
>(II) intel(0): Not using default mode "1024x768" (doublescan mode not supported)
>(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (doublescan mode not supported)
>(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (doublescan mode not supported)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1400x1050"x60.0  108.00  1400 1444 1556 1688  1050 1050 1053 1066 -hsync -vsync (64.0 kHz)
>(II) intel(0): Modeline "1400x1050"x50.0   90.00  1400 1444 1556 1688  1050 1050 1053 1066 -hsync -vsync (53.3 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): Modeline "1280x960"x60.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVOB: R: 00 00                   (Success)
>(II) intel(0): EDID for output TMDS-1
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>(II) intel(0): Adjusted mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  108.00  1280 1368 1496 1712  1024 1027 1034 1104 (63.1 kHz)
>(II) intel(0): chosen: dotclock 108000 vco 2160000 ((m 90, m1 14, m2 8), n 2, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): EDID for output TV
>(II) intel(0): Output VGA disconnected
>(II) intel(0): Output LVDS connected
>(II) intel(0): Output TMDS-1 disconnected
>(II) intel(0): Output TV disconnected
>(II) intel(0): Using exact sizes for initial modes
>(II) intel(0): Output LVDS using initial mode 1400x1050
>(II) intel(0): Using default gamma of (1.0, 1.0, 1.0) unless otherwise stated.
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Not supported)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 14 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Not supported)
>(II) intel(0): SDVOB: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): detected 256 kB GTT.
>(II) intel(0): detected 7932 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): DPI set to (96, 96)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /usr/lib/xorg/modules/libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.4
>(II) Loading sub module "exa"
>(II) LoadModule: "exa"
>(II) Loading /usr/lib/xorg/modules/libexa.so
>(II) Module exa: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 2.4.0
>	ABI class: X.Org Video Driver, version 5.0
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"
>(II) Module "ramdac" already built-in
>(II) intel(0): Comparing regs from server start up to After PreInit
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000000 to 0x00000207
>(WW) intel(0): PIPEASTAT before: status:
>(WW) intel(0): PIPEASTAT after: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00000202 to 0x80000202
>(WW) intel(0): PIPEBSTAT before: status: VSYNC_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 238848 total, 1 used
>(II) intel(0): I830CheckAvailableMemory: 955388 kB available
>(WW) intel(0): DRI2 requires UXA
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 12, (OK)
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 12, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 12, (OK)
>drmOpenByBusid: drmOpenMinor returns 12
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) [drm] DRM interface version 1.3
>(II) [drm] DRM open master succeeded.
>(II) intel(0): [drm] Using the DRM lock SAREA also for drawables.
>(II) intel(0): [drm] framebuffer mapped by ddx driver
>(II) intel(0): [drm] added 1 reserved context for kernel
>(II) intel(0): X context handle = 0x1
>(II) intel(0): [drm] installed DRM signal handler
>(**) intel(0): Framebuffer compression enabled
>(**) intel(0): Tiling enabled
>(==) intel(0): VideoRam: 262144 KB
>(II) intel(0): Attempting memory allocation with tiled buffers.
>(II) intel(0): Tiled allocation successful.
>(II) intel(0): [drm] Registers = 0xdff00000
>(II) intel(0): [drm] Initialized kernel agp heap manager, 33554432
>(II) intel(0): [dri] visual configs initialized
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(II) EXA(0): Offscreen pixmap area of 34406400 bytes
>(II) EXA(0): Driver registered support for the following operations:
>(II)         Solid
>(II)         Copy
>(II)         Composite (RENDER acceleration)
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): [DRI] installation complete
>(II) intel(0): SDVOB: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R: 01                      (Success)
>(II) intel(0): Current clock rate multiplier: 1
>(II) intel(0): SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R: 00 00                   (Success)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R: 00 00 00 00 00 00 00 00 (Not supported)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R: 00 00 00 00 00 00 00 00 (Not supported)
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0b924000 (pgoffset 47396)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x0d9f4000 (pgoffset 55796)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x005fffff: compressed frame buffer (6144 kB, 0x000000003f800000 physical
>)
>(II) intel(0): 0x00600000-0x00600fff: compressed ll buffer (4 kB, 0x000000003fe00000 physical
>)
>(II) intel(0): 0x00601000-0x0060afff: HW cursors (40 kB, 0x000000003fe01000 physical
>)
>(II) intel(0): 0x0060b000-0x0060bfff: overlay registers (4 kB, 0x000000003fe0b000 physical
>)
>(II) intel(0): 0x007bf000:            end of stolen memory
>(II) intel(0): 0x007bf000-0x0b923fff: DRI memory manager (181652 kB)
>(II) intel(0): 0x0b924000-0x0d9f3fff: exa offscreen (33600 kB)
>(II) intel(0): 0x0d9f4000-0x0f9f3fff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): BO memory allocation layout:
>(II) intel(0): 0x007bf000:            start of memory manager
>(II) intel(0): 0x01000000-0x01ffffff: depth buffer (16384 kB) X tiled
>(II) intel(0): 0x02000000-0x02ffffff: back buffer (16384 kB) X tiled
>(II) intel(0): 0x03000000-0x03ffffff: front buffer (16384 kB) X tiled
>(II) intel(0): 0x0b924000:            end of memory manager
>(WW) intel(0): ESR is 0x00000011, page table error, instruction error
>(WW) intel(0): PGTBL_ER is 0x00000010, display A pte
>(WW) intel(0): Existing errors found in hardware state.
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): using SSC reference clock of 96 MHz
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1400x1050"x60.0  108.00  1400 1444 1556 1688  1050 1050 1053 1066 -hsync -vsync (64.0 kHz)
>(II) intel(0): chosen: dotclock 107885 vco 2265600 ((m 118, m1 20, m2 6), n 3, (p 21, p1 3, p2 7))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x11987820 (XOR bank/rank, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0202 (0x0202)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x08000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x05040302 (0x0302)
>(II) intel(0):               C1DRB1: 0x07060504 (0x0504)
>(II) intel(0):               C1DRB2: 0x09080706 (0x0706)
>(II) intel(0):               C1DRB3: 0x0b0a0908 (0x0908)
>(II) intel(0):              C0DRA01: 0x00010800 (0x0800)
>(II) intel(0):              C0DRA23: 0x04020001 (0x0001)
>(II) intel(0):              C1DRA01: 0x0d0c0b0a (0x0b0a)
>(II) intel(0):              C1DRA23: 0x0f0e0d0c (0x0d0c)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00800080 (vga0 p1 = 2, p2 = 4, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00480004 (disabled, pipe A, stall disabled, detected, SDVO mult 1)
>(II) intel(0):                SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected, SDVO mult 1)
>(II) intel(0):              SDVOUDI: 0x000000ef
>(II) intel(0):               DSPARB: 0x00002f80
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc030033c (enabled, pipe B, 18 bit, 2 channels)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00480004 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x012c0fa0
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20fa0
>(II) intel(0):           PP_DIVISOR: 0x00299909
>(II) intel(0):         PFIT_CONTROL: 0x00000008
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000000
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x58000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x01df027f (640, 480)
>(II) intel(0):             DSPABASE: 0x03000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00020000 (status: VBLANK_INT_ENABLE)
>(II) intel(0):                 FPA0: 0x00021108 (n = 2, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x14800000 (disabled, non-dvo, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x033f027f (640 active, 832 total)
>(II) intel(0):             HBLANK_A: 0x033f027f (640 start, 832 end)
>(II) intel(0):              HSYNC_A: 0x02bf0297 (664 start, 704 end)
>(II) intel(0):             VTOTAL_A: 0x020701df (480 active, 520 total)
>(II) intel(0):             VBLANK_A: 0x020701df (480 start, 520 end)
>(II) intel(0):              VSYNC_A: 0x01ea01e8 (489 start, 491 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000000 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x04190577 (1400, 1050)
>(II) intel(0):             DSPBBASE: 0x03000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x05770419 (1400, 1050)
>(II) intel(0):            PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x99046000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 3, p2 = 7)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x06970577 (1400 active, 1688 total)
>(II) intel(0):             HBLANK_B: 0x06970577 (1400 start, 1688 end)
>(II) intel(0):              HSYNC_B: 0x061305a3 (1444 start, 1556 end)
>(II) intel(0):             VTOTAL_B: 0x04290419 (1050 active, 1066 total)
>(II) intel(0):             VBLANK_B: 0x04290419 (1050 start, 1066 end)
>(II) intel(0):              VSYNC_B: 0x041c0419 (1050 start, 1053 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00800080
>(II) intel(0):             VGACNTRL: 0xa2c4008e (disabled)
>(II) intel(0):               TV_CTL: 0x000c0c00
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x0332012d
>(II) intel(0):            TV_CSC_Y2: 0x07d30104
>(II) intel(0):             TV_CSC_U: 0x0733052d
>(II) intel(0):            TV_CSC_U2: 0x05c70200
>(II) intel(0):             TV_CSC_V: 0x0340030c
>(II) intel(0):            TV_CSC_V2: 0x06d00200
>(II) intel(0):         TV_CLR_KNOBS: 0x00606000
>(II) intel(0):         TV_CLR_LEVEL: 0x010b00e1
>(II) intel(0):           TV_H_CTL_1: 0x00400359
>(II) intel(0):           TV_H_CTL_2: 0x80480022
>(II) intel(0):           TV_H_CTL_3: 0x007c0344
>(II) intel(0):           TV_V_CTL_1: 0x00f01415
>(II) intel(0):           TV_V_CTL_2: 0x00060607
>(II) intel(0):           TV_V_CTL_3: 0x80120001
>(II) intel(0):           TV_V_CTL_4: 0x000900f0
>(II) intel(0):           TV_V_CTL_5: 0x000a00f0
>(II) intel(0):           TV_V_CTL_6: 0x000900f0
>(II) intel(0):           TV_V_CTL_7: 0x000a00f0
>(II) intel(0):          TV_SC_CTL_1: 0xc1710087
>(II) intel(0):          TV_SC_CTL_2: 0x6b405140
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00360024
>(II) intel(0):          TV_WIN_SIZE: 0x02640198
>(II) intel(0):      TV_FILTER_CTL_1: 0x800010bb
>(II) intel(0):      TV_FILTER_CTL_2: 0x00028283
>(II) intel(0):      TV_FILTER_CTL_3: 0x00014141
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0xb1403000
>(II) intel(0):         TV_H_LUMA_59: 0x0000b060
>(II) intel(0):        TV_H_CHROMA_0: 0xb1403000
>(II) intel(0):       TV_H_CHROMA_59: 0x0000b060
>(II) intel(0):         FBC_CFB_BASE: 0x3f800000
>(II) intel(0):          FBC_LL_BASE: 0x3fe00006
>(II) intel(0):          FBC_CONTROL: 0x43e847e2
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 0: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 1: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 1: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 2: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 2: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 3: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 3: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 4: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 4: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 5: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 5: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 6: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 6: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 7: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 7: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 8: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 8: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 9: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 9: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 10: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 10: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 11: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 11: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 12: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 12: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 13: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 13: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 14: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 14: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 15: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 15: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0): pipe A dot 31500 n 2 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 112380 n 3 m1 20 m2 6 p1 3 p2 7
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0):   Output TMDS-1 is connected to pipe none
>(II) intel(0):   Output TV is connected to pipe none
>(II) intel(0): [drm] mapped front buffer at 0xc3000000, handle = 0xc3000000
>(II) intel(0): [drm] mapped back buffer at 0xc2000000, handle = 0xc2000000
>(II) intel(0): [drm] mapped depth buffer at 0xc1000000, handle = 0xc1000000
>(II) intel(0): [drm] mapped classic textures at 0xcd9f4000, handle = 0xcd9f4000
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(II) intel(0): DPMS enabled
>(==) intel(0): Intel XvMC decoder disabled
>(II) intel(0): Set up textured video
>(II) intel(0): Set up overlay video
>(II) intel(0): direct rendering: XF86DRI Enabled
>(--) RandR disabled
>(II) Initializing built-in extension Generic Event Extension
>(II) Initializing built-in extension SHAPE
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension BIG-REQUESTS
>(II) Initializing built-in extension SYNC
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-MISC
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) AIGLX: Screen 0 is not DRI2 capable
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 13, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 13, (OK)
>drmOpenByBusid: drmOpenMinor returns 13
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) AIGLX: enabled GLX_SGI_make_current_read
>(II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>(II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>(II) AIGLX: enabled GLX_texture_from_pixmap with driver support
>(II) AIGLX: Loaded and initialized /usr/lib/dri/i915_dri.so
>(II) GLX: Initialized DRI GL provider for screen 0
>(II) intel(0): Setting screen physical size to 370 x 277
>(II) config/hal: Adding input device AlpsPS/2 ALPS GlidePoint
>(II) LoadModule: "synaptics"
>(II) Loading /usr/lib/xorg/modules/input/synaptics_drv.so
>(II) Module synaptics: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 1.0.99
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 5.0
>(II) Synaptics touchpad driver version 1.0.99.2
>(**) Option "Device" "/dev/input/event5"
>(II) AlpsPS/2 ALPS GlidePoint: x-axis range 0 - 1023
>(II) AlpsPS/2 ALPS GlidePoint: y-axis range 0 - 767
>(II) AlpsPS/2 ALPS GlidePoint: pressure range 0 - 127
>(II) AlpsPS/2 ALPS GlidePoint: finger width range 0 - 0
>(II) AlpsPS/2 ALPS GlidePoint: buttons: left right middle
>(--) AlpsPS/2 ALPS GlidePoint touchpad found
>(**) AlpsPS/2 ALPS GlidePoint: always reports core events
>(II) XINPUT: Adding extended input device "AlpsPS/2 ALPS GlidePoint" (type: TOUCHPAD)
>(**) AlpsPS/2 ALPS GlidePoint: (accel) keeping acceleration scheme 1
>(**) AlpsPS/2 ALPS GlidePoint: (accel) acceleration profile 0
>(**) AlpsPS/2 ALPS GlidePoint: (accel) filter chain progression: 2.00
>(**) AlpsPS/2 ALPS GlidePoint: (accel) filter stage 0: 20.00 ms
>(**) AlpsPS/2 ALPS GlidePoint: (accel) set acceleration profile 0
>(--) AlpsPS/2 ALPS GlidePoint touchpad found
>(II) config/hal: Adding input device PS/2 Mouse
>(II) LoadModule: "evdev"
>(II) Loading /usr/lib/xorg/modules/input/evdev_drv.so
>(II) Module evdev: vendor="X.Org Foundation"
>	compiled for 1.6.99.1, module version = 2.1.99
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 5.0
>(**) PS/2 Mouse: always reports core events
>(**) PS/2 Mouse: Device: "/dev/input/event4"
>(II) PS/2 Mouse: Found 3 mouse buttons
>(II) PS/2 Mouse: Found x and y relative axes
>(II) PS/2 Mouse: Configuring as mouse
>(**) PS/2 Mouse: YAxisMapping: buttons 4 and 5
>(**) PS/2 Mouse: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(II) XINPUT: Adding extended input device "PS/2 Mouse" (type: MOUSE)
>(**) PS/2 Mouse: (accel) keeping acceleration scheme 1
>(**) PS/2 Mouse: (accel) acceleration profile 0
>(**) PS/2 Mouse: (accel) filter chain progression: 2.00
>(**) PS/2 Mouse: (accel) filter stage 0: 20.00 ms
>(**) PS/2 Mouse: (accel) set acceleration profile 0
>(II) config/hal: Adding input device AT Translated Set 2 keyboard
>(**) AT Translated Set 2 keyboard: always reports core events
>(**) AT Translated Set 2 keyboard: Device: "/dev/input/event0"
>(II) AT Translated Set 2 keyboard: Found keys
>(II) AT Translated Set 2 keyboard: Configuring as keyboard
>(II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD)
>(**) Option "xkb_rules" "evdev"
>(**) Option "xkb_model" "evdev"
>(**) Option "xkb_layout" "us"
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): I2C bus "CRTDDC_A" removed.
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): EDID for output VGA
>(II) intel(0): LID switch detect open with ACPI button
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: QDS  Model: 17  Serial#: 0
>(II) intel(0): Year: 2004  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 21
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.579 redY: 0.340   greenX: 0.310 greenY: 0.550
>(II) intel(0): blueX: 0.154 blueY: 0.154   whiteX: 0.314 whiteY: 0.329
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 108.0 MHz   Image Size:  285 x 214 mm
>(II) intel(0): h_active: 1400  h_sync: 1444  h_sync_end 1556 h_blank_end 1688 h_border: 0
>(II) intel(0): v_active: 1050  v_sync: 1050  v_sync_end 1053 v_blanking: 1066 v_border: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 90.0 MHz   Image Size:  285 x 214 mm
>(II) intel(0): h_active: 1400  h_sync: 1444  h_sync_end 1556 h_blank_end 1688 h_border: 0
>(II) intel(0): v_active: 1050  v_sync: 1050  v_sync_end 1053 v_blanking: 1066 v_border: 0
>(II) intel(0):  J4237
>(II) intel(0):  øæßÏ¯Y
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff004493170000000000
>(II) intel(0): 	000e0103801d15780a47a994574f8c27
>(II) intel(0): 	27505400000001010101010101010101
>(II) intel(0): 	010101010101302a7820511a10402c70
>(II) intel(0): 	03001dd61000001828237820511a1040
>(II) intel(0): 	2c7003001dd610000000000000fe004a
>(II) intel(0): 	343233370100000000000000000000fe
>(II) intel(0): 	00f8e6dfcfaf89590002010a202000f2
>(II) intel(0): EDID vendor "QDS", prod id 23
>(II) intel(0): DDCModeFromDetailedTiming: 1400x1050 Warning: We only handle separate sync.
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1400x1050"x0.0  108.00  1400 1444 1556 1688  1050 1050 1053 1066 -hsync -vsync (64.0 kHz)
>(II) intel(0): Modeline "1400x1050"x0.0   90.00  1400 1444 1556 1688  1050 1050 1053 1066 -hsync -vsync (53.3 kHz)
>(II) intel(0): EDID vendor "QDS", prod id 23
>(II) intel(0): DDCModeFromDetailedTiming: 1400x1050 Warning: We only handle separate sync.
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "320x175" (doublescan mode not supported)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "320x200" (doublescan mode not supported)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "360x200" (doublescan mode not supported)
>(II) intel(0): Not using default mode "320x240" (doublescan mode not supported)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "320x240" (doublescan mode not supported)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "320x240" (doublescan mode not supported)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "320x240" (doublescan mode not supported)
>(II) intel(0): Not using default mode "400x300" (doublescan mode not supported)
>(II) intel(0): Not using default mode "400x300" (doublescan mode not supported)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "400x300" (doublescan mode not supported)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "400x300" (doublescan mode not supported)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "400x300" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1024x768" (interlace mode not supported)
>(II) intel(0): Not using default mode "512x384" (doublescan mode not supported)
>(II) intel(0): Not using default mode "512x384" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "512x384" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "512x384" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "512x384" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
>(II) intel(0): Not using default mode "576x432" (doublescan mode not supported)
>(II) intel(0): Not using default mode "640x480" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (doublescan mode not supported)
>(II) intel(0): Not using default mode "640x512" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x512" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x512" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "800x600" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "800x600" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "800x600" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "800x600" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1600x1200" (width too large for virtual size)
>(II) intel(0): Not using default mode "800x600" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1792x1344" (width too large for virtual size)
>(II) intel(0): Not using default mode "896x672" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1792x1344" (width too large for virtual size)
>(II) intel(0): Not using default mode "896x672" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1856x1392" (width too large for virtual size)
>(II) intel(0): Not using default mode "928x696" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1856x1392" (width too large for virtual size)
>(II) intel(0): Not using default mode "928x696" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "960x720" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "960x720" (doublescan mode not supported)
>(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
>(II) intel(0): Not using default mode "416x312" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1400x1050" (hsync out of range)
>(II) intel(0): Not using default mode "700x525" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
>(II) intel(0): Not using default mode "700x525" (doublescan mode not supported)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "960x720" (doublescan mode not supported)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "1024x768" (doublescan mode not supported)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "1024x768" (doublescan mode not supported)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "1024x768" (doublescan mode not supported)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1400x1050"x60.0  108.00  1400 1444 1556 1688  1050 1050 1053 1066 -hsync -vsync (64.0 kHz)
>(II) intel(0): Modeline "1400x1050"x50.0   90.00  1400 1444 1556 1688  1050 1050 1053 1066 -hsync -vsync (53.3 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): Modeline "1280x960"x60.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVOB: R: 00 00                   (Success)
>(II) intel(0): EDID for output TMDS-1
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>(II) intel(0): Adjusted mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  108.00  1280 1368 1496 1712  1024 1027 1034 1104 (63.1 kHz)
>(II) intel(0): chosen: dotclock 108000 vco 2160000 ((m 90, m1 14, m2 8), n 2, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): EDID for output TV
>(II) intel(0): using SSC reference clock of 96 MHz
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "(null)"x0.0  108.00  1400 1444 1556 1688  1050 1050 1053 1066 -hsync -vsync (64.0 kHz)
>(II) intel(0): chosen: dotclock 107885 vco 2265600 ((m 118, m1 20, m2 6), n 3, (p 21, p1 3, p2 7))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) UnloadModule: "synaptics"
>(II) PS/2 Mouse: Close
>(II) UnloadModule: "evdev"
>(II) AT Translated Set 2 keyboard: Close
>(II) UnloadModule: "evdev"
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 16 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Not supported)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 14 00 00 00 00 00 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Not supported)
>(II) intel(0): SDVOB: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000000 to 0x00020000
>(WW) intel(0): PIPEASTAT before: status:
>(WW) intel(0): PIPEASTAT after: status: VBLANK_INT_ENABLE
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00000202 to 0x00020000
>(WW) intel(0): PIPEBSTAT before: status: VSYNC_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: VBLANK_INT_ENABLE
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x11987820 (XOR bank/rank, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0202 (0x0202)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x08000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x05040302 (0x0302)
>(II) intel(0):               C1DRB1: 0x07060504 (0x0504)
>(II) intel(0):               C1DRB2: 0x09080706 (0x0706)
>(II) intel(0):               C1DRB3: 0x0b0a0908 (0x0908)
>(II) intel(0):              C0DRA01: 0x00010800 (0x0800)
>(II) intel(0):              C0DRA23: 0x04020001 (0x0001)
>(II) intel(0):              C1DRA01: 0x0d0c0b0a (0x0b0a)
>(II) intel(0):              C1DRA23: 0x0f0e0d0c (0x0d0c)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00800080 (vga0 p1 = 2, p2 = 4, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00480004 (disabled, pipe A, stall disabled, detected, SDVO mult 1)
>(II) intel(0):                SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected, SDVO mult 1)
>(II) intel(0):              SDVOUDI: 0x000000ef
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc030033c (enabled, pipe B, 18 bit, 2 channels)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00480004 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x012c0fa0
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20fa0
>(II) intel(0):           PP_DIVISOR: 0x00299909
>(II) intel(0):         PFIT_CONTROL: 0x80006668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000000
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00020000 (status: VBLANK_INT_ENABLE)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800000 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x49000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x00020000 (status: VBLANK_INT_ENABLE)
>(II) intel(0):                 FPB0: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x99046000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 3, p2 = 7)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x06970577 (1400 active, 1688 total)
>(II) intel(0):             HBLANK_B: 0x06970577 (1400 start, 1688 end)
>(II) intel(0):              HSYNC_B: 0x061305a3 (1444 start, 1556 end)
>(II) intel(0):             VTOTAL_B: 0x04290419 (1050 active, 1066 total)
>(II) intel(0):             VBLANK_B: 0x04290419 (1050 start, 1066 end)
>(II) intel(0):              VSYNC_B: 0x041c0419 (1050 start, 1053 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00800080
>(II) intel(0):             VGACNTRL: 0x22c4008e (enabled)
>(II) intel(0):               TV_CTL: 0x000c0c00
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x0332012d
>(II) intel(0):            TV_CSC_Y2: 0x07d30104
>(II) intel(0):             TV_CSC_U: 0x0733052d
>(II) intel(0):            TV_CSC_U2: 0x05c70200
>(II) intel(0):             TV_CSC_V: 0x0340030c
>(II) intel(0):            TV_CSC_V2: 0x06d00200
>(II) intel(0):         TV_CLR_KNOBS: 0x00606000
>(II) intel(0):         TV_CLR_LEVEL: 0x010b00e1
>(II) intel(0):           TV_H_CTL_1: 0x00400359
>(II) intel(0):           TV_H_CTL_2: 0x80480022
>(II) intel(0):           TV_H_CTL_3: 0x007c0344
>(II) intel(0):           TV_V_CTL_1: 0x00f01415
>(II) intel(0):           TV_V_CTL_2: 0x00060607
>(II) intel(0):           TV_V_CTL_3: 0x80120001
>(II) intel(0):           TV_V_CTL_4: 0x000900f0
>(II) intel(0):           TV_V_CTL_5: 0x000a00f0
>(II) intel(0):           TV_V_CTL_6: 0x000900f0
>(II) intel(0):           TV_V_CTL_7: 0x000a00f0
>(II) intel(0):          TV_SC_CTL_1: 0xc1710087
>(II) intel(0):          TV_SC_CTL_2: 0x6b405140
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00360024
>(II) intel(0):          TV_WIN_SIZE: 0x02640198
>(II) intel(0):      TV_FILTER_CTL_1: 0x800010bb
>(II) intel(0):      TV_FILTER_CTL_2: 0x00028283
>(II) intel(0):      TV_FILTER_CTL_3: 0x00014141
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0xb1403000
>(II) intel(0):         TV_H_LUMA_59: 0x0000b060
>(II) intel(0):        TV_H_CHROMA_0: 0xb1403000
>(II) intel(0):       TV_H_CHROMA_59: 0x0000b060
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 0: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 1: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 1: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 2: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 2: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 3: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 3: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 4: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 4: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 5: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 5: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 6: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 6: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 7: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 7: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 8: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 8: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):        FENCE START 9: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):          FENCE END 9: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 10: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 10: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 11: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 11: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 12: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 12: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 13: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 13: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 14: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 14: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0):       FENCE START 15: 0xffffffff ( enabled, Y tile walk, 130944 pitch, 0xfffff000 start)
>(II) intel(0):         FENCE END 15: 0xffffffff (                                   0xfffff000 end)
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 112380 n 3 m1 20 m2 6 p1 3 p2 7
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): [drm] removed 1 reserved context for kernel
>(II) intel(0): [drm] unmapping 8192 bytes of SAREA 0xf8065000 at 0xb79e0000
>(II) intel(0): [drm] Closed DRM master.

Actions: View

Attachments on bug 20434: 23459 | 23460 | 23461 | 23462 | 23543

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.