Attachment 29594 Details for Bug 23532 – output with RADEON_DEBUG=all

output with RADEON_DEBUG=all

q2 (text/plain), 943.50 KB, created by Marc Dietrich on 2009-09-16 07:22:48 UTC

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Creator: Marc Dietrich

Created: 2009-09-16 07:22:48 UTC

Size: 943.50 KB

patch

obsolete

>Mesa: Mesa 7.7-devel DEBUG build Sep 16 2009 13:29:10
>r300NewTextureObject( 0x715e80 (target = GL_TEXTURE_2D_ARRAY_EXT) )
>r300NewTextureObject( 0x716260 (target = GL_TEXTURE_1D_ARRAY_EXT) )
>r300NewTextureObject( 0x716640 (target = GL_TEXTURE_CUBE_MAP) )
>r300NewTextureObject( 0x716a20 (target = GL_TEXTURE_3D) )
>r300NewTextureObject( 0x716e00 (target = GL_TEXTURE_RECTANGLE_ARB) )
>r300NewTextureObject( 0x7171e0 (target = GL_TEXTURE_2D) )
>r300NewTextureObject( 0x7175c0 (target = GL_TEXTURE_1D) )
>r300NewTextureObject( 0x72f8a0 (target = GL_TEXTURE_1D) )
>r300NewTextureObject( 0x72fc80 (target = GL_TEXTURE_2D) )
>r300NewTextureObject( 0x730060 (target = GL_TEXTURE_3D) )
>r300NewTextureObject( 0x730440 (target = GL_TEXTURE_CUBE_MAP) )
>r300NewTextureObject( 0x730820 (target = GL_TEXTURE_RECTANGLE_ARB) )
>r300NewTextureObject( 0x730c00 (target = GL_TEXTURE_1D_ARRAY_EXT) )
>r300NewTextureObject( 0x730fe0 (target = GL_TEXTURE_2D_ARRAY_EXT) )
>Mesa warning: software DXTn compression/decompression available
>Mesa: Initializing x86-64 optimizations
>Mesa: 3Dnow! detected
>r300InitSwtcl
>Using 8 maximum texture units..
>sizeof(drm_r300_cmd_header_t)=4
>sizeof(drm_radeon_cmd_buffer_t)=32
>Allocating 8192 bytes command buffer (max state is 2924 bytes)
>r300ResetHwState
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_ALPHA_TEST = GL_FALSE )
>r300Enable( GL_POLYGON_OFFSET_POINT = GL_FALSE )
>r300Enable( GL_POLYGON_OFFSET_LINE = GL_FALSE )
>r300Enable( GL_POLYGON_OFFSET_FILL = GL_FALSE )
>enter radeon_update_renderbuffers, drawable 0xa54230
>attaching buffer dri2 back buffer, 3, at 1, cpp 4, pitch 2560
>attaching buffer dri2 depth / stencil buffer, 4, at 9, cpp 4, pitch 2560
>radeonMakeCurrent ctx 0x6eb5c0 dfb 0xa542d0 rfb 0xa542d0
>enter radeon_update_renderbuffers, drawable 0xa54230
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>End radeonMakeCurrent
>radeonUnbindContext ctx 0x6eb5c0
>radeonFreeDmaRegions
>radeonReleaseArrays
>r300DeleteTexture( 0x72f8a0 (target = GL_TEXTURE_1D) )
>r300DeleteTexture( 0x72fc80 (target = GL_TEXTURE_2D) )
>r300DeleteTexture( 0x730060 (target = GL_TEXTURE_3D) )
>r300DeleteTexture( 0x730440 (target = GL_TEXTURE_CUBE_MAP) )
>r300DeleteTexture( 0x730820 (target = GL_TEXTURE_RECTANGLE_ARB) )
>r300DeleteTexture( 0x730c00 (target = GL_TEXTURE_1D_ARRAY_EXT) )
>r300DeleteTexture( 0x730fe0 (target = GL_TEXTURE_2D_ARRAY_EXT) )
>r300DeleteTexture( 0x715e80 (target = GL_TEXTURE_2D_ARRAY_EXT) )
>r300DeleteTexture( 0x716260 (target = GL_TEXTURE_1D_ARRAY_EXT) )
>r300DeleteTexture( 0x716640 (target = GL_TEXTURE_CUBE_MAP) )
>r300DeleteTexture( 0x716a20 (target = GL_TEXTURE_3D) )
>r300DeleteTexture( 0x716e00 (target = GL_TEXTURE_RECTANGLE_ARB) )
>r300DeleteTexture( 0x7171e0 (target = GL_TEXTURE_2D) )
>r300DeleteTexture( 0x7175c0 (target = GL_TEXTURE_1D) )
>r300NewTextureObject( 0x8d5c90 (target = GL_TEXTURE_2D_ARRAY_EXT) )
>r300NewTextureObject( 0x6d2cb0 (target = GL_TEXTURE_1D_ARRAY_EXT) )
>r300NewTextureObject( 0xa70b20 (target = GL_TEXTURE_CUBE_MAP) )
>r300NewTextureObject( 0xa70f00 (target = GL_TEXTURE_3D) )
>r300NewTextureObject( 0xa712e0 (target = GL_TEXTURE_RECTANGLE_ARB) )
>r300NewTextureObject( 0x8d3c80 (target = GL_TEXTURE_2D) )
>r300NewTextureObject( 0x8d4060 (target = GL_TEXTURE_1D) )
>r300NewTextureObject( 0x95a8e0 (target = GL_TEXTURE_1D) )
>r300NewTextureObject( 0x95acc0 (target = GL_TEXTURE_2D) )
>r300NewTextureObject( 0x95b0a0 (target = GL_TEXTURE_3D) )
>r300NewTextureObject( 0x95b480 (target = GL_TEXTURE_CUBE_MAP) )
>r300NewTextureObject( 0x95b860 (target = GL_TEXTURE_RECTANGLE_ARB) )
>r300NewTextureObject( 0x95bc40 (target = GL_TEXTURE_1D_ARRAY_EXT) )
>r300NewTextureObject( 0x95c020 (target = GL_TEXTURE_2D_ARRAY_EXT) )
>Mesa warning: software DXTn compression/decompression available
>Mesa: Initializing x86-64 optimizations
>Mesa: 3Dnow! detected
>r300InitSwtcl
>Using 8 maximum texture units..
>sizeof(drm_r300_cmd_header_t)=4
>sizeof(drm_radeon_cmd_buffer_t)=32
>Allocating 8192 bytes command buffer (max state is 2924 bytes)
>r300ResetHwState
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_ALPHA_TEST = GL_FALSE )
>r300Enable( GL_POLYGON_OFFSET_POINT = GL_FALSE )
>r300Enable( GL_POLYGON_OFFSET_LINE = GL_FALSE )
>r300Enable( GL_POLYGON_OFFSET_FILL = GL_FALSE )
>QGLPixelBuffer: Unable to find a context/format match - giving up.
>QGLWindowSurface: Failed to create valid pixelbuffer, falling back 
>r300NewTextureObject( 0xf4ac10 (target = GL_TEXTURE_1D) )
>r300NewTextureObject( 0xf4aff0 (target = GL_TEXTURE_2D) )
>r300NewTextureObject( 0xf4b3d0 (target = GL_TEXTURE_3D) )
>r300NewTextureObject( 0xf4b7b0 (target = GL_TEXTURE_CUBE_MAP) )
>r300NewTextureObject( 0xf4bb90 (target = GL_TEXTURE_RECTANGLE_ARB) )
>r300NewTextureObject( 0x1124c60 (target = GL_TEXTURE_1D_ARRAY_EXT) )
>r300NewTextureObject( 0x1125040 (target = GL_TEXTURE_2D_ARRAY_EXT) )
>Mesa warning: software DXTn compression/decompression available
>Mesa: Initializing x86-64 optimizations
>Mesa: 3Dnow! detected
>r300InitSwtcl
>Using 8 maximum texture units..
>sizeof(drm_r300_cmd_header_t)=4
>sizeof(drm_radeon_cmd_buffer_t)=32
>Allocating 8192 bytes command buffer (max state is 2924 bytes)
>r300ResetHwState
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_ALPHA_TEST = GL_FALSE )
>r300Enable( GL_POLYGON_OFFSET_POINT = GL_FALSE )
>r300Enable( GL_POLYGON_OFFSET_LINE = GL_FALSE )
>r300Enable( GL_POLYGON_OFFSET_FILL = GL_FALSE )
>hijackWindow() context created for KCalculator(0xa68c90, name = "MainWindow#1") 1 
>enter radeon_update_renderbuffers, drawable 0x77e340
>attaching buffer dri2 fake front buffer, 5, at 7, cpp 4, pitch 1216
>radeonMakeCurrent ctx 0x110ecb0 dfb 0x1846640 rfb 0x1846640
>enter radeon_update_renderbuffers, drawable 0x77e340
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>End radeonMakeCurrent
>radeonFlush 0
>r300NewTextureObject( 0x184b140 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:1216 298x279 at 0
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>radeonFlush 0
>Render to RGBA8 texture OK
>Render to RGBA8 texture OK
>Begin render texture tid 7c8d9750 tex=1 w=298 h=279 refcount=1
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>radeonFlush 0
>radeonFlush 0
>Allocating 298 x 279 radeon RBO (pitch 304)
>radeonFlush 0
>radeonFlush 0
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>radeonFlush 0
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>radeonFlush 0
>Render to RGBA8 texture OK
>Begin render texture tid 7c8d9750 tex=1 w=298 h=279 refcount=1
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>enter radeon_update_renderbuffers, drawable 0x77e340
>radeonMakeCurrent ctx 0x110ecb0 dfb 0x1846640 rfb 0x1846640
>End radeonMakeCurrent
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_BLEND = GL_TRUE )
>r300NewTextureObject( 0x184cd10 (target = GL_FALSE) )
>r300Enable( GL_MULTISAMPLE = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>Fragment Program: Initial program:
># Fragment Program/Shader
>  0: MOV OUTPUT[1], STATE[0];
>  1: END
>Fragment Program: After native rewrite:
># Radeon Compiler Program
>  1: MOV OUTPUT[1], STATE[0];
>Compiler: after NqSSA-DCE:
># Radeon Compiler Program
>  1: MOV OUTPUT[1], STATE[0];
>Emit paired program
>       RGB:    Src0 = CNST[0]
>       Alpha:  Src0 = CNST[0]
>  MAD COLOR.xyz, Src0.xyz, Src0.111, Src0.000
>  MAD COLOR.w, Src0.w, Src0.1, Src0.0
> END
>pc=0*************************************
>Hardware program
>----------------
>NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00400000)
>  0: xyz:  c0  t0  t0 -> o0.xyz               (1c000020)
>       w:  c0  t0  t0 -> o0.w                 (01000020)
>     xyz:   c0.xyz      1.0      0.0    op: 00050a80
>       w:     c0.w      1.0      0.0    op: 00040889
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 214
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 48 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 127, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 132, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 134, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 138, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 141, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 145, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 148, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 154, from emit_cb_offset:299
>BEGIN_BATCH(3) at 162, from emit_cb_offset:328
>BEGIN_BATCH(16) at 165, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 181, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 191, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 193, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 196, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 200, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 205, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 213, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 215, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 218, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>  skip state queryobj
>BEGIN_BATCH(3) at 222, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 225, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 231, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 233, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 0, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 214
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 48 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 127, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 132, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 134, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 138, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 141, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 145, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 148, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 154, from emit_cb_offset:299
>BEGIN_BATCH(3) at 162, from emit_cb_offset:328
>BEGIN_BATCH(16) at 165, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 181, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 191, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 193, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 196, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 200, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 205, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 213, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 215, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 218, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>  skip state queryobj
>BEGIN_BATCH(3) at 222, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 225, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 231, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 233, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 262
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 237, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 241, from cp_wait:212
>BEGIN_BATCH(2) at 243, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 245, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 248, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 251, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 254, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 257, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 259, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 262, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 264, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 266, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 275, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 279, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 281, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 283, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 288, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 291, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 297, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 299, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 328
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 303, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 307, from cp_wait:212
>BEGIN_BATCH(2) at 309, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 311, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 314, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 317, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 320, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 323, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 325, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 328, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 330, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 332, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 341, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 343, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 345, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 347, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 349, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 354, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 357, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 363, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 365, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 394
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 369, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 373, from cp_wait:212
>BEGIN_BATCH(2) at 375, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 377, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 380, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 383, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 386, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 389, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 391, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 394, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 396, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 398, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 407, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 409, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 411, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 413, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 415, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 420, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 423, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 429, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 431, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 460
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 435, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 439, from cp_wait:212
>BEGIN_BATCH(2) at 441, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 443, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 446, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 449, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 452, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 455, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 457, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 460, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 462, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 464, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 473, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 475, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 477, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 479, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 481, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 486, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 489, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 495, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 497, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 526
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 501, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 505, from cp_wait:212
>BEGIN_BATCH(2) at 507, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 509, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 512, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 515, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 518, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 521, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 523, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 526, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 528, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 530, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 539, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 541, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 543, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 545, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 547, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 552, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 555, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 561, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 563, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 592
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 567, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 571, from cp_wait:212
>BEGIN_BATCH(2) at 573, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 575, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 578, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 581, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 584, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 587, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 589, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 592, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 594, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 596, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 605, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 607, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 609, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 611, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 613, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 618, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 621, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 627, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 629, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 658
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 633, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 637, from cp_wait:212
>BEGIN_BATCH(2) at 639, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 641, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 644, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 647, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 650, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 653, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 655, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 658, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 660, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 662, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 671, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 673, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 675, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 677, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 679, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 684, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 687, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 693, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 695, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 724
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 699, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 703, from cp_wait:212
>BEGIN_BATCH(2) at 705, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 707, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 710, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 713, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 716, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 719, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 721, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 724, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 726, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 728, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 737, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 739, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 741, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 743, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 745, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 750, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 753, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 759, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 761, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 790
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 765, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 769, from cp_wait:212
>BEGIN_BATCH(2) at 771, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 773, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 776, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 779, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 782, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 785, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 787, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 790, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 792, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 794, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 803, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 805, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 807, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 809, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 811, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 816, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 819, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 825, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 827, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 856
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 831, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 835, from cp_wait:212
>BEGIN_BATCH(2) at 837, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 839, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 842, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 845, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 848, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 851, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 853, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 856, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 858, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 860, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 869, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 871, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 873, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 875, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 877, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 882, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 885, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 891, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 893, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 922
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 897, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 901, from cp_wait:212
>BEGIN_BATCH(2) at 903, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 905, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 908, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 911, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 914, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 917, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 919, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 922, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 924, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 926, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 935, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 937, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 939, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 941, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 943, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 948, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 951, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 957, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 959, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 988
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 963, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 967, from cp_wait:212
>BEGIN_BATCH(2) at 969, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 971, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 974, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 977, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 980, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 983, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 985, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 988, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 990, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 992, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1001, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1003, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1005, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1007, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1009, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 1014, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1017, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1023, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1025, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 1054
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1029, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1033, from cp_wait:212
>BEGIN_BATCH(2) at 1035, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1037, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1040, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1043, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1046, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1049, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1051, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1054, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1056, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1058, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1067, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1069, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1071, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1073, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1075, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 1080, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1083, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1089, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1091, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 1120
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1095, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1099, from cp_wait:212
>BEGIN_BATCH(2) at 1101, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1103, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1106, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1109, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1112, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1115, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1117, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1120, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1122, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1124, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1133, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1135, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1137, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1139, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1141, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 1146, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1149, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1155, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1157, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 1186
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1161, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1165, from cp_wait:212
>BEGIN_BATCH(2) at 1167, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1169, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1172, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1175, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1178, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1181, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1183, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1186, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1188, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1190, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1199, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1201, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1203, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1205, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1207, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 1212, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1215, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1221, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1223, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 1252
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1227, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1231, from cp_wait:212
>BEGIN_BATCH(2) at 1233, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1235, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1238, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1241, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1244, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1247, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1249, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1252, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1254, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1256, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1265, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1267, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1269, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1271, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1273, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 1278, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1281, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1287, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1289, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 1318
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1293, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1297, from cp_wait:212
>BEGIN_BATCH(2) at 1299, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1301, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1304, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1307, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1310, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1313, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1315, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1318, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1320, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1322, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1331, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1333, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1335, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1337, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1339, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 1344, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1347, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1353, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1355, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 1384
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1359, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1363, from cp_wait:212
>BEGIN_BATCH(2) at 1365, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1367, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1370, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1373, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1376, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1379, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1381, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1384, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1386, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1388, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1397, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1399, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1401, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1403, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1405, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 1410, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1413, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1419, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1421, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 1450
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1425, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1429, from cp_wait:212
>BEGIN_BATCH(2) at 1431, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1433, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1436, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1439, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1442, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1445, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1447, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1450, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1452, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1454, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1463, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1465, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1467, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1469, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1471, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 1476, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1479, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1485, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1487, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 1516
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1491, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1495, from cp_wait:212
>BEGIN_BATCH(2) at 1497, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1499, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1502, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1505, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1508, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1511, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1513, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1516, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1518, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1520, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1529, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1531, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1533, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1535, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1537, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 1542, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1545, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1551, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1553, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 1582
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 1557
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1557, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1561, from cp_wait:212
>BEGIN_BATCH(2) at 1563, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1565, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1568, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1571, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1574, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1577, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1579, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1582, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1584, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1586, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1595, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1597, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1599, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1601, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1603, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 1608, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1611, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1617, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1619, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 214
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 48 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 127, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 132, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 134, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 138, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 141, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 145, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 148, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 154, from emit_cb_offset:299
>BEGIN_BATCH(3) at 162, from emit_cb_offset:328
>BEGIN_BATCH(16) at 165, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 181, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 191, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 193, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 196, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 200, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 205, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 213, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 215, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 218, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>  skip state queryobj
>BEGIN_BATCH(3) at 222, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 225, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 231, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 233, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 214
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 48 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 127, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 132, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 134, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 138, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 141, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 145, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 148, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 154, from emit_cb_offset:299
>BEGIN_BATCH(3) at 162, from emit_cb_offset:328
>BEGIN_BATCH(16) at 165, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 181, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 191, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 193, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 196, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 200, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 205, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 213, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 215, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 218, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>  skip state queryobj
>BEGIN_BATCH(3) at 222, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 225, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 231, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 233, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 214
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 48 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 127, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 132, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 134, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 138, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 141, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 145, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 148, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 154, from emit_cb_offset:299
>BEGIN_BATCH(3) at 162, from emit_cb_offset:328
>BEGIN_BATCH(16) at 165, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 181, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 191, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 193, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 196, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 200, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 205, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 213, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 215, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 218, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>  skip state queryobj
>BEGIN_BATCH(3) at 222, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 225, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 231, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 233, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 214
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 48 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 127, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 132, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 134, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 138, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 141, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 145, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 148, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 154, from emit_cb_offset:299
>BEGIN_BATCH(3) at 162, from emit_cb_offset:328
>BEGIN_BATCH(16) at 165, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 181, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 191, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 193, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 196, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 200, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 205, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 213, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 215, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 218, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>  skip state queryobj
>BEGIN_BATCH(3) at 222, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 225, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 231, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 233, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 214
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 48 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300NewTextureObject( 0x18543c0 (target = GL_FALSE) )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 127, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 132, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 134, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 138, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 141, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 145, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 148, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 154, from emit_cb_offset:299
>BEGIN_BATCH(3) at 162, from emit_cb_offset:328
>BEGIN_BATCH(16) at 165, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 181, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 191, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 193, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 196, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 200, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 205, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 213, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 215, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 218, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>  skip state queryobj
>BEGIN_BATCH(3) at 222, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 225, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 231, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 233, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>level 0, face 0: rs:2048 1024x32 at 0
>level 1, face 0: rs:1024 512x16 at 65536
>level 2, face 0: rs:512 256x8 at 81920
>level 3, face 0: rs:256 128x4 at 86016
>level 4, face 0: rs:128 64x2 at 87040
>level 5, face 0: rs:64 32x1 at 87296
>level 6, face 0: rs:64 16x1 at 87360
>level 7, face 0: rs:64 8x1 at 87424
>level 8, face 0: rs:64 4x1 at 87488
>level 9, face 0: rs:64 2x1 at 87552
>level 10, face 0: rs:64 1x1 at 87616
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300RenderStart
>r300ChooseRenderState
>Fragment Program: Initial program:
># Fragment Program/Shader
>  0: TXP TEMP[0], INPUT[4], texture[0], 2D;
>  1: MUL OUTPUT[1], TEMP[0], STATE[0];
>  2: END
>Fragment Program: After native rewrite:
># Radeon Compiler Program
>  1: TXP TEMP[0], INPUT[4], texture[0], 2D;
>  2: MUL OUTPUT[1], TEMP[0], STATE[0];
>Compiler: after NqSSA-DCE:
># Radeon Compiler Program
>  1: TXP TEMP[0], INPUT[4], texture[0], 2D;
>  2: MUL OUTPUT[1], TEMP[0], STATE[0];
>Emit paired program
> BEGIN_TEX
>   TXP TEMP[1], INPUT[0], texture[0], 2D;
> END_TEX
>       RGB:    Src0 = TEMP[1]  Src1 = CNST[0]
>       Alpha:  Src0 = TEMP[1]  Src1 = CNST[0]
>  MAD COLOR.xyz, Src0.xyz, Src1.xyz, Src0.000
>  MAD COLOR.w, Src0.w, Src1.w, Src0.0
> END
>pc=1*************************************
>Hardware program
>----------------
>NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00400000)
>  TEX:
>    TXP t1, t0, texture[0]   (00018040)
>  0: xyz:  t1  c0  t0 -> o0.xyz               (1c000801)
>       w:  t1  c0  t0 -> o0.w                 (01000801)
>     xyz:   t1.xyz   c0.xyz      0.0    op: 00050200
>       w:     t1.w     c0.w      0.0    op: 00040509
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x18543c0 now
> Allocate new miptree
>level 0, face 0: rs:2048 1024x32 at 0
> face 0, level 0... 0x7b5940 vs 0x75edc0 migrating
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300NewTextureObject( 0x185fcb0 (target = GL_FALSE) )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>level 0, face 0: rs:1024 512x16 at 0
>level 1, face 0: rs:512 256x8 at 16384
>level 2, face 0: rs:256 128x4 at 20480
>level 3, face 0: rs:128 64x2 at 21504
>level 4, face 0: rs:64 32x1 at 21760
>level 5, face 0: rs:64 16x1 at 21824
>level 6, face 0: rs:64 8x1 at 21888
>level 7, face 0: rs:64 4x1 at 21952
>level 8, face 0: rs:64 2x1 at 22016
>level 9, face 0: rs:64 1x1 at 22080
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x185fcb0 now
> Allocate new miptree
>level 0, face 0: rs:1024 512x16 at 0
> face 0, level 0... 0x75e5c0 vs 0x75e9c0 migrating
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 368
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>radeonFlush 343
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 343, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 347, from cp_wait:212
>BEGIN_BATCH(2) at 349, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 351, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 354, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 357, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 360, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 363, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 365, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 372, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 381, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 383, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 385, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 387, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 389, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 391, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 396, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 398, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 400, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 402, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 404, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 406, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 410, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 414, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 417, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 423, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 425, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x185fcb0 now
> face 0, level 0... 0x75e5c0 vs 0x75e5c0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 368
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 343
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 343, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 347, from cp_wait:212
>BEGIN_BATCH(2) at 349, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 351, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 354, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 357, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 360, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 363, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 365, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 372, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 381, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 383, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 385, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 387, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 389, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 391, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 396, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 398, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 400, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 402, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 404, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 406, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 410, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 414, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 417, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 423, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 425, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1869810 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 42x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>Fragment Program: Initial program:
># Fragment Program/Shader
>  0: TXP TEMP[0], INPUT[4], texture[0], RECT;
>  1: MUL OUTPUT[1], TEMP[0], STATE[0];
>  2: END
>Fragment Program: After native rewrite:
># Radeon Compiler Program
>  1: MUL TEMP[1], INPUT[4], STATE[1];
>  2: TXP TEMP[0], TEMP[1], texture[0], RECT;
>  3: MUL OUTPUT[1], TEMP[0], STATE[0];
>Compiler: after NqSSA-DCE:
># Radeon Compiler Program
>  1: MUL TEMP[1], INPUT[4], STATE[1];
>  2: TXP TEMP[0], TEMP[1], texture[0], RECT;
>  3: MUL OUTPUT[1], TEMP[0], STATE[0];
>Emit paired program
>       RGB:    Src0 = TEMP[0]  Src1 = CNST[1]
>       Alpha:  Src0 = TEMP[0]  Src1 = CNST[1]
>  MAD TEMP[1].xyz, Src0.xyz, Src1.xyz, Src0.000
>  MAD TEMP[1].w, Src0.w, Src1.w, Src0.0
> BEGIN_TEX
>   TXP TEMP[0], TEMP[1], texture[0], RECT;
> END_TEX
>       RGB:    Src0 = TEMP[0]  Src1 = CNST[0]
>       Alpha:  Src0 = TEMP[0]  Src1 = CNST[0]
>  MAD COLOR.xyz, Src0.xyz, Src1.xyz, Src0.000
>  MAD COLOR.w, Src0.w, Src1.w, Src0.0
> END
>pc=2*************************************
>Hardware program
>----------------
>NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00000000)
>  0: xyz:  t0  c1  t0 -> t1.xyz               (03840840)
>       w:  t0  c1  t0 -> t1.w                 (00840840)
>     xyz:   t0.xyz   c1.xyz      0.0    op: 00050200
>       w:     t0.w     c1.w      0.0    op: 00040509
>NODE 1: alu_offset: 1, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00400001)
>  TEX:
>    TXP t0, t1, texture[0]   (00018001)
>  1: xyz:  t0  c0  t0 -> o0.xyz               (1c000800)
>       w:  t0  c0  t0 -> o0.w                 (01000800)
>     xyz:   t0.xyz   c0.xyz      0.0    op: 00050200
>       w:     t0.w     c0.w      0.0    op: 00040509
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1869810 now
> face 0, level 0... 0x7b5120 vs 0x7b5120 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x8e00d0 (target = GL_FALSE) )
>level 0, face 0: rs:1024 512x16 at 0
>level 1, face 0: rs:512 256x8 at 16384
>level 2, face 0: rs:256 128x4 at 20480
>level 3, face 0: rs:128 64x2 at 21504
>level 4, face 0: rs:64 32x1 at 21760
>level 5, face 0: rs:64 16x1 at 21824
>level 6, face 0: rs:64 8x1 at 21888
>level 7, face 0: rs:64 4x1 at 21952
>level 8, face 0: rs:64 2x1 at 22016
>level 9, face 0: rs:64 1x1 at 22080
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> Allocate new miptree
>level 0, face 0: rs:1024 512x16 at 0
> face 0, level 0... 0x7832b0 vs 0x75fdc0 migrating
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 368
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 343
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 343, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 347, from cp_wait:212
>BEGIN_BATCH(2) at 349, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 351, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 354, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 357, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 360, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 363, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 365, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 372, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 381, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 383, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 385, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 387, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 389, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 391, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 396, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 398, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 400, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 402, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 404, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 406, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 410, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 414, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 417, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 423, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 425, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x18712d0 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 42x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x18712d0 now
> face 0, level 0... 0x6ff360 vs 0x6ff360 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 368
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 343
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 343, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 347, from cp_wait:212
>BEGIN_BATCH(2) at 349, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 351, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 354, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 357, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 360, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 363, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 365, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 372, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 381, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 383, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 385, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 387, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 389, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 391, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 396, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 398, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 400, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 402, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 404, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 406, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 410, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 414, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 417, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 423, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 425, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x18716b0 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 42x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x18716b0 now
> face 0, level 0... 0x850e90 vs 0x850e90 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 257
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1871ea0 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 42x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1871ea0 now
> face 0, level 0... 0x764290 vs 0x764290 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300NewTextureObject( 0x1867c80 (target = GL_FALSE) )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>level 0, face 0: rs:1024 512x16 at 0
>level 1, face 0: rs:512 256x8 at 16384
>level 2, face 0: rs:256 128x4 at 20480
>level 3, face 0: rs:128 64x2 at 21504
>level 4, face 0: rs:64 32x1 at 21760
>level 5, face 0: rs:64 16x1 at 21824
>level 6, face 0: rs:64 8x1 at 21888
>level 7, face 0: rs:64 4x1 at 21952
>level 8, face 0: rs:64 2x1 at 22016
>level 9, face 0: rs:64 1x1 at 22080
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1867c80 now
> Allocate new miptree
>level 0, face 0: rs:1024 512x16 at 0
> face 0, level 0... 0x7b1430 vs 0x7b20f0 migrating
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x18752d0 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 42x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x18752d0 now
> face 0, level 0... 0x7b20f0 vs 0x7b20f0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1867c80 now
> face 0, level 0... 0x7b1430 vs 0x7b1430 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x18756b0 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 42x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x18756b0 now
> face 0, level 0... 0x1860db0 vs 0x1860db0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300NewTextureObject( 0x18607a0 (target = GL_FALSE) )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>level 0, face 0: rs:1024 512x16 at 0
>level 1, face 0: rs:512 256x8 at 16384
>level 2, face 0: rs:256 128x4 at 20480
>level 3, face 0: rs:128 64x2 at 21504
>level 4, face 0: rs:64 32x1 at 21760
>level 5, face 0: rs:64 16x1 at 21824
>level 6, face 0: rs:64 8x1 at 21888
>level 7, face 0: rs:64 4x1 at 21952
>level 8, face 0: rs:64 2x1 at 22016
>level 9, face 0: rs:64 1x1 at 22080
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x18607a0 now
> Allocate new miptree
>level 0, face 0: rs:1024 512x16 at 0
> face 0, level 0... 0x783700 vs 0x857ff0 migrating
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 368
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 343, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 347, from cp_wait:212
>BEGIN_BATCH(2) at 349, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 351, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 354, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 357, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 360, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 363, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 365, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 372, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 381, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 383, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 385, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 387, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 389, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 391, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 396, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 398, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 400, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 402, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 404, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 406, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 410, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 414, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 417, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 423, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 425, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 454
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 429
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 429, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 433, from cp_wait:212
>BEGIN_BATCH(2) at 435, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 437, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 440, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 443, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 446, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 449, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 451, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 454, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 456, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 458, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 467, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 469, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 471, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 473, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 475, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 477, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 482, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 484, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 486, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 488, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 490, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 492, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 496, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 498, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 500, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 503, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 509, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 511, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x187a7b0 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x187a7b0 now
> face 0, level 0... 0x72f5c0 vs 0x72f5c0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 257
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x187ab90 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x187ab90 now
> face 0, level 0... 0x18783c0 vs 0x18783c0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x187af70 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x187af70 now
> face 0, level 0... 0x7651f0 vs 0x7651f0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x187b760 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x187b760 now
> face 0, level 0... 0x76c8a0 vs 0x76c8a0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 0, wait 2, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x18643c0 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x18643c0 now
> face 0, level 0... 0x700bc0 vs 0x700bc0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x187bb40 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x187bb40 now
> face 0, level 0... 0x7b4d10 vs 0x7b4d10 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x187bf20 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x187bf20 now
> face 0, level 0... 0x6fc220 vs 0x6fc220 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1872690 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x56 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1872690 now
> face 0, level 0... 0x858380 vs 0x858380 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x187d530 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x187d530 now
> face 0, level 0... 0x768040 vs 0x768040 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x187d120 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x187d120 now
> face 0, level 0... 0x1864100 vs 0x1864100 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x187df20 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x187df20 now
> face 0, level 0... 0x1868500 vs 0x1868500 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1880890 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1880890 now
> face 0, level 0... 0x1874320 vs 0x1874320 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1881080 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1881080 now
> face 0, level 0... 0x1877fb0 vs 0x1877fb0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1881c80 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1881c80 now
> face 0, level 0... 0x187d910 vs 0x187d910 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1874650 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x56 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1874650 now
> face 0, level 0... 0x18819c0 vs 0x18819c0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1884480 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:320 70x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1884480 now
> face 0, level 0... 0x1877d20 vs 0x1877d20 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1876ac0 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1876ac0 now
> face 0, level 0... 0x1884860 vs 0x1884860 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1880340 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1880340 now
> face 0, level 0... 0x187cde0 vs 0x187cde0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 368
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 343
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 343, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 347, from cp_wait:212
>BEGIN_BATCH(2) at 349, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 351, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 354, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 357, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 360, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 363, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 365, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 372, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 381, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 383, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 385, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 387, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 389, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 391, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 396, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 398, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 400, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 402, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 404, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 406, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 410, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 414, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 417, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 423, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 425, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1885410 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1885410 now
> face 0, level 0... 0x187c4e0 vs 0x187c4e0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1886420 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1886420 now
> face 0, level 0... 0x18779f0 vs 0x18779f0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 257
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1886c10 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1886c10 now
> face 0, level 0... 0x18767c0 vs 0x18767c0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1887400 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1887400 now
> face 0, level 0... 0x1863a20 vs 0x1863a20 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1888000 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1888000 now
> face 0, level 0... 0x1887130 vs 0x1887130 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 257
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1888c00 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1888c00 now
> face 0, level 0... 0x1887d40 vs 0x1887d40 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 257
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1888fe0 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1888fe0 now
> face 0, level 0... 0x187ff70 vs 0x187ff70 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 257
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x18897d0 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x18897d0 now
> face 0, level 0... 0x1888940 vs 0x1888940 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 257
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x188a3d0 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x188a3d0 now
> face 0, level 0... 0x188b290 vs 0x188b290 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x188b520 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x21 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x188b520 now
> face 0, level 0... 0x188a110 vs 0x188a110 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 368
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 343
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 343, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 347, from cp_wait:212
>BEGIN_BATCH(2) at 349, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 351, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 354, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 357, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 360, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 363, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 365, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 372, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 381, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 383, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 385, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 387, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 389, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 391, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 396, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 398, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 400, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 402, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 404, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 406, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 410, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 414, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 417, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 423, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 425, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 144 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 368
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 343, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 347, from cp_wait:212
>BEGIN_BATCH(2) at 349, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 351, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 354, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 357, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 360, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 363, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 365, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 372, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 381, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 383, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 385, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 387, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 389, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 391, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 396, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 398, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 400, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 402, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 404, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 406, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 410, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 414, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 417, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 423, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 425, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 454
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 429, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 433, from cp_wait:212
>BEGIN_BATCH(2) at 435, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 437, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 440, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 443, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 446, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 449, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 451, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 454, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 456, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 458, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 467, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 469, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 471, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 473, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 475, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 477, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 482, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 484, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 486, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 488, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 490, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 492, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 496, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 498, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 500, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 503, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 509, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 511, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 540
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 515, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 519, from cp_wait:212
>BEGIN_BATCH(2) at 521, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 523, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 526, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 529, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 532, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 535, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 537, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 540, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 542, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 544, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 553, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 555, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 557, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 559, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 561, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 563, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 568, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 570, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 572, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 574, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 576, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 578, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 582, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 584, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 586, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 589, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 595, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 597, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 626
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 601
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 601, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 605, from cp_wait:212
>BEGIN_BATCH(2) at 607, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 609, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 612, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 615, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 618, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 621, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 623, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 626, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 628, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 630, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 639, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 641, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 643, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 645, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 647, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 649, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 654, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 656, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 658, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 660, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 662, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 664, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 668, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 670, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 672, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 675, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 681, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 683, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 144 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 368
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 343, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 347, from cp_wait:212
>BEGIN_BATCH(2) at 349, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 351, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 354, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 357, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 360, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 363, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 365, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 372, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 381, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 383, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 385, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 387, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 389, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 391, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 396, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 398, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 400, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 402, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 404, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 406, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 410, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 414, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 417, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 423, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 425, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 454
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 429
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 429, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 433, from cp_wait:212
>BEGIN_BATCH(2) at 435, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 437, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 440, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 443, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 446, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 449, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 451, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 454, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 456, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 458, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 467, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 469, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 471, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 473, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 475, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 477, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 482, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 484, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 486, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 488, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 490, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 492, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 496, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 498, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 500, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 503, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 509, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 511, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1889bb0 (target = GL_FALSE) )
>level 0, face 0: rs:4096 1024x1 at 0
>level 1, face 0: rs:2048 512x1 at 4096
>level 2, face 0: rs:1024 256x1 at 6144
>level 3, face 0: rs:512 128x1 at 7168
>level 4, face 0: rs:256 64x1 at 7680
>level 5, face 0: rs:128 32x1 at 7936
>level 6, face 0: rs:64 16x1 at 8064
>level 7, face 0: rs:64 8x1 at 8128
>level 8, face 0: rs:64 4x1 at 8192
>level 9, face 0: rs:64 2x1 at 8256
>level 10, face 0: rs:64 1x1 at 8320
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_TEXTURE_GEN_S = GL_TRUE )
>r300Enable( GL_TEXTURE_1D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>Fragment Program: Initial program:
># Fragment Program/Shader
>  0: TXP TEMP[0], INPUT[4], texture[0], 1D;
>  1: MUL OUTPUT[1], TEMP[0], STATE[0];
>  2: END
>Fragment Program: After native rewrite:
># Radeon Compiler Program
>  1: TXP TEMP[0], INPUT[4], texture[0], 1D;
>  2: MUL OUTPUT[1], TEMP[0], STATE[0];
>Compiler: after NqSSA-DCE:
># Radeon Compiler Program
>  1: TXP TEMP[0], INPUT[4], texture[0], 1D;
>  2: MUL OUTPUT[1], TEMP[0], STATE[0];
>Emit paired program
> BEGIN_TEX
>   TXP TEMP[1], INPUT[0], texture[0], 1D;
> END_TEX
>       RGB:    Src0 = TEMP[1]  Src1 = CNST[0]
>       Alpha:  Src0 = TEMP[1]  Src1 = CNST[0]
>  MAD COLOR.xyz, Src0.xyz, Src1.xyz, Src0.000
>  MAD COLOR.w, Src0.w, Src1.w, Src0.0
> END
>pc=3*************************************
>Hardware program
>----------------
>NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00400000)
>  TEX:
>    TXP t1, t0, texture[0]   (00018040)
>  0: xyz:  t1  c0  t0 -> o0.xyz               (1c000801)
>       w:  t1  c0  t0 -> o0.w                 (01000801)
>     xyz:   t1.xyz   c0.xyz      0.0    op: 00050200
>       w:     t1.w     c0.w      0.0    op: 00040509
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1889bb0 now
> Allocate new miptree
>level 0, face 0: rs:4096 1024x1 at 0
> face 0, level 0... 0x1877410 vs 0x1877180 migrating
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 60 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_TEXTURE_GEN_S = GL_FALSE )
>r300Enable( GL_TEXTURE_1D = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>radeonFlush 257
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 303, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 308, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 311, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 317, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 319, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 368
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 343, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 347, from cp_wait:212
>BEGIN_BATCH(2) at 349, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 351, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 354, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 357, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 360, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 363, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 365, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 372, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 381, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 383, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 385, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 387, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 389, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 391, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 396, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 398, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 400, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 402, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 404, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 406, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 410, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 414, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 417, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 423, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 425, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 454
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 429
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 429, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 433, from cp_wait:212
>BEGIN_BATCH(2) at 435, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 437, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 440, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 443, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 446, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 449, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 451, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 454, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 456, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 458, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 467, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 469, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 471, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 473, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 475, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 477, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 482, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 484, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 486, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 488, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 490, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 492, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 496, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 498, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 500, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 503, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 509, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 511, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_GEN_S = GL_TRUE )
>r300Enable( GL_TEXTURE_1D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 60 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_TEXTURE_GEN_S = GL_FALSE )
>r300Enable( GL_TEXTURE_1D = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>radeonFlush 257
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 303, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 308, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 311, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 317, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 319, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 368
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 343, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 347, from cp_wait:212
>BEGIN_BATCH(2) at 349, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 351, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 354, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 357, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 360, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 363, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 365, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 372, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 381, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 383, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 385, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 387, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 389, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 391, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 396, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 398, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 400, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 402, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 404, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 406, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 410, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 414, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 417, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 423, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 425, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 454
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 429, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 433, from cp_wait:212
>BEGIN_BATCH(2) at 435, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 437, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 440, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 443, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 446, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 449, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 451, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 454, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 456, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 458, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 467, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 469, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 471, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 473, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 475, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 477, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 482, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 484, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 486, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 488, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 490, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 492, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 496, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 498, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 500, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 503, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 509, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 511, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 540
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 515, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 519, from cp_wait:212
>BEGIN_BATCH(2) at 521, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 523, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 526, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 529, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 532, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 535, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 537, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 540, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 542, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 544, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 553, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 555, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 557, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 559, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 561, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 563, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 568, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 570, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 572, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 574, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 576, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 578, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 582, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 584, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 586, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 589, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 595, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 597, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 626
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 601, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 605, from cp_wait:212
>BEGIN_BATCH(2) at 607, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 609, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 612, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 615, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 618, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 621, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 623, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 626, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 628, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 630, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 639, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 641, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 643, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 645, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 647, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 649, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 654, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 656, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 658, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 660, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 662, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 664, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 668, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 670, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 672, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 675, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 681, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 683, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 712
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 687, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 691, from cp_wait:212
>BEGIN_BATCH(2) at 693, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 695, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 698, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 701, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 704, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 707, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 709, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 712, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 714, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 716, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 725, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 727, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 729, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 731, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 733, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 735, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 740, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 742, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 744, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 746, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 748, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 750, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 754, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 756, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 758, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 761, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 767, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 769, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 798
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 773, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 777, from cp_wait:212
>BEGIN_BATCH(2) at 779, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 781, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 784, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 787, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 790, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 793, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 795, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 798, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 800, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 802, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 811, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 813, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 815, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 817, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 819, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 821, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 826, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 828, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 830, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 832, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 834, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 836, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 840, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 842, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 844, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 847, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 853, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 855, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 884
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 859
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 859, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 863, from cp_wait:212
>BEGIN_BATCH(2) at 865, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 867, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 870, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 873, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 876, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 879, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 881, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 884, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 886, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 888, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 897, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 899, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 901, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 903, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 905, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 907, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 912, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 914, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 916, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 918, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 920, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 922, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 926, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 928, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 930, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 933, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 939, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 941, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_GEN_S = GL_TRUE )
>r300Enable( GL_TEXTURE_1D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 60 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_TEXTURE_GEN_S = GL_FALSE )
>r300Enable( GL_TEXTURE_1D = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>radeonFlush 257
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 303, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 308, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 311, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 317, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 319, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 368
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 343, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 347, from cp_wait:212
>BEGIN_BATCH(2) at 349, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 351, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 354, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 357, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 360, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 363, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 365, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 372, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 381, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 383, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 385, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 387, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 389, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 391, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 396, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 398, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 400, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 402, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 404, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 406, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 410, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 414, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 417, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 423, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 425, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 454
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 429, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 433, from cp_wait:212
>BEGIN_BATCH(2) at 435, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 437, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 440, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 443, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 446, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 449, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 451, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 454, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 456, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 458, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 467, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 469, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 471, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 473, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 475, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 477, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 482, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 484, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 486, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 488, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 490, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 492, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 496, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 498, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 500, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 503, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 509, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 511, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 540
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 515, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 519, from cp_wait:212
>BEGIN_BATCH(2) at 521, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 523, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 526, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 529, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 532, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 535, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 537, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 540, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 542, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 544, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 553, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 555, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 557, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 559, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 561, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 563, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 568, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 570, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 572, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 574, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 576, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 578, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 582, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 584, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 586, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 589, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 595, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 597, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 626
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 601, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 605, from cp_wait:212
>BEGIN_BATCH(2) at 607, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 609, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 612, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 615, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 618, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 621, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 623, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 626, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 628, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 630, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 639, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 641, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 643, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 645, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 647, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 649, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 654, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 656, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 658, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 660, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 662, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 664, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 668, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 670, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 672, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 675, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 681, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 683, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 712
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 687, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 691, from cp_wait:212
>BEGIN_BATCH(2) at 693, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 695, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 698, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 701, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 704, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 707, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 709, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 712, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 714, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 716, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 725, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 727, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 729, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 731, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 733, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 735, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 740, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 742, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 744, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 746, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 748, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 750, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 754, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 756, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 758, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 761, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 767, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 769, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 798
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 773, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 777, from cp_wait:212
>BEGIN_BATCH(2) at 779, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 781, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 784, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 787, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 790, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 793, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 795, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 798, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 800, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 802, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 811, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 813, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 815, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 817, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 819, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 821, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 826, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 828, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 830, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 832, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 834, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 836, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 840, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 842, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 844, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 847, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 853, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 855, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 884
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 859
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 859, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 863, from cp_wait:212
>BEGIN_BATCH(2) at 865, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 867, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 870, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 873, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 876, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 879, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 881, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 884, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 886, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 888, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 897, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 899, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 901, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 903, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 905, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 907, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 912, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 914, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 916, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 918, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 920, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 922, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 926, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 928, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 930, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 933, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 939, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 941, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_GEN_S = GL_TRUE )
>r300Enable( GL_TEXTURE_1D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 60 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_TEXTURE_GEN_S = GL_FALSE )
>r300Enable( GL_TEXTURE_1D = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>radeonFlush 257
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 303, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 308, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 311, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 317, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 319, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x8e00d0 now
> face 0, level 0... 0x7832b0 vs 0x7832b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 368
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 343, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 347, from cp_wait:212
>BEGIN_BATCH(2) at 349, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 351, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 354, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 357, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 360, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 363, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 365, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 372, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 381, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 383, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 385, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 387, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 389, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 391, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 396, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 398, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 400, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 402, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 404, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 406, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 410, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 412, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 414, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 417, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 423, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 425, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 454
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 429, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 433, from cp_wait:212
>BEGIN_BATCH(2) at 435, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 437, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 440, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 443, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 446, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 449, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 451, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 454, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 456, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 458, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 467, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 469, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 471, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 473, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 475, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 477, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 482, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 484, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 486, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 488, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 490, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 492, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 496, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 498, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 500, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 503, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 509, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 511, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 540
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 515, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 519, from cp_wait:212
>BEGIN_BATCH(2) at 521, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 523, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 526, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 529, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 532, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 535, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 537, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 540, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 542, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 544, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 553, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 555, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 557, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 559, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 561, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 563, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 568, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 570, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 572, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 574, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 576, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 578, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 582, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 584, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 586, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 589, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 595, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 597, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 626
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 601, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 605, from cp_wait:212
>BEGIN_BATCH(2) at 607, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 609, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 612, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 615, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 618, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 621, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 623, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 626, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 628, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 630, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 639, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 641, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 643, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 645, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 647, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 649, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 654, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 656, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 658, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 660, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 662, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 664, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 668, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 670, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 672, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 675, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 681, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 683, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 712
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 687, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 691, from cp_wait:212
>BEGIN_BATCH(2) at 693, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 695, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 698, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 701, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 704, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 707, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 709, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 712, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 714, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 716, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 725, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 727, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 729, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 731, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 733, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 735, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 740, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 742, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 744, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 746, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 748, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 750, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 754, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 756, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 758, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 761, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 767, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 769, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 798
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 773, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 777, from cp_wait:212
>BEGIN_BATCH(2) at 779, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 781, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 784, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 787, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 790, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 793, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 795, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 798, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 800, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 802, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 811, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 813, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 815, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 817, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 819, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 821, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 826, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 828, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 830, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 832, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 834, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 836, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 840, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 842, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 844, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 847, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 853, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 855, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 884
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 859, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 863, from cp_wait:212
>BEGIN_BATCH(2) at 865, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 867, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 870, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 873, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 876, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 879, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 881, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 884, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 886, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 888, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 897, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 899, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 901, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 903, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 905, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 907, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 912, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 914, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 916, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 918, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 920, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 922, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 926, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 928, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 930, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 933, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 939, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 941, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 970
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 945, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 949, from cp_wait:212
>BEGIN_BATCH(2) at 951, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 953, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 956, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 959, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 962, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 965, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 967, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 970, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 972, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 974, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 983, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 985, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 987, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 989, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 991, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 993, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 998, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 1000, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 1002, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 1004, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 1006, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 1008, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 1012, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 1014, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 1016, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1019, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1025, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1027, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 1056
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1031, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1035, from cp_wait:212
>BEGIN_BATCH(2) at 1037, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1039, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1042, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1045, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1048, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1051, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1053, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1056, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1058, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1060, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 1069, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1071, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1073, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1075, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1077, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1079, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 1084, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 1086, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 1088, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 1090, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 1092, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 1094, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 1098, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 1100, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 1102, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1105, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1111, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1113, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 1142
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 1117
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1117, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1121, from cp_wait:212
>BEGIN_BATCH(2) at 1123, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1125, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1128, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1131, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1134, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1137, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1139, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1142, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1144, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1146, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 1155, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1157, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1159, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1161, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1163, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1165, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 1170, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 1172, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 1174, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 1176, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 1178, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 1180, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 1184, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 1186, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 1188, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1191, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1197, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1199, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300Clear
>r300Enable( GL_BLEND = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_COLOR_ARRAY = GL_TRUE )
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>Fragment Program: Initial program:
># Fragment Program/Shader
>  0: MOV OUTPUT[1], INPUT[1];
>  1: END
>Fragment Program: After native rewrite:
># Radeon Compiler Program
>  1: MOV OUTPUT[1], INPUT[1];
>Compiler: after NqSSA-DCE:
># Radeon Compiler Program
>  1: MOV OUTPUT[1], INPUT[1];
>Emit paired program
>       RGB:    Src0 = TEMP[0]
>       Alpha:  Src0 = TEMP[0]
>  MAD COLOR.xyz, Src0.xyz, Src0.111, Src0.000
>  MAD COLOR.w, Src0.w, Src0.1, Src0.0
> END
>pc=4*************************************
>Hardware program
>----------------
>NODE 0: alu_offset: 0, tex_offset: 0, alu_end: 0, tex_end: 0  (code_addr: 00400000)
>  0: xyz:  t0  t0  t0 -> o0.xyz               (1c000000)
>       w:  t0  t0  t0 -> o0.w                 (01000000)
>     xyz:   t0.xyz      1.0      0.0    op: 00050a80
>       w:     t0.w      1.0      0.0    op: 00040889
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 209
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 60 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_BLEND = GL_TRUE )
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  skip state fpp
>  emit fogs 2/2
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 129, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 133, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 136, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 138, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 147, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 149, from emit_cb_offset:299
>BEGIN_BATCH(3) at 157, from emit_cb_offset:328
>BEGIN_BATCH(16) at 160, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 176, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 186, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 188, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 191, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 195, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 200, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 208, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 210, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 213, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>  skip state queryobj
>BEGIN_BATCH(3) at 217, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 220, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 226, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 228, from r300EmitCacheFlush:131
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 52
>r300_predict_emit_size, size 257
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 232, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 236, from cp_wait:212
>BEGIN_BATCH(2) at 238, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 240, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 243, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 246, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 249, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 252, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 254, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 257, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 259, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 261, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 270, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 272, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 274, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 276, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 278, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 283, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 286, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 288, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 292, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 295, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 301, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 303, from r300EmitCacheFlush:131
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300Clear
>r300Enable( GL_BLEND = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 47
>r300_predict_emit_size, size 332
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_BLEND = GL_TRUE )
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 307, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 311, from cp_wait:212
>BEGIN_BATCH(2) at 313, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 315, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 318, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 321, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 324, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 327, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 329, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 332, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 334, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 336, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 345, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 347, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 349, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 351, from radeon_emit_atom:1038
>  skip state fpp
>  emit bld 3/3
>BEGIN_BATCH(3) at 353, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 356, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 358, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 362, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 365, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 371, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 373, from r300EmitCacheFlush:131
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 52
>r300_predict_emit_size, size 402
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 377, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 381, from cp_wait:212
>BEGIN_BATCH(2) at 383, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 385, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 388, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 391, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 394, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 397, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 399, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 402, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 404, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 406, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 415, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 417, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 419, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 421, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 423, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 428, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 431, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 433, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 437, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 440, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 446, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 448, from r300EmitCacheFlush:131
>r300Enable( GL_TEXTURE_GEN_S = GL_TRUE )
>r300Enable( GL_TEXTURE_1D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 69
>r300_predict_emit_size, size 477
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_GEN_S = GL_FALSE )
>r300Enable( GL_TEXTURE_1D = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 452, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 456, from cp_wait:212
>BEGIN_BATCH(2) at 458, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 460, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 463, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 466, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 469, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 472, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 474, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 477, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 479, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 481, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 490, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 492, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 494, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 496, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 498, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 500, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 505, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 507, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 511, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 513, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 515, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 517, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 519, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 521, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 525, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 527, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 529, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 532, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 538, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 540, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 569
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 544, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 548, from cp_wait:212
>BEGIN_BATCH(2) at 550, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 552, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 555, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 558, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 561, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 564, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 566, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 569, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 571, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 573, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 582, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 584, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 586, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 588, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 590, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 595, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 598, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 604, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 606, from r300EmitCacheFlush:131
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300Clear
>r300Enable( GL_BLEND = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 47
>r300_predict_emit_size, size 635
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_BLEND = GL_TRUE )
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 610, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 614, from cp_wait:212
>BEGIN_BATCH(2) at 616, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 618, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 621, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 624, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 627, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 630, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 632, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 635, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 637, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 639, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 648, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 650, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 652, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 654, from radeon_emit_atom:1038
>  skip state fpp
>  emit bld 3/3
>BEGIN_BATCH(3) at 656, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 659, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 661, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 665, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 668, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 674, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 676, from r300EmitCacheFlush:131
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 52
>r300_predict_emit_size, size 705
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 680, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 684, from cp_wait:212
>BEGIN_BATCH(2) at 686, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 688, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 691, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 694, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 697, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 700, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 702, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 705, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 707, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 709, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 718, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 720, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 722, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 724, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 726, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 731, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 734, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 736, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 740, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 743, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 749, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 751, from r300EmitCacheFlush:131
>radeonFlush 755
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 755, from cp_wait:212
>BEGIN_BATCH(2) at 757, from r300_vtbl_pre_emit_atoms:222
>  emit cmk 2/2
>BEGIN_BATCH(2) at 759, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 761, from radeon_emit_atom:1038
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x1885fc0 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:64 8x5 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x1885fc0 now
> face 0, level 0... 0x188a7b0 vs 0x188a7b0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>radeonFlush 0
>enter radeon_update_renderbuffers, drawable 0x77e340
>radeonMakeCurrent ctx 0x110ecb0 dfb 0x1846640 rfb 0x1846640
>End radeonMakeCurrent
>radeonFlush 0
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>enter radeon_update_renderbuffers, drawable 0x77e340
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x184b140 now
> face 0, level 0... 0x7601c0 vs 0x7601c0 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x77e3e0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>radeonFlush 0
>Render to RGBA8 texture OK
>Begin render texture tid 7c8d9750 tex=1 w=298 h=279 refcount=1
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>enter radeon_update_renderbuffers, drawable 0x77e340
>radeonMakeCurrent ctx 0x110ecb0 dfb 0x1846640 rfb 0x1846640
>End radeonMakeCurrent
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 214
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 48 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 127, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 132, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 134, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 138, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 141, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 145, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 148, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 154, from emit_cb_offset:299
>BEGIN_BATCH(3) at 162, from emit_cb_offset:328
>BEGIN_BATCH(16) at 165, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 181, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 191, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 193, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 196, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 200, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 205, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 213, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 215, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 218, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>  skip state queryobj
>BEGIN_BATCH(3) at 222, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 225, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 231, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 233, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x189f2e0 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x189f2e0 now
> face 0, level 0... 0x189df30 vs 0x189df30 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>enter radeon_update_renderbuffers, drawable 0x77e340
>radeonMakeCurrent ctx 0x110ecb0 dfb 0x1846640 rfb 0x1846640
>End radeonMakeCurrent
>radeonFlush 0
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>enter radeon_update_renderbuffers, drawable 0x77e340
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x77e3e0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>radeonFlush 0
>Render to RGBA8 texture OK
>Begin render texture tid 7c8d9750 tex=1 w=298 h=279 refcount=1
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>enter radeon_update_renderbuffers, drawable 0x77e340
>radeonMakeCurrent ctx 0x110ecb0 dfb 0x1846640 rfb 0x1846640
>End radeonMakeCurrent
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 214
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 48 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 127, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 132, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 134, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 138, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 141, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 145, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 148, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 154, from emit_cb_offset:299
>BEGIN_BATCH(3) at 162, from emit_cb_offset:328
>BEGIN_BATCH(16) at 165, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 181, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 191, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 193, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 196, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 200, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 205, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 213, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 215, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 218, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>  skip state queryobj
>BEGIN_BATCH(3) at 222, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 225, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 231, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 233, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 262
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>radeonFlush 237
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 237, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 241, from cp_wait:212
>BEGIN_BATCH(2) at 243, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 245, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 248, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 251, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 254, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 257, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 259, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 262, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 264, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 266, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 275, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 279, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 281, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 283, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 288, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 291, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 297, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 299, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300Clear
>r300Enable( GL_BLEND = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 209
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 60 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_BLEND = GL_TRUE )
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  skip state fpp
>  emit fogs 2/2
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 129, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 133, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 136, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 138, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 147, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 149, from emit_cb_offset:299
>BEGIN_BATCH(3) at 157, from emit_cb_offset:328
>BEGIN_BATCH(16) at 160, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 176, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 186, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 188, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 191, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 195, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 200, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 208, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 210, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 213, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>  skip state queryobj
>BEGIN_BATCH(3) at 217, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 220, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 226, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 228, from r300EmitCacheFlush:131
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 52
>r300_predict_emit_size, size 257
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 232, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 236, from cp_wait:212
>BEGIN_BATCH(2) at 238, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 240, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 243, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 246, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 249, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 252, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 254, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 257, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 259, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 261, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 270, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 272, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 274, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 276, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 278, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 283, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 286, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 288, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 292, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 295, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 301, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 303, from r300EmitCacheFlush:131
>radeonFlush 307
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 307, from cp_wait:212
>BEGIN_BATCH(2) at 309, from r300_vtbl_pre_emit_atoms:222
>  emit cmk 2/2
>BEGIN_BATCH(2) at 311, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 313, from radeon_emit_atom:1038
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300NewTextureObject( 0x18a6240 (target = GL_FALSE) )
>r300TexParameter( GL_TEXTURE_WRAP_S )
>r300TexParameter( GL_TEXTURE_WRAP_T )
>r300TexParameter( GL_TEXTURE_WRAP_R )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>level 0, face 0: rs:192 33x26 at 0
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300TexParameter( GL_TEXTURE_MAG_FILTER )
>r300TexParameter( GL_TEXTURE_MIN_FILTER )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>radeon_validate_texture_miptree: Validating texture 0x18a6240 now
> face 0, level 0... 0x18a7440 vs 0x18a7440 OK
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 215, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 223, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 225, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 234, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 236, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 242, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 246, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 248, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 250, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 253, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 259, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 261, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 0
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_TEXTURE_GEN_S = GL_TRUE )
>r300Enable( GL_TEXTURE_1D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 234
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 60 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_GEN_S = GL_FALSE )
>r300Enable( GL_TEXTURE_1D = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 129, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 134, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 136, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 147, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 150, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 152, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 154, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 156, from emit_cb_offset:299
>BEGIN_BATCH(3) at 164, from emit_cb_offset:328
>BEGIN_BATCH(16) at 167, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 183, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 193, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 195, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 198, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 202, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 207, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 282
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 257, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 261, from cp_wait:212
>BEGIN_BATCH(2) at 263, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 265, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 268, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 271, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 274, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 277, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 279, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 282, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 284, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 286, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 295, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 297, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 299, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 301, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 303, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 305, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 310, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 312, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 314, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 316, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 318, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 320, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 324, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 326, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 328, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 331, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 337, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 339, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 368
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 343, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 347, from cp_wait:212
>BEGIN_BATCH(2) at 349, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 351, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 354, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 357, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 360, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 363, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 365, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 372, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 381, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 383, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 385, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 387, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 389, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 394, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 397, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 403, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 405, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 434
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 409, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 413, from cp_wait:212
>BEGIN_BATCH(2) at 415, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 417, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 420, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 423, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 426, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 429, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 431, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 434, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 436, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 438, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 447, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 449, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 451, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 453, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 455, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 457, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 462, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 464, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 466, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 468, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 470, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 472, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 476, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 478, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 480, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 483, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 489, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 491, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 520
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 495, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 499, from cp_wait:212
>BEGIN_BATCH(2) at 501, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 503, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 506, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 509, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 512, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 515, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 517, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 520, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 522, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 524, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 533, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 535, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 537, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 539, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 541, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 543, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 548, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 550, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 552, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 554, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 556, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 558, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 562, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 564, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 566, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 569, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 575, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 577, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 606
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 581, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 585, from cp_wait:212
>BEGIN_BATCH(2) at 587, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 589, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 592, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 595, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 598, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 601, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 603, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 606, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 608, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 610, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 619, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 621, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 623, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 625, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 627, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 629, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 634, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 636, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 638, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 640, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 642, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 644, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 648, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 650, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 652, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 655, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 661, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 663, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 692
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 667, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 671, from cp_wait:212
>BEGIN_BATCH(2) at 673, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 675, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 678, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 681, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 684, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 687, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 689, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 692, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 694, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 696, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 705, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 707, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 709, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 711, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 713, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 715, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 720, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 722, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 724, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 726, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 728, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 730, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 734, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 736, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 738, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 741, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 747, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 749, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 778
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 753, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 757, from cp_wait:212
>BEGIN_BATCH(2) at 759, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 761, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 764, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 767, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 770, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 773, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 775, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 778, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 780, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 782, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 791, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 793, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 795, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 797, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 799, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 801, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 806, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 808, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 810, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 812, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 814, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 816, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 820, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 822, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 824, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 827, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 833, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 835, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 864
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 839, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 843, from cp_wait:212
>BEGIN_BATCH(2) at 845, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 847, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 850, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 853, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 856, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 859, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 861, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 864, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 866, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 868, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 877, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 879, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 881, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 883, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 885, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 887, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 892, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 894, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 896, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 898, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 900, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 902, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 906, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 908, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 910, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 913, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 919, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 921, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 950
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 925, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 929, from cp_wait:212
>BEGIN_BATCH(2) at 931, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 933, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 936, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 939, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 942, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 945, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 947, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 950, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 952, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 954, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 963, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 965, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 967, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 969, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 971, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 973, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 978, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 980, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 982, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 984, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 986, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 988, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 992, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 994, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 996, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 999, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1005, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1007, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 1036
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1011, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1015, from cp_wait:212
>BEGIN_BATCH(2) at 1017, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1019, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1022, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1025, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1028, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1031, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1033, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1036, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1038, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1040, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 1049, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1051, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1053, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1055, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1057, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1059, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 1064, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 1066, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 1068, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 1070, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 1072, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 1074, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 1078, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 1080, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 1082, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1085, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1091, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1093, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 1122
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1097, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1101, from cp_wait:212
>BEGIN_BATCH(2) at 1103, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1105, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1108, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1111, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1114, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1117, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1119, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1122, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1124, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1126, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 1135, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1137, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1139, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1141, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1143, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1145, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 1150, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 1152, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 1154, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 1156, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 1158, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 1160, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 1164, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 1166, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 1168, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1171, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1177, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1179, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 1208
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1183, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1187, from cp_wait:212
>BEGIN_BATCH(2) at 1189, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1191, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1194, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1197, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1200, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1203, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1205, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1208, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1210, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1212, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 1221, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1223, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1225, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1227, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1229, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1231, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 1236, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 1238, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 1240, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 1242, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 1244, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 1246, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 1250, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 1252, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 1254, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1257, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1263, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1265, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 1294
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1269, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1273, from cp_wait:212
>BEGIN_BATCH(2) at 1275, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1277, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1280, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1283, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1286, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1289, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1291, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1294, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1296, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1298, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 1307, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1309, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1311, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1313, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1315, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1317, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 1322, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 1324, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 1326, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 1328, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 1330, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 1332, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 1336, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 1338, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 1340, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1343, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1349, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1351, from r300EmitCacheFlush:131
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 63
>r300_predict_emit_size, size 1380
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_2D = GL_FALSE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>radeonFlush 1355
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 1355, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 1359, from cp_wait:212
>BEGIN_BATCH(2) at 1361, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 1363, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 1366, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 1369, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 1372, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 1375, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 1377, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 1380, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 1382, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 1384, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 1393, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 1395, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 1397, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 1399, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 1401, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 1403, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 1408, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 1410, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 1412, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 1414, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 1416, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 1418, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 1422, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 1424, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 1426, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 1429, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 1435, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 1437, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>r300Enable( GL_SCISSOR_TEST = GL_TRUE )
>r300Enable( GL_SCISSOR_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300Clear
>r300Enable( GL_BLEND = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 209
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 60 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_BLEND = GL_TRUE )
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 121, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 123, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 125, from radeon_emit_atom:1038
>  skip state fpp
>  emit fogs 2/2
>BEGIN_BATCH(2) at 127, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 129, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 133, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 136, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 138, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 140, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 143, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 145, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 147, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x763cb0 0 298x279
>BEGIN_BATCH(8) at 149, from emit_cb_offset:299
>BEGIN_BATCH(3) at 157, from emit_cb_offset:328
>BEGIN_BATCH(16) at 160, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 176, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 186, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 188, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 191, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 195, from emit_zstencil_format:411
>  emit zb 8/3
>BEGIN_BATCH(8) at 200, from emit_zb_offset:383
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 208, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 210, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 213, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>  skip state queryobj
>BEGIN_BATCH(3) at 217, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 220, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 226, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 228, from r300EmitCacheFlush:131
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300Clear
>r300Enable( GL_BLEND = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 47
>r300_predict_emit_size, size 257
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_BLEND = GL_TRUE )
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 232, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 236, from cp_wait:212
>BEGIN_BATCH(2) at 238, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 240, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 243, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 246, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 249, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 252, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 254, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 257, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 259, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 261, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 270, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 272, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 274, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 276, from radeon_emit_atom:1038
>  skip state fpp
>  emit bld 3/3
>BEGIN_BATCH(3) at 278, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 281, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 283, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 287, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 290, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 296, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 298, from r300EmitCacheFlush:131
>r300Enable( GL_TEXTURE_GEN_S = GL_TRUE )
>r300Enable( GL_TEXTURE_1D = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 72
>r300_predict_emit_size, size 327
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_GEN_S = GL_FALSE )
>r300Enable( GL_TEXTURE_1D = GL_FALSE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 302, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 306, from cp_wait:212
>BEGIN_BATCH(2) at 308, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 310, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 313, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 316, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 319, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 322, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 324, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 327, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 329, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 331, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 340, from radeon_emit_atom:1038
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 342, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 344, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 346, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 348, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 350, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 355, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 358, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 360, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 364, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 366, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 368, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 370, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 372, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 374, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 378, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 380, from radeon_emit_atom:1038
>BEGIN_BATCH(3) at 382, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 385, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 391, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 393, from r300EmitCacheFlush:131
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 43
>r300_predict_emit_size, size 422
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 397, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 401, from cp_wait:212
>BEGIN_BATCH(2) at 403, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 405, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 408, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 411, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 414, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 417, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 419, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 422, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 424, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 426, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 435, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 437, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 439, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 441, from radeon_emit_atom:1038
>  emit fpp 5/129
>BEGIN_BATCH(5) at 443, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 448, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 451, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 457, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 459, from r300EmitCacheFlush:131
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300Clear
>r300Enable( GL_BLEND = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>TX_ENABLE: 00000000  last_hw_tmu=-1
>radeonCountStateEmitSize 47
>r300_predict_emit_size, size 488
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_BLEND = GL_TRUE )
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 463, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 467, from cp_wait:212
>BEGIN_BATCH(2) at 469, from r300_vtbl_pre_emit_atoms:222
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 471, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 474, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 477, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 480, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 483, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 485, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 488, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 490, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 492, from radeon_emit_atom:1038
>  skip state fpt
>  emit fpi[0] 2/65
>BEGIN_BATCH(2) at 501, from radeon_emit_atom:1038
>  emit fpi[1] 2/65
>BEGIN_BATCH(2) at 503, from radeon_emit_atom:1038
>  emit fpi[2] 2/65
>BEGIN_BATCH(2) at 505, from radeon_emit_atom:1038
>  emit fpi[3] 2/65
>BEGIN_BATCH(2) at 507, from radeon_emit_atom:1038
>  skip state fpp
>  emit bld 3/3
>BEGIN_BATCH(3) at 509, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 512, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 514, from radeon_emit_atom:1038
>  skip state tex.filter
>  skip state tex.filter_1
>  skip state tex.size
>  skip state tex.format
>  skip state tex.pitch
>  skip state tex.offset
>  skip state tex.chroma_key
>  skip state tex.border_color
>BEGIN_BATCH(3) at 518, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 521, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 527, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 529, from r300EmitCacheFlush:131
>radeonFlush 533
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 533, from cp_wait:212
>BEGIN_BATCH(2) at 535, from r300_vtbl_pre_emit_atoms:222
>  emit bld 3/3
>BEGIN_BATCH(3) at 537, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 540, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 542, from radeon_emit_atom:1038
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>enter radeon_update_renderbuffers, drawable 0x77e340
>radeonMakeCurrent ctx 0x110ecb0 dfb 0x1846640 rfb 0x1846640
>End radeonMakeCurrent
>radeonFlush 0
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>enter radeon_update_renderbuffers, drawable 0x77e340
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_DEPTH_TEST = GL_FALSE )
>r300Enable( GL_STENCIL_TEST = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_TRUE )
>r300Enable( GL_VERTEX_ARRAY = GL_TRUE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_TRUE )
>r300RenderStart
>r300ChooseRenderState
>r300ChooseSwtclVertexFormat
>r300ChooseSwtclVertexFormat
>mtu=8
>Activating texture unit 0
>TX_ENABLE: 00000001  last_hw_tmu=0
>radeonCountStateEmitSize 242
>r300_predict_emit_size, size 25
>rcommonAllocDmaLowVerts
>radeonRefillCurrentDmaRegion size 72 minimum_size 65536
>rcommonAllocDmaLowVerts
>rcommonAllocDmaLowVerts
>r300Enable( GL_VERTEX_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_COORD_ARRAY = GL_FALSE )
>r300Enable( GL_TEXTURE_RECTANGLE_ARB = GL_FALSE )
>radeonFlush 0
>rcommon_flush_last_swtcl_prim
>BEGIN_BATCH(4) at 0, from r300EmitCacheFlush:131
>radeonEmitState
>Begin dirty state
>BEGIN_BATCH(2) at 4, from cp_wait:212
>BEGIN_BATCH(2) at 6, from r300_vtbl_pre_emit_atoms:222
>  emit vpt 7/7
>BEGIN_BATCH(7) at 8, from radeon_emit_atom:1038
>  emit vap_cntl 4/4
>BEGIN_BATCH(4) at 15, from radeon_emit_atom:1038
>  emit vte 3/3
>BEGIN_BATCH(3) at 19, from radeon_emit_atom:1038
>  emit vap_vf_max_vtx_indx 3/3
>BEGIN_BATCH(3) at 22, from radeon_emit_atom:1038
>  emit vap_cntl_status 2/2
>BEGIN_BATCH(2) at 25, from radeon_emit_atom:1038
>  emit vir[0] 3/9
>BEGIN_BATCH(3) at 27, from radeon_emit_atom:1038
>  emit vir[1] 3/9
>BEGIN_BATCH(3) at 30, from radeon_emit_atom:1038
>  emit vic 3/3
>BEGIN_BATCH(3) at 33, from radeon_emit_atom:1038
>  emit vap_psc_sgn_norm_cntl 2/2
>BEGIN_BATCH(2) at 36, from radeon_emit_atom:1038
>  emit vof 3/3
>BEGIN_BATCH(3) at 38, from radeon_emit_atom:1038
>  emit gb_enable 2/2
>BEGIN_BATCH(2) at 41, from radeon_emit_atom:1038
>  skip state gb_misc
>  emit gb_misc2 3/3
>BEGIN_BATCH(3) at 43, from radeon_emit_atom:1038
>  emit txe 2/2
>BEGIN_BATCH(2) at 46, from radeon_emit_atom:1038
>  emit ga_point_s0 5/5
>BEGIN_BATCH(5) at 48, from radeon_emit_atom:1038
>  emit ga_triangle_stipple 2/2
>BEGIN_BATCH(2) at 53, from radeon_emit_atom:1038
>  emit ps 2/2
>BEGIN_BATCH(2) at 55, from radeon_emit_atom:1038
>  emit ga_point_minmax 4/4
>BEGIN_BATCH(4) at 57, from radeon_emit_atom:1038
>  emit lcntl 2/2
>BEGIN_BATCH(2) at 61, from radeon_emit_atom:1038
>  emit ga_line_stipple 4/4
>BEGIN_BATCH(4) at 63, from radeon_emit_atom:1038
>  skip state shade
>  emit shade2 4/4
>BEGIN_BATCH(4) at 67, from radeon_emit_atom:1038
>  emit polygon_mode 4/4
>BEGIN_BATCH(4) at 71, from radeon_emit_atom:1038
>  emit fogp 3/3
>BEGIN_BATCH(3) at 75, from radeon_emit_atom:1038
>  emit zbias_cntl 2/2
>BEGIN_BATCH(2) at 78, from radeon_emit_atom:1038
>  emit zbs 5/5
>BEGIN_BATCH(5) at 80, from radeon_emit_atom:1038
>  emit occlusion_cntl 2/2
>BEGIN_BATCH(2) at 85, from radeon_emit_atom:1038
>  emit cul 2/2
>BEGIN_BATCH(2) at 87, from radeon_emit_atom:1038
>  emit su_depth_scale 3/3
>BEGIN_BATCH(3) at 89, from radeon_emit_atom:1038
>  emit rc 3/3
>BEGIN_BATCH(3) at 92, from radeon_emit_atom:1038
>  emit ri 2/9
>BEGIN_BATCH(2) at 95, from radeon_emit_atom:1038
>  emit rr 2/9
>BEGIN_BATCH(2) at 97, from radeon_emit_atom:1038
>  emit sc_hyperz 3/3
>BEGIN_BATCH(3) at 99, from radeon_emit_atom:1038
>  emit sc_screendoor 2/2
>BEGIN_BATCH(2) at 102, from radeon_emit_atom:1038
>  emit us_out_fmt 6/6
>BEGIN_BATCH(6) at 104, from radeon_emit_atom:1038
>  emit fp 9/9
>BEGIN_BATCH(9) at 110, from radeon_emit_atom:1038
>  emit fpt 2/65
>BEGIN_BATCH(2) at 119, from radeon_emit_atom:1038
>  emit fpi[0] 3/65
>BEGIN_BATCH(3) at 121, from radeon_emit_atom:1038
>  emit fpi[1] 3/65
>BEGIN_BATCH(3) at 124, from radeon_emit_atom:1038
>  emit fpi[2] 3/65
>BEGIN_BATCH(3) at 127, from radeon_emit_atom:1038
>  emit fpi[3] 3/65
>BEGIN_BATCH(3) at 130, from radeon_emit_atom:1038
>  emit fpp 9/129
>BEGIN_BATCH(9) at 133, from radeon_emit_atom:1038
>  emit fogs 2/2
>BEGIN_BATCH(2) at 142, from radeon_emit_atom:1038
>  emit fogc 4/4
>BEGIN_BATCH(4) at 144, from radeon_emit_atom:1038
>  emit at 3/3
>BEGIN_BATCH(3) at 148, from radeon_emit_atom:1038
>  emit fg_depth_src 2/2
>BEGIN_BATCH(2) at 151, from radeon_emit_atom:1038
>  emit rb3d_cctl 2/2
>BEGIN_BATCH(2) at 153, from radeon_emit_atom:1038
>  emit bld 3/3
>BEGIN_BATCH(3) at 155, from radeon_emit_atom:1038
>  emit cmk 2/2
>BEGIN_BATCH(2) at 158, from radeon_emit_atom:1038
>  emit blend_color 2/2
>BEGIN_BATCH(2) at 160, from radeon_emit_atom:1038
>  emit rop 2/2
>BEGIN_BATCH(2) at 162, from radeon_emit_atom:1038
>  emit cb 27/4
>rrb is 0x77e3e0 0 298x279
>BEGIN_BATCH(8) at 164, from emit_cb_offset:299
>BEGIN_BATCH(3) at 172, from emit_cb_offset:328
>BEGIN_BATCH(16) at 175, from emit_cb_offset:335
>  emit rb3d_dither_ctl 10/10
>BEGIN_BATCH(10) at 191, from radeon_emit_atom:1038
>  emit rb3d_aaresolve_ctl 2/2
>BEGIN_BATCH(2) at 201, from radeon_emit_atom:1038
>  emit rb3d_discard_src_pixel_lte_threshold 3/3
>BEGIN_BATCH(3) at 203, from radeon_emit_atom:1038
>  emit zs 4/4
>BEGIN_BATCH(4) at 206, from radeon_emit_atom:1038
>  emit zstencil_format 5/5
>BEGIN_BATCH(5) at 210, from emit_zstencil_format:411
>  emit zb 8/3
>  emit zb_depthclearvalue 2/2
>BEGIN_BATCH(2) at 215, from radeon_emit_atom:1038
>  emit zb_zmask 3/3
>BEGIN_BATCH(3) at 217, from radeon_emit_atom:1038
>  emit zb_hiz_offset 2/2
>BEGIN_BATCH(2) at 220, from radeon_emit_atom:1038
>  emit zb_hiz_pitch 2/2
>BEGIN_BATCH(2) at 222, from radeon_emit_atom:1038
>  emit tex.filter 2/9
>BEGIN_BATCH(2) at 224, from radeon_emit_atom:1038
>  emit tex.filter_1 2/9
>BEGIN_BATCH(2) at 226, from radeon_emit_atom:1038
>  emit tex.size 2/9
>BEGIN_BATCH(2) at 228, from radeon_emit_atom:1038
>  emit tex.format 2/9
>BEGIN_BATCH(2) at 230, from radeon_emit_atom:1038
>  emit tex.pitch 2/9
>BEGIN_BATCH(2) at 232, from radeon_emit_atom:1038
>  emit tex.offset 4/1
>BEGIN_BATCH(4) at 234, from emit_tex_offsets:172
>  emit tex.chroma_key 2/9
>BEGIN_BATCH(2) at 238, from radeon_emit_atom:1038
>  emit tex.border_color 2/9
>BEGIN_BATCH(2) at 240, from radeon_emit_atom:1038
>  skip state queryobj
>BEGIN_BATCH(3) at 242, from r300_emit_scissor:243
>BEGIN_BATCH(7) at 245, from r300EmitVertexAOS:636
>r300EmitVbufPrim
>BEGIN_BATCH(3) at 251, from r300EmitVbufPrim:654
>BEGIN_BATCH(4) at 253, from r300EmitCacheFlush:131
>radeonEmitState
>radeonReleaseDmaRegions: free 1, wait 1, reserved 1, minimum_size: 65536
>rcommonFlushCmdBufLocked from radeonFlush - 1 cliprects
>drmRadeonCmdBuffer: -22. Kernel failed to parse or rejected command stream. See dmesg for more info.
>r300DeleteTexture( 0x18543c0 (target = GL_TEXTURE_2D) )
>r300DeleteTexture( 0x185fcb0 (target = GL_TEXTURE_2D) )
>r300DeleteTexture( 0x18607a0 (target = GL_TEXTURE_2D) )
>r300DeleteTexture( 0x1867c80 (target = GL_TEXTURE_2D) )
>KCrash: Application 'kcalc' crashing...

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Attachments on bug 23532: 28925 | 28948 | 29594 | 30450

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