Attachment 6944 Details for Bug 6756 – Also attempt to catch cases where width and pitch are incompatible for repeat

[patch] Also attempt to catch cases where width and pitch are incompatible for repeat

radeon-normalized-texcoords2.diff (text/plain), 6.00 KB, created by Michel Dänzer on 2006-09-13 10:50:39 UTC

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Creator: Michel Dänzer

Created: 2006-09-13 10:50:39 UTC

Size: 6.00 KB

patch

obsolete

>diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
>index 98b8dfd..a47c347 100644
>--- a/src/radeon_exa_render.c
>+++ b/src/radeon_exa_render.c
>@@ -252,6 +261,13 @@ static Bool FUNC_NAME(R100TextureSetup)(
> 	txformat |= RADEON_TXFORMAT_NON_POWER2;
>     txformat |= unit << 24; /* RADEON_TXFORMAT_ST_ROUTE_STQX */
>  
>+    if (((w * pPix->drawable.bitsPerPixel / 8 + 31) & ~31) != txpitch)
>+	RADEON_FALLBACK(("Width %d and pitch %u not compatible for repeat\n",
>+			 w, txpitch));
>+
>+    info->texW[unit] = w;
>+    info->texH[unit] = h;
>+
>     switch (pPict->filter) {
>     case PictFilterNearest:
> 	txfilter = (RADEON_MAG_FILTER_NEAREST | RADEON_MIN_FILTER_NEAREST);
>@@ -505,6 +521,13 @@ static Bool FUNC_NAME(R200TextureSetup)(
> 	txformat |= R200_TXFORMAT_NON_POWER2;
>     txformat |= unit << R200_TXFORMAT_ST_ROUTE_SHIFT;
> 
>+    if (((w * pPix->drawable.bitsPerPixel / 8 + 31) & ~31) != txpitch)
>+	RADEON_FALLBACK(("Width %d and pitch %u not compatible for repeat\n",
>+			 w, txpitch));
>+
>+    info->texW[unit] = w;
>+    info->texH[unit] = h;
>+
>     switch (pPict->filter) {
>     case PictFilterNearest:
> 	txfilter = (R200_MAG_FILTER_NEAREST |
>@@ -791,11 +814,6 @@ #ifdef ACCEL_CP
> 		 (4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
>     }
> 
>-    VTX_OUT(dstX,     dstY,     srcX,    srcY,    maskX,    maskY);
>-    VTX_OUT(dstX,     dstY + h, srcX,    srcYend, maskX,    maskYend);
>-    VTX_OUT(dstX + w, dstY + h, srcXend, srcYend, maskXend, maskYend);
>-    VTX_OUT(dstX + w, dstY,     srcXend, srcY,    maskXend, maskY);
>-    ADVANCE_RING();
> #else /* ACCEL_CP */
>     BEGIN_ACCEL(1 + VTX_REG_COUNT * 4);
>     if (info->ChipFamily < CHIP_FAMILY_R200) {
>@@ -808,11 +826,24 @@ #else /* ACCEL_CP */
> 					  RADEON_VF_PRIM_WALK_DATA |
> 					  4 << RADEON_VF_NUM_VERTICES_SHIFT));
>     }
>+#endif
>+
>+    VTX_OUT(dstX,     dstY,
>+	    (float)srcX / info->texW[0],     (float)srcY / info->texH[0],
>+	    (float)maskX / info->texW[1],    (float)maskY / info->texH[1]);
>+    VTX_OUT(dstX,     dstY + h,
>+	    (float)srcX / info->texW[0],     (float)srcYend / info->texH[0],
>+	    (float)maskX / info->texW[1],    (float)maskYend / info->texH[1]);
>+    VTX_OUT(dstX + w, dstY + h,
>+	    (float)srcXend / info->texW[0],  (float)srcYend / info->texH[0],
>+	    (float)maskXend / info->texW[1], (float)maskYend / info->texH[1]);
>+    VTX_OUT(dstX + w, dstY,
>+	    (float)srcXend / info->texW[0],  (float)srcY / info->texH[0],
>+	    (float)maskXend / info->texW[1], (float)maskY / info->texH[1]);
> 
>-    VTX_OUT(dstX,     dstY,     srcX,    srcY,    maskX,    maskY);
>-    VTX_OUT(dstX,     dstY + h, srcX,    srcYend, maskX,    maskYend);
>-    VTX_OUT(dstX + w, dstY + h, srcXend, srcYend, maskXend, maskYend);
>-    VTX_OUT(dstX + w, dstY,     srcXend, srcY,    maskXend, maskY);
>+#ifdef ACCEL_CP
>+    ADVANCE_RING();
>+#else
>     FINISH_ACCEL();
> #endif /* !ACCEL_CP */
> 
>diff --git a/src/radeon_render.c b/src/radeon_render.c
>index 9e3529e..85cb952 100644
>--- a/src/radeon_render.c
>+++ b/src/radeon_render.c
>@@ -398,6 +398,9 @@ #endif
>     txformat = RadeonGetTextureFormat(format);
>     tex_bytepp = PICT_FORMAT_BPP(format) >> 3;
> 
>+    if (((width * tex_bytepp + 31) & ~31) != src_pitch)
>+	return FALSE;
>+
> #ifndef ACCEL_CP
> 
> #if X_BYTE_ORDER == X_BIG_ENDIAN
>@@ -424,6 +427,9 @@ #endif
> 	txformat |= RADEON_TXFORMAT_NON_POWER2;
>     }
> 
>+    info->texW[0] = width;
>+    info->texH[0] = height;
>+
>     offset = info->RenderTex->offset * pScrn->bitsPerPixel / 8;
>     dst = (CARD8*)(info->FB + offset);
> 
>@@ -621,10 +627,10 @@ FUNC_NAME(R100SubsequentCPUToScreenTextu
> 
>     r = width + l;
>     b = height + t;
>-    fl = srcx;
>-    fr = srcx + width;
>-    ft = srcy;
>-    fb = srcy + height;
>+    fl = (float)srcx / info->texW[0];
>+    fr = (float)(srcx + width) / info->texW[0];
>+    ft = (float)srcy / info->texH[0];
>+    fb = (float)(srcy + height) / info->texH[0];
> 
> #ifdef ACCEL_CP
>     BEGIN_RING(25);
>@@ -731,6 +737,9 @@ #endif
>     txformat = RadeonGetTextureFormat(format);
>     tex_bytepp = PICT_FORMAT_BPP(format) >> 3;
> 
>+    if (((width * tex_bytepp + 31) & ~31) != src_pitch)
>+	return FALSE;
>+
> #ifndef ACCEL_CP
> 
> #if X_BYTE_ORDER == X_BIG_ENDIAN
>@@ -757,6 +766,9 @@ #endif
> 	txformat |= RADEON_TXFORMAT_NON_POWER2;
>     }
> 
>+    info->texW[0] = width;
>+    info->texH[0] = height;
>+
>     offset = info->RenderTex->offset * pScrn->bitsPerPixel / 8;
>     dst = (CARD8*)(info->FB + offset);
> 
>@@ -956,10 +968,10 @@ FUNC_NAME(R200SubsequentCPUToScreenTextu
>     
>     r = width + l;
>     b = height + t;
>-    fl = srcx;
>-    fr = srcx + width;
>-    ft = srcy;
>-    fb = srcy + height;
>+    fl = (float)srcx / info->texW[0];
>+    fr = (float)(srcx + width) / info->texW[0];
>+    ft = (float)srcy / info->texH[0];
>+    fb = (float)(srcy + height) / info->texH[0];
> 
> #ifdef ACCEL_CP
>     BEGIN_RING(24);
>diff --git a/src/radeon.h b/src/radeon.h
>index 6402e48..0b1f4bd 100644
>--- a/src/radeon.h
>+++ b/src/radeon.h
>@@ -726,6 +726,8 @@ #endif /* XF86DRI */
> 
>     /* Render */
>     Bool              RenderAccel;
>+    unsigned short    texW[2];
>+    unsigned short    texH[2];
> #ifdef USE_XAA
>     FBLinearPtr       RenderTex;
>     void              (*RenderCallback)(ScrnInfoPtr);
>diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
>index 14260c9..0e353b0 100644
>--- a/src/radeon_commonfuncs.c
>+++ b/src/radeon_commonfuncs.c
>@@ -73,8 +73,7 @@ static void FUNC_NAME(RADEONInit3DEngine
> 	OUT_ACCEL_REG(R200_PP_TXMULTI_CTL_0, 0);
> 	OUT_ACCEL_REG(R200_SE_VTX_STATE_CNTL, 0);
> 	OUT_ACCEL_REG(R200_RE_CNTL, 0x0);
>-	/* XXX: correct?  Want it to be like RADEON_VTX_ST?_NONPARAMETRIC */
>-	OUT_ACCEL_REG(R200_SE_VTE_CNTL, R200_VTX_ST_DENORMALIZED);
>+	OUT_ACCEL_REG(R200_SE_VTE_CNTL, 0);
> 	OUT_ACCEL_REG(R200_SE_VAP_CNTL, R200_VAP_FORCE_W_TO_ONE |
> 	    R200_VAP_VF_MAX_VTX_NUM);
> 	FINISH_ACCEL();
>@@ -87,8 +86,6 @@ static void FUNC_NAME(RADEONInit3DEngine
>             OUT_ACCEL_REG(RADEON_SE_CNTL_STATUS, RADEON_TCL_BYPASS);
> 	OUT_ACCEL_REG(RADEON_SE_COORD_FMT,
> 	    RADEON_VTX_XY_PRE_MULT_1_OVER_W0 |
>-	    RADEON_VTX_ST0_NONPARAMETRIC |
>-	    RADEON_VTX_ST1_NONPARAMETRIC |
> 	    RADEON_TEX1_W_ROUTING_USE_W0);
> 	FINISH_ACCEL();
>     }

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Attachments on bug 6756: 6900 | 6909 | 6944 | 6973

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