Attachment 9535 Details for Bug 10586 – X log file

X log file

Xorg.0.log-intel1.9.93 (text/plain), 150.83 KB, created by Martin Pärtel on 2007-04-09 15:10:38 UTC

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Creator: Martin Pärtel

Created: 2007-04-09 15:10:38 UTC

Size: 150.83 KB

patch

obsolete

>
>This is a pre-release version of the X server from The X.Org Foundation.
>It is not supported in any way.
>Bugs may be filed in the bugzilla at http://bugs.freedesktop.org/.
>Select the "xorg" product for bugs you find in this release.
>Before reporting bugs in pre-release versions please check the
>latest version in the X.Org Foundation git repository.
>See http://wiki.x.org/wiki/GitPage for git access instructions.
>
>X Window System Version 1.2.99.903 (1.3.0 RC 3)
>Release Date: 26 March 2007
>X Protocol Version 11, Revision 0, Release 1.2.99.903
>Build Operating System: Linux Debian
>Current Operating System: Linux lagitus 2.6.20.4 #9 SMP Mon Mar 26 21:17:31 EEST 2007 i686
>Build Date: 27 March 2007
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Sun Apr  8 10:02:12 2007
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "Default Layout"
>(**) |-->Screen "Default Screen" (0)
>(**) |   |-->Monitor "LCD"
>(**) |   |-->Device "Intel Graphics"
>(**) |-->Input Device "Generic Keyboard"
>(**) |-->Input Device "Configured Mouse"
>(**) |-->Input Device "Synaptics Touchpad"
>(WW) The directory "/usr/X11R6/lib/X11/fonts/misc" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/X11/cyrillic" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/X11R6/lib/X11/fonts/cyrillic" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/X11R6/lib/X11/fonts/100dpi/" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/X11R6/lib/X11/fonts/75dpi/" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/X11R6/lib/X11/fonts/Type1" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/X11R6/lib/X11/fonts/100dpi" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/X11R6/lib/X11/fonts/75dpi" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType" does not exist.
>	Entry deleted from font path.
>(**) FontPath set to:
>	/usr/share/fonts/X11/misc,
>	/usr/share/fonts/X11/100dpi/:unscaled,
>	/usr/share/fonts/X11/75dpi/:unscaled,
>	/usr/share/fonts/X11/Type1,
>	/usr/share/fonts/X11/100dpi,
>	/usr/share/fonts/X11/75dpi
>(==) RgbPath set to "/etc/X11/rgb"
>(==) ModulePath set to "/usr/lib/xorg/modules"
>(**) Extension "Composite" is enabled
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) Loader magic: 0x81dc820
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.3
>	X.Org Video Driver: 1.2
>	X.Org XInput driver : 0.7
>	X.Org Server Extension : 0.3
>	X.Org Font Renderer : 0.5
>(II) Loader running on linux
>(II) LoadModule: "pcidata"
>(II) Loading /usr/lib/xorg/modules//libpcidata.so
>(II) Module pcidata: vendor="X.Org Foundation"
>	compiled for 1.2.99.903, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.2
>(--) using VT number 7
>
>(II) PCI: PCI scan (all values are in hex)
>(II) PCI: 00:00:0: chip 8086,27a0 card 17aa,2017 rev 03 class 06,00,00 hdr 00
>(II) PCI: 00:02:0: chip 8086,27a2 card 17aa,201a rev 03 class 03,00,00 hdr 80
>(II) PCI: 00:02:1: chip 8086,27a6 card 17aa,201a rev 03 class 03,80,00 hdr 80
>(II) PCI: 00:1b:0: chip 8086,27d8 card 17aa,2010 rev 02 class 04,03,00 hdr 00
>(II) PCI: 00:1c:0: chip 8086,27d0 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:1: chip 8086,27d2 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:2: chip 8086,27d4 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:3: chip 8086,27d6 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1d:0: chip 8086,27c8 card 17aa,200a rev 02 class 0c,03,00 hdr 80
>(II) PCI: 00:1d:1: chip 8086,27c9 card 17aa,200a rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:2: chip 8086,27ca card 17aa,200a rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:3: chip 8086,27cb card 17aa,200a rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:7: chip 8086,27cc card 17aa,200b rev 02 class 0c,03,20 hdr 00
>(II) PCI: 00:1e:0: chip 8086,2448 card 0000,0000 rev e2 class 06,04,01 hdr 01
>(II) PCI: 00:1f:0: chip 8086,27b9 card 17aa,2009 rev 02 class 06,01,00 hdr 80
>(II) PCI: 00:1f:1: chip 8086,27df card 17aa,200c rev 02 class 01,01,8a hdr 00
>(II) PCI: 00:1f:2: chip 8086,27c5 card 17aa,200d rev 02 class 01,06,01 hdr 00
>(II) PCI: 00:1f:3: chip 8086,27da card 17aa,200f rev 02 class 0c,05,00 hdr 00
>(II) PCI: 02:00:0: chip 8086,109a card 17aa,2001 rev 00 class 02,00,00 hdr 00
>(II) PCI: 03:00:0: chip 8086,4227 card 8086,1011 rev 02 class 02,80,00 hdr 00
>(II) PCI: 15:00:0: chip 104c,ac56 card 9000,0000 rev 00 class 06,07,00 hdr 02
>(II) PCI: End of PCI scan
>(II) Intel Bridge workaround enabled
>(II) Host-to-PCI bridge:
>(II) Bus 0: bridge is at (0:0:0), (0,0,22), BCTRL: 0x0008 (VGA_EN is set)
>(II) Bus 0 I/O range:
>	[0] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) Bus 0 non-prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) Bus 0 prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 2: bridge is at (0:28:0), (0,2,2), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 2 I/O range:
>	[0] -1	0	0x00002000 - 0x000020ff (0x100) IX[B]
>	[1] -1	0	0x00002400 - 0x000024ff (0x100) IX[B]
>	[2] -1	0	0x00002800 - 0x000028ff (0x100) IX[B]
>	[3] -1	0	0x00002c00 - 0x00002cff (0x100) IX[B]
>(II) Bus 2 non-prefetchable memory range:
>	[0] -1	0	0xee000000 - 0xee0fffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 3: bridge is at (0:28:1), (0,3,3), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 3 I/O range:
>	[0] -1	0	0x00003000 - 0x000030ff (0x100) IX[B]
>	[1] -1	0	0x00003400 - 0x000034ff (0x100) IX[B]
>	[2] -1	0	0x00003800 - 0x000038ff (0x100) IX[B]
>	[3] -1	0	0x00003c00 - 0x00003cff (0x100) IX[B]
>	[4] -1	0	0x00004000 - 0x000040ff (0x100) IX[B]
>	[5] -1	0	0x00004400 - 0x000044ff (0x100) IX[B]
>	[6] -1	0	0x00004800 - 0x000048ff (0x100) IX[B]
>	[7] -1	0	0x00004c00 - 0x00004cff (0x100) IX[B]
>(II) Bus 3 non-prefetchable memory range:
>	[0] -1	0	0xec000000 - 0xedffffff (0x2000000) MX[B]
>(II) Bus 3 prefetchable memory range:
>	[0] -1	0	0xe4000000 - 0xe40fffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 4: bridge is at (0:28:2), (0,4,11), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 4 I/O range:
>	[0] -1	0	0x00005000 - 0x000050ff (0x100) IX[B]
>	[1] -1	0	0x00005400 - 0x000054ff (0x100) IX[B]
>	[2] -1	0	0x00005800 - 0x000058ff (0x100) IX[B]
>	[3] -1	0	0x00005c00 - 0x00005cff (0x100) IX[B]
>	[4] -1	0	0x00006000 - 0x000060ff (0x100) IX[B]
>	[5] -1	0	0x00006400 - 0x000064ff (0x100) IX[B]
>	[6] -1	0	0x00006800 - 0x000068ff (0x100) IX[B]
>	[7] -1	0	0x00006c00 - 0x00006cff (0x100) IX[B]
>(II) Bus 4 non-prefetchable memory range:
>	[0] -1	0	0xe8000000 - 0xe9ffffff (0x2000000) MX[B]
>(II) Bus 4 prefetchable memory range:
>	[0] -1	0	0xe4100000 - 0xe41fffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 12: bridge is at (0:28:3), (0,12,19), BCTRL: 0x0004 (VGA_EN is cleared)
>(II) Bus 12 I/O range:
>	[0] -1	0	0x00007000 - 0x000070ff (0x100) IX[B]
>	[1] -1	0	0x00007400 - 0x000074ff (0x100) IX[B]
>	[2] -1	0	0x00007800 - 0x000078ff (0x100) IX[B]
>	[3] -1	0	0x00007c00 - 0x00007cff (0x100) IX[B]
>	[4] -1	0	0x00008000 - 0x000080ff (0x100) IX[B]
>	[5] -1	0	0x00008400 - 0x000084ff (0x100) IX[B]
>	[6] -1	0	0x00008800 - 0x000088ff (0x100) IX[B]
>	[7] -1	0	0x00008c00 - 0x00008cff (0x100) IX[B]
>(II) Bus 12 non-prefetchable memory range:
>	[0] -1	0	0xea000000 - 0xebffffff (0x2000000) MX[B]
>(II) Bus 12 prefetchable memory range:
>	[0] -1	0	0xe4200000 - 0xe42fffff (0x100000) MX[B]
>(II) Subtractive PCI-to-PCI bridge:
>(II) Bus 21: bridge is at (0:30:0), (0,21,24), BCTRL: 0x0000 (VGA_EN is cleared)
>(II) Bus 21 I/O range:
>	[0] -1	0	0x00009000 - 0x0000cfff (0x4000) IX[B]
>(II) Bus 21 non-prefetchable memory range:
>	[0] -1	0	0xe4300000 - 0xe7ffffff (0x3d00000) MX[B]
>(II) Bus 21 prefetchable memory range:
>	[0] -1	0	0xe0000000 - 0xe3ffffff (0x4000000) MX[B]
>(II) PCI-to-ISA bridge:
>(II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
>(II) PCI-to-CardBus bridge:
>(II) Bus 22: bridge is at (21:0:0), (21,22,23), BCTRL: 0x05c0 (VGA_EN is cleared)
>(II) Bus 22 I/O range:
>	[0] -1	0	0x00009000 - 0x000090ff (0x100) IX[B]
>	[1] -1	0	0x00009400 - 0x000094ff (0x100) IX[B]
>(II) Bus 22 prefetchable memory range:
>	[0] -1	0	0xe0000000 - 0xe3ffffff (0x4000000) MX[B]
>(--) PCI:*(0:2:0) Intel Corporation Mobile 945GM/GMS/940GML Express Integrated Graphics Controller rev 3, Mem @ 0xee100000/19, 0xd0000000/28, 0xee200000/18, I/O @ 0x1800/3
>(--) PCI: (0:2:1) Intel Corporation Mobile 945GM/GMS/940GML Express Integrated Graphics Controller rev 3, Mem @ 0xee180000/19
>(II) Addressable bus resource ranges are
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>	[1] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) OS-reported resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) Active PCI resource ranges:
>	[0] -1	0	0xedf00000 - 0xedf00fff (0x1000) MX[B]
>	[1] -1	0	0xee000000 - 0xee01ffff (0x20000) MX[B]
>	[2] -1	0	0xee444400 - 0xee4447ff (0x400) MX[B]
>	[3] -1	0	0xee444000 - 0xee4443ff (0x400) MX[B]
>	[4] -1	0	0xee240000 - 0xee243fff (0x4000) MX[B]
>	[5] -1	0	0xee180000 - 0xee1fffff (0x80000) MX[B](B)
>	[6] -1	0	0xee200000 - 0xee23ffff (0x40000) MX[B](B)
>	[7] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[8] -1	0	0xee100000 - 0xee17ffff (0x80000) MX[B](B)
>	[9] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]
>	[10] -1	0	0x000018e0 - 0x000018ff (0x20) IX[B]
>	[11] -1	0	0x000018b0 - 0x000018bf (0x10) IX[B]
>	[12] -1	0	0x000018c0 - 0x000018c3 (0x4) IX[B]
>	[13] -1	0	0x000018c8 - 0x000018cf (0x8) IX[B]
>	[14] -1	0	0x000018c4 - 0x000018c7 (0x4) IX[B]
>	[15] -1	0	0x000018d0 - 0x000018d7 (0x8) IX[B]
>	[16] -1	0	0x00001810 - 0x0000181f (0x10) IX[B]
>	[17] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[18] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[19] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[20] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[21] -1	0	0x00001880 - 0x0000189f (0x20) IX[B]
>	[22] -1	0	0x00001860 - 0x0000187f (0x20) IX[B]
>	[23] -1	0	0x00001840 - 0x0000185f (0x20) IX[B]
>	[24] -1	0	0x00001820 - 0x0000183f (0x20) IX[B]
>	[25] -1	0	0x00001800 - 0x00001807 (0x8) IX[B](B)
>(II) Active PCI resource ranges after removing overlaps:
>	[0] -1	0	0xedf00000 - 0xedf00fff (0x1000) MX[B]
>	[1] -1	0	0xee000000 - 0xee01ffff (0x20000) MX[B]
>	[2] -1	0	0xee444400 - 0xee4447ff (0x400) MX[B]
>	[3] -1	0	0xee444000 - 0xee4443ff (0x400) MX[B]
>	[4] -1	0	0xee240000 - 0xee243fff (0x4000) MX[B]
>	[5] -1	0	0xee180000 - 0xee1fffff (0x80000) MX[B](B)
>	[6] -1	0	0xee200000 - 0xee23ffff (0x40000) MX[B](B)
>	[7] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[8] -1	0	0xee100000 - 0xee17ffff (0x80000) MX[B](B)
>	[9] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]
>	[10] -1	0	0x000018e0 - 0x000018ff (0x20) IX[B]
>	[11] -1	0	0x000018b0 - 0x000018bf (0x10) IX[B]
>	[12] -1	0	0x000018c0 - 0x000018c3 (0x4) IX[B]
>	[13] -1	0	0x000018c8 - 0x000018cf (0x8) IX[B]
>	[14] -1	0	0x000018c4 - 0x000018c7 (0x4) IX[B]
>	[15] -1	0	0x000018d0 - 0x000018d7 (0x8) IX[B]
>	[16] -1	0	0x00001810 - 0x0000181f (0x10) IX[B]
>	[17] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[18] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[19] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[20] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[21] -1	0	0x00001880 - 0x0000189f (0x20) IX[B]
>	[22] -1	0	0x00001860 - 0x0000187f (0x20) IX[B]
>	[23] -1	0	0x00001840 - 0x0000185f (0x20) IX[B]
>	[24] -1	0	0x00001820 - 0x0000183f (0x20) IX[B]
>	[25] -1	0	0x00001800 - 0x00001807 (0x8) IX[B](B)
>(II) OS-reported resource ranges after removing overlaps with PCI:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) All system resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xedf00000 - 0xedf00fff (0x1000) MX[B]
>	[5] -1	0	0xee000000 - 0xee01ffff (0x20000) MX[B]
>	[6] -1	0	0xee444400 - 0xee4447ff (0x400) MX[B]
>	[7] -1	0	0xee444000 - 0xee4443ff (0x400) MX[B]
>	[8] -1	0	0xee240000 - 0xee243fff (0x4000) MX[B]
>	[9] -1	0	0xee180000 - 0xee1fffff (0x80000) MX[B](B)
>	[10] -1	0	0xee200000 - 0xee23ffff (0x40000) MX[B](B)
>	[11] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xee100000 - 0xee17ffff (0x80000) MX[B](B)
>	[13] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[14] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[15] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]
>	[16] -1	0	0x000018e0 - 0x000018ff (0x20) IX[B]
>	[17] -1	0	0x000018b0 - 0x000018bf (0x10) IX[B]
>	[18] -1	0	0x000018c0 - 0x000018c3 (0x4) IX[B]
>	[19] -1	0	0x000018c8 - 0x000018cf (0x8) IX[B]
>	[20] -1	0	0x000018c4 - 0x000018c7 (0x4) IX[B]
>	[21] -1	0	0x000018d0 - 0x000018d7 (0x8) IX[B]
>	[22] -1	0	0x00001810 - 0x0000181f (0x10) IX[B]
>	[23] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[24] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[25] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[26] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[27] -1	0	0x00001880 - 0x0000189f (0x20) IX[B]
>	[28] -1	0	0x00001860 - 0x0000187f (0x20) IX[B]
>	[29] -1	0	0x00001840 - 0x0000185f (0x20) IX[B]
>	[30] -1	0	0x00001820 - 0x0000183f (0x20) IX[B]
>	[31] -1	0	0x00001800 - 0x00001807 (0x8) IX[B](B)
>(II) LoadModule: "i2c"(II) Module alread ybuilt-in(II) LoadModule: "ddc"(II) Module alread ybuilt-in(II) LoadModule: "dri"
>(II) Loading /usr/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.2.99.903, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "extmod"
>(II) Loading /usr/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.2.99.903, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "freetype"
>(II) Loading /usr/lib/xorg/modules//fonts/libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 1.2.99.903, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font FreeType
>(II) LoadModule: "glx"
>(II) Loading /usr/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.2.99.903, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(==) AIGLX enabled
>(II) Loading extension GLX
>(II) LoadModule: "int10"
>(II) Loading /usr/lib/xorg/modules//libint10.so
>(II) Module int10: vendor="X.Org Foundation"
>	compiled for 1.2.99.903, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) LoadModule: "type1"
>(II) Loading /usr/lib/xorg/modules//fonts/libtype1.so
>(II) Module type1: vendor="X.Org Foundation"
>	compiled for 1.2.99.903, module version = 1.0.2
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font Type1
>(II) LoadModule: "vbe"
>(II) Loading /usr/lib/xorg/modules//libvbe.so
>(II) Module vbe: vendor="X.Org Foundation"
>	compiled for 1.2.99.903, module version = 1.1.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) LoadModule: "i810"
>(II) Loading /usr/lib/xorg/modules/drivers//i810_drv.so
>(II) Module i810: vendor="X.Org Foundation"
>	compiled for 1.2.99.903, module version = 13.93.93
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 1.2
>(II) LoadModule: "kbd"
>(II) Loading /usr/lib/xorg/modules/input//kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 7.1.1, module version = 1.1.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 0.6
>(II) LoadModule: "mouse"
>(II) Loading /usr/lib/xorg/modules/input//mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 7.1.1, module version = 1.1.1
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 0.6
>(II) LoadModule: "synaptics"
>(II) Loading /usr/lib/xorg/modules/input//synaptics_drv.so
>(II) Module synaptics: vendor="The XFree86 Project"
>	compiled for 4.2.0, module version = 1.0.0
>	Module class: XFree86 XInput Driver
>	ABI class: XFree86 XInput driver, version 0.3
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 965G, 965G, 965Q, 946GZ
>(II) Primary Device is: PCI 00:02:0
>(--) Assigning device section with no busID to primary device
>(WW) intel: No matching Device section for instance (BusID PCI:0:2:1) found
>(--) Chipset 945GM found
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xedf00000 - 0xedf00fff (0x1000) MX[B]
>	[5] -1	0	0xee000000 - 0xee01ffff (0x20000) MX[B]
>	[6] -1	0	0xee444400 - 0xee4447ff (0x400) MX[B]
>	[7] -1	0	0xee444000 - 0xee4443ff (0x400) MX[B]
>	[8] -1	0	0xee240000 - 0xee243fff (0x4000) MX[B]
>	[9] -1	0	0xee180000 - 0xee1fffff (0x80000) MX[B](B)
>	[10] -1	0	0xee200000 - 0xee23ffff (0x40000) MX[B](B)
>	[11] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xee100000 - 0xee17ffff (0x80000) MX[B](B)
>	[13] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[14] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[15] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]
>	[16] -1	0	0x000018e0 - 0x000018ff (0x20) IX[B]
>	[17] -1	0	0x000018b0 - 0x000018bf (0x10) IX[B]
>	[18] -1	0	0x000018c0 - 0x000018c3 (0x4) IX[B]
>	[19] -1	0	0x000018c8 - 0x000018cf (0x8) IX[B]
>	[20] -1	0	0x000018c4 - 0x000018c7 (0x4) IX[B]
>	[21] -1	0	0x000018d0 - 0x000018d7 (0x8) IX[B]
>	[22] -1	0	0x00001810 - 0x0000181f (0x10) IX[B]
>	[23] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[24] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[25] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[26] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[27] -1	0	0x00001880 - 0x0000189f (0x20) IX[B]
>	[28] -1	0	0x00001860 - 0x0000187f (0x20) IX[B]
>	[29] -1	0	0x00001840 - 0x0000185f (0x20) IX[B]
>	[30] -1	0	0x00001820 - 0x0000183f (0x20) IX[B]
>	[31] -1	0	0x00001800 - 0x00001807 (0x8) IX[B](B)
>(II) resource ranges after probing:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xedf00000 - 0xedf00fff (0x1000) MX[B]
>	[5] -1	0	0xee000000 - 0xee01ffff (0x20000) MX[B]
>	[6] -1	0	0xee444400 - 0xee4447ff (0x400) MX[B]
>	[7] -1	0	0xee444000 - 0xee4443ff (0x400) MX[B]
>	[8] -1	0	0xee240000 - 0xee243fff (0x4000) MX[B]
>	[9] -1	0	0xee180000 - 0xee1fffff (0x80000) MX[B](B)
>	[10] -1	0	0xee200000 - 0xee23ffff (0x40000) MX[B](B)
>	[11] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xee100000 - 0xee17ffff (0x80000) MX[B](B)
>	[13] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[14] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[15] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[16] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[17] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[18] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]
>	[19] -1	0	0x000018e0 - 0x000018ff (0x20) IX[B]
>	[20] -1	0	0x000018b0 - 0x000018bf (0x10) IX[B]
>	[21] -1	0	0x000018c0 - 0x000018c3 (0x4) IX[B]
>	[22] -1	0	0x000018c8 - 0x000018cf (0x8) IX[B]
>	[23] -1	0	0x000018c4 - 0x000018c7 (0x4) IX[B]
>	[24] -1	0	0x000018d0 - 0x000018d7 (0x8) IX[B]
>	[25] -1	0	0x00001810 - 0x0000181f (0x10) IX[B]
>	[26] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[27] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[28] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[29] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[30] -1	0	0x00001880 - 0x0000189f (0x20) IX[B]
>	[31] -1	0	0x00001860 - 0x0000187f (0x20) IX[B]
>	[32] -1	0	0x00001840 - 0x0000185f (0x20) IX[B]
>	[33] -1	0	0x00001820 - 0x0000183f (0x20) IX[B]
>	[34] -1	0	0x00001800 - 0x00001807 (0x8) IX[B](B)
>	[35] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[36] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Setting vga for screen 0.
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Reloading /usr/lib/xorg/modules//libint10.so
>(II) Loading sub module "vbe"
>(II) LoadModule: "vbe"
>(II) Reloading /usr/lib/xorg/modules//libvbe.so
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /usr/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.2.99.903, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 1.2
>(**) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(II) intel(0): Integrated Graphics Chipset: Intel(R) 945GM
>(--) intel(0): Chipset: "945GM"
>(--) intel(0): Linear framebuffer at 0xD0000000
>(--) intel(0): IO registers at addr 0xEE100000
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00480004 (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000015
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000
>(II) intel(0):                 DVOB: 0x00480004
>(II) intel(0):                 DVOC: 0x00480000
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x80002668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x49000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):                 FPB0: 0x00030e09 (n = 3, m1 = 14, m2 = 9)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026003 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x22c4008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 91000 n 3 m1 14 m2 9 p1 2 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(==) intel(0): Using XAA for acceleration
>(--) intel(0): Will try to allocate texture pool for old Mesa 3D driver.
>(II) intel(0): Will try to reserve 32768 kiB of AGP aperture space
>	for the DRM memory manager.
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"(II) Module alread ybuilt-in(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"(II) Module alread ybuilt-in(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): I2C bus "LVDSDDC_C" initialized.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" removed.
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: LEN  Model: 4020  Serial#: 0
>(II) intel(0): Year: 2005  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max H-Image Size [cm]: horiz.: 29  vert.: 21
>(II) intel(0): Gamma: 2.20
>(II) intel(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.590 redY: 0.342   greenX: 0.319 greenY: 0.540
>(II) intel(0): blueX: 0.152 blueY: 0.137   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Supported VESA Video Modes:
>(II) intel(0): 640x480@60Hz
>(II) intel(0): 800x600@60Hz
>(II) intel(0): 1024x768@60Hz
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 65.0 MHz   Image Size:  286 x 214 mm
>(II) intel(0): h_active: 1024  h_sync: 1048  h_sync_end 1184 h_blank_end 1344 h_border: 0
>(II) intel(0): v_active: 768  v_sync: 771  v_sync_end 777 v_blanking: 806 v_border: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 54.2 MHz   Image Size:  286 x 214 mm
>(II) intel(0): h_active: 1024  h_sync: 1048  h_sync_end 1184 h_blank_end 1344 h_border: 0
>(II) intel(0): v_active: 768  v_sync: 771  v_sync_end 777 v_blanking: 806 v_border: 0
>(II) intel(0):  LTN141XA-L01
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0030ae204000000000
>(II) intel(0): 	000f0103801d1578ea2d059757518a27
>(II) intel(0): 	23505421080001010101010101010101
>(II) intel(0): 	01010101010164190040410026301888
>(II) intel(0): 	36001ed6100000192815004041002630
>(II) intel(0): 	188836001ed6100000190000000f0061
>(II) intel(0): 	43326143280f01004ca35841000000fe
>(II) intel(0): 	004c544e31343158412d4c30310a00e9
>(II) intel(0): EDID vendor "LEN", prod id 16416
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Reloading /usr/lib/xorg/modules//libint10.so
>(II) intel(0): initializing int10
>(WW) intel(0): Bad V_BIOS checksum
>(II) intel(0): Primary V_BIOS segment is: 0xc000
>(II) intel(0): VESA BIOS detected
>(II) intel(0): VESA VBE Version 3.0
>(II) intel(0): VESA VBE Total Mem: 7872 kB
>(II) intel(0): VESA VBE OEM: Intel(r) 82945GM Chipset Family Graphics Chip Accelerated VGA BIOS
>(II) intel(0): VESA VBE OEM Software Rev: 1.0
>(II) intel(0): VESA VBE OEM Vendor: Intel Corporation
>(II) intel(0): VESA VBE OEM Product: Intel(r) 82945GM Chipset Family Graphics Controller
>(II) intel(0): VESA VBE OEM Product Rev: Hardware Version 0.0
>(II) intel(0): Found panel mode in BIOS VBT tables:
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 (48.4 kHz)
>(WW) intel(0): BIOS panel mode data doesn't match probed data, continuing with probed.
>(II) intel(0): BIOS mode:
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 (48.4 kHz)
>(II) intel(0): probed mode:
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70.
>(II) intel(0): I2C bus "SDVOB DDC Bus" initialized.
>(II) intel(0): SDVO: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
>(II) intel(0): SDVO: R: 02 3C 06 01 01 01 01 00 (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
>(II) intel(0): SDVO: R: C4 09 20 4E             (Success)
>(II) intel(0): SDVO device VID/DID: 02:3C.06, clock range 25.0MHz - 200.0MHz, input 1: Y, input 2: N, output 1: Y, output 2: N
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at address 0x72.
>(II) intel(0): No SDVO device found on SDVOC
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" removed.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" removed.
>(II) intel(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): Current clock rate multiplier: 1
>(II) intel(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R: 00 00                   (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: 64 19 00 40 41 00 26 30 (Success)
>(II) intel(0): SDVO: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 18 88 36 00 18 00 00 00 (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: 64 19 00 40 41 00 26 30 (Success)
>(II) intel(0): SDVO: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 18 88 36 00 18 00 00 00 (Success)
>(II) intel(0): EDID for output VGA
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" removed.
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: LEN  Model: 4020  Serial#: 0
>(II) intel(0): Year: 2005  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max H-Image Size [cm]: horiz.: 29  vert.: 21
>(II) intel(0): Gamma: 2.20
>(II) intel(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.590 redY: 0.342   greenX: 0.319 greenY: 0.540
>(II) intel(0): blueX: 0.152 blueY: 0.137   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Supported VESA Video Modes:
>(II) intel(0): 640x480@60Hz
>(II) intel(0): 800x600@60Hz
>(II) intel(0): 1024x768@60Hz
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 65.0 MHz   Image Size:  286 x 214 mm
>(II) intel(0): h_active: 1024  h_sync: 1048  h_sync_end 1184 h_blank_end 1344 h_border: 0
>(II) intel(0): v_active: 768  v_sync: 771  v_sync_end 777 v_blanking: 806 v_border: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 54.2 MHz   Image Size:  286 x 214 mm
>(II) intel(0): h_active: 1024  h_sync: 1048  h_sync_end 1184 h_blank_end 1344 h_border: 0
>(II) intel(0): v_active: 768  v_sync: 771  v_sync_end 777 v_blanking: 806 v_border: 0
>(II) intel(0):  LTN141XA-L01
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0030ae204000000000
>(II) intel(0): 	000f0103801d1578ea2d059757518a27
>(II) intel(0): 	23505421080001010101010101010101
>(II) intel(0): 	01010101010164190040410026301888
>(II) intel(0): 	36001ed6100000192815004041002630
>(II) intel(0): 	188836001ed6100000190000000f0061
>(II) intel(0): 	43326143280f01004ca35841000000fe
>(II) intel(0): 	004c544e31343158412d4c30310a00e9
>(II) intel(0): EDID vendor "LEN", prod id 16416
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x960" (hsync out of range)
>(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (hsync out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (hsync out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1792x1344" (hsync out of range)
>(II) intel(0): Not using default mode "1792x1344" (vrefresh out of range)
>(II) intel(0): Not using default mode "1856x1392" (hsync out of range)
>(II) intel(0): Not using default mode "1856x1392" (vrefresh out of range)
>(II) intel(0): Not using default mode "1920x1440" (hsync out of range)
>(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
>(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x800" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (hsync out of range)
>(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
>(II) intel(0): Not using default mode "1440x900" (hsync out of range)
>(II) intel(0): Not using default mode "1600x1024" (hsync out of range)
>(II) intel(0): Not using default mode "1680x1050" (hsync out of range)
>(II) intel(0): Not using default mode "1920x1200" (hsync out of range)
>(II) intel(0): Not using default mode "1920x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
>(II) intel(0): Not using default mode "2048x1536" (hsync out of range)
>(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
>(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1024x768"x50.0   54.16  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (40.3 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): SDVO: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVO: R: 00 00                   (Success)
>(II) intel(0): EDID for output TMDS-1
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>chosen: dotclock 107520 vco 2150400 ((m 112, m1 19, m2 5), n 3, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): EDID for output TV
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Monitoring connected displays enabled
>(II) intel(0): detected 256 kB GTT.
>(II) intel(0): detected 7932 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): Will not try to enable page flipping
>(==) intel(0): Triple buffering disabled
>(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
>(++) intel(0): DPI set to (100, 100)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /usr/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.2.99.903, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.3
>(II) Loading sub module "xaa"
>(II) LoadModule: "xaa"
>(II) Loading /usr/lib/xorg/modules//libxaa.so
>(II) Module xaa: vendor="X.Org Foundation"
>	compiled for 1.2.99.903, module version = 1.2.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"(II) Module alread ybuilt-in(II) intel(0): Comparing regs from server start up to After PreInit
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] 0	0	0xee200000 - 0xee23ffff (0x40000) MS[B]
>	[1] 0	0	0xd0000000 - 0xdfffffff (0x10000000) MS[B]
>	[2] 0	0	0xee100000 - 0xee17ffff (0x80000) MS[B]
>	[3] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[4] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[5] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[6] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[7] -1	0	0xedf00000 - 0xedf00fff (0x1000) MX[B]
>	[8] -1	0	0xee000000 - 0xee01ffff (0x20000) MX[B]
>	[9] -1	0	0xee444400 - 0xee4447ff (0x400) MX[B]
>	[10] -1	0	0xee444000 - 0xee4443ff (0x400) MX[B]
>	[11] -1	0	0xee240000 - 0xee243fff (0x4000) MX[B]
>	[12] -1	0	0xee180000 - 0xee1fffff (0x80000) MX[B](B)
>	[13] -1	0	0xee200000 - 0xee23ffff (0x40000) MX[B](B)
>	[14] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[15] -1	0	0xee100000 - 0xee17ffff (0x80000) MX[B](B)
>	[16] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[17] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[18] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[19] 0	0	0x00001800 - 0x00001807 (0x8) IS[B]
>	[20] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[21] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[22] -1	0	0x00002000 - 0x0000201f (0x20) IX[B]
>	[23] -1	0	0x000018e0 - 0x000018ff (0x20) IX[B]
>	[24] -1	0	0x000018b0 - 0x000018bf (0x10) IX[B]
>	[25] -1	0	0x000018c0 - 0x000018c3 (0x4) IX[B]
>	[26] -1	0	0x000018c8 - 0x000018cf (0x8) IX[B]
>	[27] -1	0	0x000018c4 - 0x000018c7 (0x4) IX[B]
>	[28] -1	0	0x000018d0 - 0x000018d7 (0x8) IX[B]
>	[29] -1	0	0x00001810 - 0x0000181f (0x10) IX[B]
>	[30] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[31] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[32] -1	0	0x000003f4 - 0x000003f4 (0x1) IX[B]
>	[33] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[34] -1	0	0x00001880 - 0x0000189f (0x20) IX[B]
>	[35] -1	0	0x00001860 - 0x0000187f (0x20) IX[B]
>	[36] -1	0	0x00001840 - 0x0000185f (0x20) IX[B]
>	[37] -1	0	0x00001820 - 0x0000183f (0x20) IX[B]
>	[38] -1	0	0x00001800 - 0x00001807 (0x8) IX[B](B)
>	[39] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[40] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 363776 total, 1 used
>(II) intel(0): I830CheckAvailableMemory: 1455100 kB available
>(==) intel(0): VideoRam: 262144 KB
>(II) intel(0): Attempting memory allocation with tiled buffers and 
>	       large DRI memory manager reservation:
>(WW) intel(0): xf86AllocateGARTMemory: allocation of 10 pages failed
>	(Cannot allocate memory)
>(II) intel(0): Allocating 5112 scanlines for pixmap cache
>(II) intel(0): Success.
>(II) intel(0): Memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x00027fff: logical 3D context (32 kB)
>(II) intel(0): 0x00028000-0x00037fff: xaa scratch (64 kB)
>(II) intel(0): 0x007bf000:            end of stolen memory
>(II) intel(0): 0x007bf000-0x007bffff: Core cursor (4 kB, 0x2576e000 physical)
>(II) intel(0): 0x007c0000-0x007c3fff: ARGB cursor (16 kB, 0x20d7c000 physical)
>(II) intel(0): 0x007c4000-0x007c4fff: Core cursor (4 kB, 0x20cd1000 physical)
>(II) intel(0): 0x007c5000-0x007c8fff: ARGB cursor (16 kB, 0x20ff4000 physical)
>(II) intel(0): 0x007c9000-0x007c9fff: overlay registers (4 kB, 0x229da000 physical)
>(II) intel(0): 0x007d0000-0x01fc7fff: front buffer (24544 kB)
>(II) intel(0): 0x02000000-0x023fffff: back buffer (4096 kB)
>(II) intel(0): 0x02400000-0x027fffff: depth buffer (4096 kB)
>(II) intel(0): 0x02800000-0x047fffff: DRI memory manager (32768 kB)
>(II) intel(0): 0x04800000-0x067fffff: textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): front buffer is not tiled
>(II) intel(0): back buffer is tiled
>(II) intel(0): depth buffer is tiled
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 8, (OK)
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 8, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 8, (OK)
>drmOpenByBusid: drmOpenMinor returns 8
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) intel(0): [drm] DRM interface version 1.3
>(II) intel(0): [drm] created "i915" driver at busid "pci:0000:00:02.0"
>(II) intel(0): [drm] added 8192 byte SAREA at 0xf91e9000
>(II) intel(0): [drm] mapped SAREA 0xf91e9000 to 0xb7faa000
>(II) intel(0): [drm] framebuffer handle = 0xd07d0000
>(II) intel(0): [drm] added 1 reserved context for kernel
>(WW) intel(0): DRM version 1.6 older than required 1.7 for DRM memory manager.  Disabling.
>(II) intel(0): [drm] Registers = 0xee100000
>(II) intel(0): [drm] ring buffer = 0xd0000000
>(II) intel(0): [drm] init sarea width,height = 1024 x 1024 (pitch 1024)
>(II) intel(0): [drm] Mapping front buffer
>(II) intel(0): [drm] Front Buffer = 0x2a0fa000
>(II) intel(0): [drm] Back Buffer = 0xd2000000
>(II) intel(0): [drm] Depth Buffer = 0xd2400000
>(II) intel(0): [drm] textures = 0xd4800000
>(II) intel(0): [drm] Initialized kernel agp heap manager, 33554432
>(II) intel(0): [dri] visual configs initialized
>(II) intel(0): Page Flipping disabled
>(==) intel(0): Write-combining range (0xd0000000,0x10000000)
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(**) intel(0): Option "XaaNoOffscreenPixmaps"
>(II) intel(0): Using XFree86 Acceleration Architecture (XAA)
>	Screen to screen bit blits
>	Solid filled rectangles
>	8x8 mono pattern filled rectangles
>	Indirect CPU to Screen color expansion
>	Solid Horizontal and Vertical Lines
>	Setting up tile and stipple cache:
>		32 128x128 slots
>		26 256x256 slots
>		11 512x512 slots
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): SDVO: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R: 01                      (Success)
>(II) intel(0): Current clock rate multiplier: 1
>(II) intel(0): SDVO: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R: 00 00                   (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: 64 19 00 40 41 00 26 30 (Success)
>(II) intel(0): SDVO: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 18 88 36 00 18 00 00 00 (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R: 64 19 00 40 41 00 26 30 (Success)
>(II) intel(0): SDVO: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R: 18 88 36 00 18 00 00 00 (Success)
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x007bf000 (pgoffset 1983)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x007c0000 (pgoffset 1984)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x007c4000 (pgoffset 1988)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x007c5000 (pgoffset 1989)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x007c9000 (pgoffset 1993)
>(II) intel(0): xf86BindGARTMemory: bind key 5 at 0x007d0000 (pgoffset 2000)
>(II) intel(0): xf86BindGARTMemory: bind key 6 at 0x02000000 (pgoffset 8192)
>(II) intel(0): xf86BindGARTMemory: bind key 7 at 0x02400000 (pgoffset 9216)
>(II) intel(0): xf86BindGARTMemory: bind key 8 at 0x04800000 (pgoffset 18432)
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>chosen: dotclock 65142 vco 1824000 ((m 95, m1 15, m2 8), n 3, (p 28, p1 2, p2 14))
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00480004 (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000015
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000
>(II) intel(0):                 DVOB: 0x00480004
>(II) intel(0):                 DVOC: 0x00480000
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0x80000668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000000 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x02ff03ff (1024, 768)
>(II) intel(0):             DSPBBASE: 0x007d0000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x03ff02ff (1024, 768)
>(II) intel(0):                 FPB0: 0x00030f08 (n = 3, m1 = 15, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98020000 (enabled, non-dvo, default clock, LVDS mode, p1 = 2, p2 = 14, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x0e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x00
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 91200 n 3 m1 15 m2 8 p1 2 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0):   Output TMDS-1 is connected to pipe none
>(II) intel(0):   Output TV is connected to pipe none
>(**) Option "dpms"
>(**) intel(0): DPMS enabled
>(II) intel(0): Set up textured video
>(II) intel(0): Set up overlay video
>(II) intel(0): X context handle = 0x1
>(II) intel(0): [drm] installed DRM signal handler
>(II) intel(0): [DRI] installation complete
>(II) intel(0): [drm] dma control initialized, using IRQ 20
>(II) intel(0): direct rendering: Enabled
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(WW) intel(0): Option "MonitorLayout" is not used
>(WW) intel(0): Option "DevicePresence" is not used
>(--) RandR disabled
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-APPGROUP
>(II) Initializing built-in extension XAccessControlExtension
>(II) Initializing built-in extension SECURITY
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension XFree86-Bigfont
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) Initializing built-in extension XEVIE
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 9, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 9, (OK)
>drmOpenByBusid: drmOpenMinor returns 9
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(WW) AIGLX: 3D driver claims to not support visual 0x23
>(WW) AIGLX: 3D driver claims to not support visual 0x24
>(WW) AIGLX: 3D driver claims to not support visual 0x25
>(WW) AIGLX: 3D driver claims to not support visual 0x26
>(WW) AIGLX: 3D driver claims to not support visual 0x27
>(WW) AIGLX: 3D driver claims to not support visual 0x28
>(WW) AIGLX: 3D driver claims to not support visual 0x29
>(WW) AIGLX: 3D driver claims to not support visual 0x2a
>(WW) AIGLX: 3D driver claims to not support visual 0x2b
>(WW) AIGLX: 3D driver claims to not support visual 0x2c
>(WW) AIGLX: 3D driver claims to not support visual 0x2d
>(WW) AIGLX: 3D driver claims to not support visual 0x2e
>(WW) AIGLX: 3D driver claims to not support visual 0x2f
>(WW) AIGLX: 3D driver claims to not support visual 0x30
>(WW) AIGLX: 3D driver claims to not support visual 0x31
>(WW) AIGLX: 3D driver claims to not support visual 0x32
>(II) AIGLX: Loaded and initialized /usr/lib/dri/i915_dri.so
>(II) GLX: Initialized DRI GL provider for screen 0
>(II) intel(0): Setting screen physical size to 260 x 195
>(**) Option "CoreKeyboard"
>(**) Generic Keyboard: Core Keyboard
>(**) Option "Protocol" "standard"
>(**) Generic Keyboard: Protocol: standard
>(**) Option "AutoRepeat" "500 30"
>(**) Option "XkbRules" "xorg"
>(**) Generic Keyboard: XkbRules: "xorg"
>(**) Option "XkbModel" "pc105"
>(**) Generic Keyboard: XkbModel: "pc105"
>(**) Option "XkbLayout" "ee"
>(**) Generic Keyboard: XkbLayout: "ee"
>(**) Option "CustomKeycodes" "off"
>(**) Generic Keyboard: CustomKeycodes disabled
>(**) Option "Protocol" "ExplorerPS/2"
>(**) Configured Mouse: Device: "/dev/input/mice"
>(**) Configured Mouse: Protocol: "ExplorerPS/2"
>(**) Option "CorePointer"
>(**) Configured Mouse: Core Pointer
>(**) Option "Device" "/dev/input/mice"
>(**) Option "Emulate3Buttons" "true"
>(**) Configured Mouse: Emulate3Buttons, Emulate3Timeout: 50
>(**) Configured Mouse: ZAxisMapping: buttons 4 and 5
>(**) Configured Mouse: Buttons: 9
>(II) Synaptics touchpad driver version 0.14.6 (1406)
>(--) Synaptics Touchpad auto-dev sets device to /dev/input/event3
>(**) Option "Device" "/dev/input/event3"
>(**) Option "SHMConfig" "on"
>(**) Option "HorizScrollDelta" "0"
>(--) Synaptics Touchpad touchpad found
>(**) Option "SendCoreEvents" "true"
>(**) Synaptics Touchpad: always reports core events
>(II) XINPUT: Adding extended input device "Synaptics Touchpad" (type: MOUSE)
>(II) XINPUT: Adding extended input device "Configured Mouse" (type: MOUSE)
>(II) XINPUT: Adding extended input device "Generic Keyboard" (type: KEYBOARD)
>Synaptics DeviceInit called
>SynapticsCtrl called.
>(II) Configured Mouse: ps2EnableDataReporting: succeeded
>Synaptics DeviceOn called
>(--) Synaptics Touchpad auto-dev sets device to /dev/input/event3
>(**) Option "Device" "/dev/input/event3"
>(--) Synaptics Touchpad touchpad found
>ProcXCloseDevice to close or not ?
>(II) intel(0): EDID for output VGA
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" removed.
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: LEN  Model: 4020  Serial#: 0
>(II) intel(0): Year: 2005  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max H-Image Size [cm]: horiz.: 29  vert.: 21
>(II) intel(0): Gamma: 2.20
>(II) intel(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.590 redY: 0.342   greenX: 0.319 greenY: 0.540
>(II) intel(0): blueX: 0.152 blueY: 0.137   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Supported VESA Video Modes:
>(II) intel(0): 640x480@60Hz
>(II) intel(0): 800x600@60Hz
>(II) intel(0): 1024x768@60Hz
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 65.0 MHz   Image Size:  286 x 214 mm
>(II) intel(0): h_active: 1024  h_sync: 1048  h_sync_end 1184 h_blank_end 1344 h_border: 0
>(II) intel(0): v_active: 768  v_sync: 771  v_sync_end 777 v_blanking: 806 v_border: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 54.2 MHz   Image Size:  286 x 214 mm
>(II) intel(0): h_active: 1024  h_sync: 1048  h_sync_end 1184 h_blank_end 1344 h_border: 0
>(II) intel(0): v_active: 768  v_sync: 771  v_sync_end 777 v_blanking: 806 v_border: 0
>(II) intel(0):  LTN141XA-L01
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0030ae204000000000
>(II) intel(0): 	000f0103801d1578ea2d059757518a27
>(II) intel(0): 	23505421080001010101010101010101
>(II) intel(0): 	01010101010164190040410026301888
>(II) intel(0): 	36001ed6100000192815004041002630
>(II) intel(0): 	188836001ed6100000190000000f0061
>(II) intel(0): 	43326143280f01004ca35841000000fe
>(II) intel(0): 	004c544e31343158412d4c30310a00e9
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "800x600"   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync
>(II) intel(0): Modeline "640x480"   25.20  640 656 752 800  480 490 492 525 -hsync -vsync
>(II) intel(0): Modeline "1024x768"   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync
>(II) intel(0): Modeline "1024x768"   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync
>(II) intel(0): Modeline "1024x768"   54.16  1024 1048 1184 1344  768 771 777 806 -hsync -vsync
>(II) intel(0): EDID vendor "LEN", prod id 16416
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x864" (width too large for virtual size)
>(II) intel(0): Not using default mode "1280x960" (width too large for virtual size)
>(II) intel(0): Not using default mode "1280x960" (width too large for virtual size)
>(II) intel(0): Not using default mode "1280x1024" (width too large for virtual size)
>(II) intel(0): Not using default mode "1280x1024" (width too large for virtual size)
>(II) intel(0): Not using default mode "1280x1024" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x768" (width too large for virtual size)
>(II) intel(0): Not using default mode "1280x800" (width too large for virtual size)
>(II) intel(0): Not using default mode "1152x768" (width too large for virtual size)
>(II) intel(0): Not using default mode "1152x864" (width too large for virtual size)
>(II) intel(0): Not using default mode "1400x1050" (height too large for virtual size)
>(II) intel(0): Not using default mode "1400x1050" (height too large for virtual size)
>(II) intel(0): Not using default mode "1400x1050" (height too large for virtual size)
>(II) intel(0): Not using default mode "1400x1050" (height too large for virtual size)
>(II) intel(0): Not using default mode "1440x900" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1024" (width too large for virtual size)
>(II) intel(0): Not using default mode "1680x1050" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1200" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1200" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1024x768"x50.0   54.16  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (40.3 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): SDVO: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVO: R: 00 00                   (Success)
>(II) intel(0): EDID for output TMDS-1
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>chosen: dotclock 107520 vco 2150400 ((m 112, m1 19, m2 5), n 3, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): EDID for output TV
>Synaptics DeviceOff called
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00480004 (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000015
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000
>(II) intel(0):                 DVOB: 0x00480004
>(II) intel(0):                 DVOC: 0x00480000
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x80002668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x49000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):                 FPB0: 0x00030e09 (n = 3, m1 = 14, m2 = 9)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026003 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x22c4008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0xe8
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x00
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 91000 n 3 m1 14 m2 9 p1 2 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) intel(0): xf86UnbindGARTMemory: unbind key 5
>(II) intel(0): xf86UnbindGARTMemory: unbind key 6
>(II) intel(0): xf86UnbindGARTMemory: unbind key 7
>(II) intel(0): xf86UnbindGARTMemory: unbind key 8
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x007bf000 (pgoffset 1983)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x007c0000 (pgoffset 1984)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x007c4000 (pgoffset 1988)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x007c5000 (pgoffset 1989)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x007c9000 (pgoffset 1993)
>(II) intel(0): xf86BindGARTMemory: bind key 5 at 0x007d0000 (pgoffset 2000)
>(II) intel(0): xf86BindGARTMemory: bind key 6 at 0x02000000 (pgoffset 8192)
>(II) intel(0): xf86BindGARTMemory: bind key 7 at 0x02400000 (pgoffset 9216)
>(II) intel(0): xf86BindGARTMemory: bind key 8 at 0x04800000 (pgoffset 18432)
>(WW) intel(0): PRB0_HEAD (0x00000000) and PRB0_TAIL (0x0001b898) indicate ring buffer not flushed
>(WW) intel(0): Existing errors found in hardware state.
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>chosen: dotclock 65142 vco 1824000 ((m 95, m1 15, m2 8), n 3, (p 28, p1 2, p2 14))
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00480004 (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000015
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000
>(II) intel(0):                 DVOB: 0x00480004
>(II) intel(0):                 DVOC: 0x00480000
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0x80000668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000000 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x02ff03ff (1024, 768)
>(II) intel(0):             DSPBBASE: 0x007d0000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x03ff02ff (1024, 768)
>(II) intel(0):                 FPB0: 0x00030f08 (n = 3, m1 = 15, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98020000 (enabled, non-dvo, default clock, LVDS mode, p1 = 2, p2 = 14, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 91200 n 3 m1 15 m2 8 p1 2 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0):   Output TMDS-1 is connected to pipe none
>(II) intel(0):   Output TV is connected to pipe none
>(II) intel(0): [drm] dma control initialized, using IRQ 20
>Synaptics DeviceOn called
>(--) Synaptics Touchpad auto-dev sets device to /dev/input/event3
>(**) Option "Device" "/dev/input/event3"
>(--) Synaptics Touchpad touchpad found
>(II) Configured Mouse: ps2EnableDataReporting: succeeded
>Synaptics DeviceOff called
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00480004 (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000015
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000
>(II) intel(0):                 DVOB: 0x00480004
>(II) intel(0):                 DVOC: 0x00480000
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x80002668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x49000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):                 FPB0: 0x00030e09 (n = 3, m1 = 14, m2 = 9)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026003 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x22c4008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0xe8
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 91000 n 3 m1 14 m2 9 p1 2 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) intel(0): xf86UnbindGARTMemory: unbind key 5
>(II) intel(0): xf86UnbindGARTMemory: unbind key 6
>(II) intel(0): xf86UnbindGARTMemory: unbind key 7
>(II) intel(0): xf86UnbindGARTMemory: unbind key 8
>Synaptics DeviceOn called
>(--) Synaptics Touchpad auto-dev sets device to /dev/input/event3
>(**) Option "Device" "/dev/input/event3"
>(--) Synaptics Touchpad touchpad found
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x007bf000 (pgoffset 1983)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x007c0000 (pgoffset 1984)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x007c4000 (pgoffset 1988)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x007c5000 (pgoffset 1989)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x007c9000 (pgoffset 1993)
>(II) intel(0): xf86BindGARTMemory: bind key 5 at 0x007d0000 (pgoffset 2000)
>(II) intel(0): xf86BindGARTMemory: bind key 6 at 0x02000000 (pgoffset 8192)
>(II) intel(0): xf86BindGARTMemory: bind key 7 at 0x02400000 (pgoffset 9216)
>(II) intel(0): xf86BindGARTMemory: bind key 8 at 0x04800000 (pgoffset 18432)
>(WW) intel(0): PRB0_HEAD (0x00000000) and PRB0_TAIL (0x00019680) indicate ring buffer not flushed
>(WW) intel(0): Existing errors found in hardware state.
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>chosen: dotclock 65142 vco 1824000 ((m 95, m1 15, m2 8), n 3, (p 28, p1 2, p2 14))
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00480004 (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000015
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000
>(II) intel(0):                 DVOB: 0x00480004
>(II) intel(0):                 DVOC: 0x00480000
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0x80000668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000000 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x02ff03ff (1024, 768)
>(II) intel(0):             DSPBBASE: 0x007d0000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x03ff02ff (1024, 768)
>(II) intel(0):                 FPB0: 0x00030f08 (n = 3, m1 = 15, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98020000 (enabled, non-dvo, default clock, LVDS mode, p1 = 2, p2 = 14, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 91200 n 3 m1 15 m2 8 p1 2 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0):   Output TMDS-1 is connected to pipe none
>(II) intel(0):   Output TV is connected to pipe none
>(II) intel(0): [drm] dma control initialized, using IRQ 20
>(II) Configured Mouse: ps2EnableDataReporting: succeeded
>(II) intel(0): EDID for output VGA
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" removed.
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: LEN  Model: 4020  Serial#: 0
>(II) intel(0): Year: 2005  Week: 0
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max H-Image Size [cm]: horiz.: 29  vert.: 21
>(II) intel(0): Gamma: 2.20
>(II) intel(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.590 redY: 0.342   greenX: 0.319 greenY: 0.540
>(II) intel(0): blueX: 0.152 blueY: 0.137   whiteX: 0.313 whiteY: 0.329
>(II) intel(0): Supported VESA Video Modes:
>(II) intel(0): 640x480@60Hz
>(II) intel(0): 800x600@60Hz
>(II) intel(0): 1024x768@60Hz
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 65.0 MHz   Image Size:  286 x 214 mm
>(II) intel(0): h_active: 1024  h_sync: 1048  h_sync_end 1184 h_blank_end 1344 h_border: 0
>(II) intel(0): v_active: 768  v_sync: 771  v_sync_end 777 v_blanking: 806 v_border: 0
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 54.2 MHz   Image Size:  286 x 214 mm
>(II) intel(0): h_active: 1024  h_sync: 1048  h_sync_end 1184 h_blank_end 1344 h_border: 0
>(II) intel(0): v_active: 768  v_sync: 771  v_sync_end 777 v_blanking: 806 v_border: 0
>(II) intel(0):  LTN141XA-L01
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0030ae204000000000
>(II) intel(0): 	000f0103801d1578ea2d059757518a27
>(II) intel(0): 	23505421080001010101010101010101
>(II) intel(0): 	01010101010164190040410026301888
>(II) intel(0): 	36001ed6100000192815004041002630
>(II) intel(0): 	188836001ed6100000190000000f0061
>(II) intel(0): 	43326143280f01004ca35841000000fe
>(II) intel(0): 	004c544e31343158412d4c30310a00e9
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "800x600"   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync
>(II) intel(0): Modeline "640x480"   25.20  640 656 752 800  480 490 492 525 -hsync -vsync
>(II) intel(0): Modeline "1024x768"   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync
>(II) intel(0): Modeline "1024x768"   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync
>(II) intel(0): Modeline "1024x768"   54.16  1024 1048 1184 1344  768 771 777 806 -hsync -vsync
>(II) intel(0): EDID vendor "LEN", prod id 16416
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x864" (width too large for virtual size)
>(II) intel(0): Not using default mode "1280x960" (width too large for virtual size)
>(II) intel(0): Not using default mode "1280x960" (width too large for virtual size)
>(II) intel(0): Not using default mode "1280x1024" (width too large for virtual size)
>(II) intel(0): Not using default mode "1280x1024" (width too large for virtual size)
>(II) intel(0): Not using default mode "1280x1024" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) intel(0): Not using default mode "1600x1200" (height too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x768" (width too large for virtual size)
>(II) intel(0): Not using default mode "1280x800" (width too large for virtual size)
>(II) intel(0): Not using default mode "1152x768" (width too large for virtual size)
>(II) intel(0): Not using default mode "1152x864" (width too large for virtual size)
>(II) intel(0): Not using default mode "1400x1050" (height too large for virtual size)
>(II) intel(0): Not using default mode "1400x1050" (height too large for virtual size)
>(II) intel(0): Not using default mode "1400x1050" (height too large for virtual size)
>(II) intel(0): Not using default mode "1400x1050" (height too large for virtual size)
>(II) intel(0): Not using default mode "1440x900" (width too large for virtual size)
>(II) intel(0): Not using default mode "1600x1024" (width too large for virtual size)
>(II) intel(0): Not using default mode "1680x1050" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1200" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1200" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "1024x768"x50.0   54.16  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (40.3 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): SDVO: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVO: R: 00 00                   (Success)
>(II) intel(0): EDID for output TMDS-1
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "NTSC 480i"x0.0  107.52  1280 1368 1496 1712  1024 1027 1034 1104 (62.8 kHz)
>chosen: dotclock 107520 vco 2150400 ((m 112, m1 19, m2 5), n 3, (p 20, p1 2, p2 10))
>(II) intel(0): No TV connection detected
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): EDID for output TV
>Synaptics DeviceOff called
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00480004 (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000015
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000
>(II) intel(0):                 DVOB: 0x00480004
>(II) intel(0):                 DVOC: 0x00480000
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x80002668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x49000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):                 FPB0: 0x00030e09 (n = 3, m1 = 14, m2 = 9)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026003 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x22c4008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0xe8
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 91000 n 3 m1 14 m2 9 p1 2 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) intel(0): xf86UnbindGARTMemory: unbind key 5
>(II) intel(0): xf86UnbindGARTMemory: unbind key 6
>(II) intel(0): xf86UnbindGARTMemory: unbind key 7
>(II) intel(0): xf86UnbindGARTMemory: unbind key 8
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x007bf000 (pgoffset 1983)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x007c0000 (pgoffset 1984)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x007c4000 (pgoffset 1988)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x007c5000 (pgoffset 1989)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x007c9000 (pgoffset 1993)
>(II) intel(0): xf86BindGARTMemory: bind key 5 at 0x007d0000 (pgoffset 2000)
>(II) intel(0): xf86BindGARTMemory: bind key 6 at 0x02000000 (pgoffset 8192)
>(II) intel(0): xf86BindGARTMemory: bind key 7 at 0x02400000 (pgoffset 9216)
>(II) intel(0): xf86BindGARTMemory: bind key 8 at 0x04800000 (pgoffset 18432)
>(WW) intel(0): PRB0_HEAD (0x00000000) and PRB0_TAIL (0x0000d678) indicate ring buffer not flushed
>(WW) intel(0): Existing errors found in hardware state.
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "PèÊË"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>chosen: dotclock 65142 vco 1824000 ((m 95, m1 15, m2 8), n 3, (p 28, p1 2, p2 14))
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00480004 (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000015
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000
>(II) intel(0):                 DVOB: 0x00480004
>(II) intel(0):                 DVOC: 0x00480000
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PFIT_CONTROL: 0x80000668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000000 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x02ff03ff (1024, 768)
>(II) intel(0):             DSPBBASE: 0x007d0000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x03ff02ff (1024, 768)
>(II) intel(0):                 FPB0: 0x00030f08 (n = 3, m1 = 15, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98020000 (enabled, non-dvo, default clock, LVDS mode, p1 = 2, p2 = 14, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 91200 n 3 m1 15 m2 8 p1 2 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0):   Output TMDS-1 is connected to pipe none
>(II) intel(0):   Output TV is connected to pipe none
>(II) intel(0): [drm] dma control initialized, using IRQ 20
>Synaptics DeviceOn called
>(--) Synaptics Touchpad auto-dev sets device to /dev/input/event3
>(**) Option "Device" "/dev/input/event3"
>(--) Synaptics Touchpad touchpad found
>(II) Configured Mouse: ps2EnableDataReporting: succeeded
>Synaptics DeviceOff called
>(II) intel(0): [drm] removed 1 reserved context for kernel
>(II) intel(0): [drm] unmapping 8192 bytes of SAREA 0xf91e9000 at 0xb7faa000
>(EE) intel(0): I830 Vblank Pipe Setup Failed 0
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): SDVO: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVO: R:                         (Success)
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00480004 (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000015
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000
>(II) intel(0):                 DVOB: 0x00480004
>(II) intel(0):                 DVOC: 0x00480000
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000001 (power target: on)
>(II) intel(0):            PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x80002668
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000400
>(II) intel(0):             DSPACNTR: 0x00000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x49000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x018f02cf (720, 400)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):                 FPB0: 0x00030e09 (n = 3, m1 = 14, m2 = 9)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026003 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x22c4008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x1f
>(II) intel(0):                 CR0b: 0x1e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 91000 n 3 m1 14 m2 9 p1 2 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) intel(0): xf86UnbindGARTMemory: unbind key 5
>(II) intel(0): xf86UnbindGARTMemory: unbind key 6
>(II) intel(0): xf86UnbindGARTMemory: unbind key 7
>(II) intel(0): xf86UnbindGARTMemory: unbind key 8

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Attachments on bug 10586: 9535 | 11945 | 11964

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