Attachment 114808 Details for Bug 89848 – dmesg output after framebuffer corruption occurs.

dmesg output after framebuffer corruption occurs.

drm_error.txt (text/plain), 210.66 KB, created by Dominic Lindsay on 2015-04-01 12:11:59 UTC

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Description:

Filename:

MIME Type:

Creator: Dominic Lindsay

Created: 2015-04-01 12:11:59 UTC

Size: 210.66 KB

patch

obsolete

>[    0.000000] Initializing cgroup subsys cpuset
>[    0.000000] Initializing cgroup subsys cpu
>[    0.000000] Initializing cgroup subsys cpuacct
>[    0.000000] Linux version 4.0.0-1-xps13-9343 (babbleshack@babblebook) (gcc version 4.9.2 20150304 (prerelease) (GCC) ) #1 SMP PREEMPT Mon Mar 30 17:35:41 BST 2015
>[    0.000000] Command line: BOOT_IMAGE=/vmlinuz-linux-xps13-9343 root=UUID=89818ba1-6a85-4982-8161-bb7333d9cbb8 rw drm.debug=0x6 quiet
>[    0.000000] e820: BIOS-provided physical RAM map:
>[    0.000000] BIOS-e820: [mem 0x0000000000000000-0x0000000000057fff] usable
>[    0.000000] BIOS-e820: [mem 0x0000000000058000-0x0000000000058fff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000059000-0x000000000009dfff] usable
>[    0.000000] BIOS-e820: [mem 0x000000000009e000-0x000000000009ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000c6432fff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000c6433000-0x00000000c68e6fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000c68e7000-0x00000000daddbfff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000daddc000-0x00000000dae9cfff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000dae9d000-0x00000000daec9fff] ACPI data
>[    0.000000] BIOS-e820: [mem 0x00000000daeca000-0x00000000db801fff] ACPI NVS
>[    0.000000] BIOS-e820: [mem 0x00000000db802000-0x00000000dba9cfff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000dba9d000-0x00000000dbafdfff] type 20
>[    0.000000] BIOS-e820: [mem 0x00000000dbafe000-0x00000000dbafefff] usable
>[    0.000000] BIOS-e820: [mem 0x00000000dd000000-0x00000000df7fffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000f8000000-0x00000000fbffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec00fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed03fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed1ffff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved
>[    0.000000] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved
>[    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000021e7fffff] usable
>[    0.000000] NX (Execute Disable) protection: active
>[    0.000000] efi: EFI v2.31 by American Megatrends
>[    0.000000] efi:  ACPI=0xdaea6000  ACPI 2.0=0xdaea6000  SMBIOS=0xf0000 
>[    0.000000] efi: mem00: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000000000000-0x0000000000058000) (0MB)
>[    0.000000] efi: mem01: [Reserved           |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000000058000-0x0000000000059000) (0MB)
>[    0.000000] efi: mem02: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000000059000-0x000000000009e000) (0MB)
>[    0.000000] efi: mem03: [Reserved           |   |  |  |  |   |WB|WT|WC|UC] range=[0x000000000009e000-0x00000000000a0000) (0MB)
>[    0.000000] efi: mem04: [Loader Data        |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000000100000-0x0000000000f30000) (14MB)
>[    0.000000] efi: mem05: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000000f30000-0x0000000010000000) (240MB)
>[    0.000000] efi: mem06: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000010000000-0x000000001000b000) (0MB)
>[    0.000000] efi: mem07: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x000000001000b000-0x0000000037938000) (633MB)
>[    0.000000] efi: mem08: [Loader Data        |   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000037938000-0x0000000037c94000) (3MB)
>[    0.000000] efi: mem09: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000037c94000-0x00000000915a4000) (1433MB)
>[    0.000000] efi: mem10: [Loader Data        |   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000915a4000-0x00000000c28fe000) (787MB)
>[    0.000000] efi: mem11: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000c28fe000-0x00000000c293e000) (0MB)
>[    0.000000] efi: mem12: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000c293e000-0x00000000c4d2a000) (35MB)
>[    0.000000] efi: mem13: [Loader Code        |   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000c4d2a000-0x00000000c4d47000) (0MB)
>[    0.000000] efi: mem14: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000c4d47000-0x00000000c6433000) (22MB)
>[    0.000000] efi: mem15: [Runtime Data       |RUN|  |  |  |   |WB|WT|WC|UC] range=[0x00000000c6433000-0x00000000c68e7000) (4MB)
>[    0.000000] efi: mem16: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000c68e7000-0x00000000c68ee000) (0MB)
>[    0.000000] efi: mem17: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000c68ee000-0x00000000d6ce2000) (259MB)
>[    0.000000] efi: mem18: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000d6ce2000-0x00000000da657000) (57MB)
>[    0.000000] efi: mem19: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000da657000-0x00000000da7cf000) (1MB)
>[    0.000000] efi: mem20: [Loader Data        |   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000da7cf000-0x00000000da7d9000) (0MB)
>[    0.000000] efi: mem21: [Boot Code          |   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000da7d9000-0x00000000daddc000) (6MB)
>[    0.000000] efi: mem22: [Reserved           |   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000daddc000-0x00000000dae9d000) (0MB)
>[    0.000000] efi: mem23: [ACPI Reclaim Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000dae9d000-0x00000000daeca000) (0MB)
>[    0.000000] efi: mem24: [ACPI Memory NVS    |   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000daeca000-0x00000000db802000) (9MB)
>[    0.000000] efi: mem25: [Runtime Data       |RUN|  |  |  |   |WB|WT|WC|UC] range=[0x00000000db802000-0x00000000dba9d000) (2MB)
>[    0.000000] efi: mem26: [Runtime Code       |RUN|  |  |  |   |WB|WT|WC|UC] range=[0x00000000dba9d000-0x00000000dbafe000) (0MB)
>[    0.000000] efi: mem27: [Boot Data          |   |  |  |  |   |WB|WT|WC|UC] range=[0x00000000dbafe000-0x00000000dbaff000) (0MB)
>[    0.000000] efi: mem28: [Conventional Memory|   |  |  |  |   |WB|WT|WC|UC] range=[0x0000000100000000-0x000000021e800000) (4584MB)
>[    0.000000] efi: mem29: [Reserved           |   |  |  |  |   |  |  |  |  ] range=[0x00000000dd000000-0x00000000df800000) (40MB)
>[    0.000000] efi: mem30: [Memory Mapped I/O  |RUN|  |  |  |   |  |  |  |UC] range=[0x00000000f8000000-0x00000000fc000000) (64MB)
>[    0.000000] efi: mem31: [Memory Mapped I/O  |RUN|  |  |  |   |  |  |  |UC] range=[0x00000000fec00000-0x00000000fec01000) (0MB)
>[    0.000000] efi: mem32: [Memory Mapped I/O  |RUN|  |  |  |   |  |  |  |UC] range=[0x00000000fed00000-0x00000000fed04000) (0MB)
>[    0.000000] efi: mem33: [Memory Mapped I/O  |RUN|  |  |  |   |  |  |  |UC] range=[0x00000000fed1c000-0x00000000fed20000) (0MB)
>[    0.000000] efi: mem34: [Memory Mapped I/O  |RUN|  |  |  |   |  |  |  |UC] range=[0x00000000fee00000-0x00000000fee01000) (0MB)
>[    0.000000] efi: mem35: [Memory Mapped I/O  |RUN|  |  |  |   |  |  |  |UC] range=[0x00000000ff000000-0x0000000100000000) (16MB)
>[    0.000000] SMBIOS 2.8 present.
>[    0.000000] DMI: Dell Inc. XPS 13 9343/0F5KF3, BIOS A02 03/12/2015
>[    0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>[    0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
>[    0.000000] e820: last_pfn = 0x21e800 max_arch_pfn = 0x400000000
>[    0.000000] MTRR default type: uncachable
>[    0.000000] MTRR fixed ranges enabled:
>[    0.000000]   00000-9FFFF write-back
>[    0.000000]   A0000-DFFFF uncachable
>[    0.000000]   E0000-FFFFF write-protect
>[    0.000000] MTRR variable ranges enabled:
>[    0.000000]   0 base 0000000000 mask 7E00000000 write-back
>[    0.000000]   1 base 0200000000 mask 7FF0000000 write-back
>[    0.000000]   2 base 0210000000 mask 7FF8000000 write-back
>[    0.000000]   3 base 0218000000 mask 7FFC000000 write-back
>[    0.000000]   4 base 021C000000 mask 7FFE000000 write-back
>[    0.000000]   5 base 021E000000 mask 7FFF800000 write-back
>[    0.000000]   6 base 00E0000000 mask 7FE0000000 uncachable
>[    0.000000]   7 base 00DE000000 mask 7FFE000000 uncachable
>[    0.000000]   8 base 00DD000000 mask 7FFF000000 uncachable
>[    0.000000]   9 disabled
>[    0.000000] PAT configuration [0-7]: WB  WC  UC- UC  WB  WC  UC- UC  
>[    0.000000] e820: update [mem 0xdd000000-0xffffffff] usable ==> reserved
>[    0.000000] e820: last_pfn = 0xdbaff max_arch_pfn = 0x400000000
>[    0.000000] Scanning 1 areas for low memory corruption
>[    0.000000] Base memory trampoline at [ffff880000098000] 98000 size 24576
>[    0.000000] Using GB pages for direct mapping
>[    0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff]
>[    0.000000]  [mem 0x00000000-0x000fffff] page 4k
>[    0.000000] BRK [0x01b22000, 0x01b22fff] PGTABLE
>[    0.000000] BRK [0x01b23000, 0x01b23fff] PGTABLE
>[    0.000000] BRK [0x01b24000, 0x01b24fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x21e600000-0x21e7fffff]
>[    0.000000]  [mem 0x21e600000-0x21e7fffff] page 2M
>[    0.000000] BRK [0x01b25000, 0x01b25fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0x200000000-0x21e5fffff]
>[    0.000000]  [mem 0x200000000-0x21e5fffff] page 2M
>[    0.000000] init_memory_mapping: [mem 0x1e0000000-0x1ffffffff]
>[    0.000000]  [mem 0x1e0000000-0x1ffffffff] page 1G
>[    0.000000] init_memory_mapping: [mem 0x00100000-0xc6432fff]
>[    0.000000]  [mem 0x00100000-0x001fffff] page 4k
>[    0.000000]  [mem 0x00200000-0x3fffffff] page 2M
>[    0.000000]  [mem 0x40000000-0xbfffffff] page 1G
>[    0.000000]  [mem 0xc0000000-0xc63fffff] page 2M
>[    0.000000]  [mem 0xc6400000-0xc6432fff] page 4k
>[    0.000000] init_memory_mapping: [mem 0xc68e7000-0xdaddbfff]
>[    0.000000]  [mem 0xc68e7000-0xc69fffff] page 4k
>[    0.000000]  [mem 0xc6a00000-0xdabfffff] page 2M
>[    0.000000]  [mem 0xdac00000-0xdaddbfff] page 4k
>[    0.000000] BRK [0x01b26000, 0x01b26fff] PGTABLE
>[    0.000000] BRK [0x01b27000, 0x01b27fff] PGTABLE
>[    0.000000] init_memory_mapping: [mem 0xdbafe000-0xdbafefff]
>[    0.000000]  [mem 0xdbafe000-0xdbafefff] page 4k
>[    0.000000] init_memory_mapping: [mem 0x100000000-0x1dfffffff]
>[    0.000000]  [mem 0x100000000-0x1dfffffff] page 1G
>[    0.000000] RAMDISK: [mem 0x37938000-0x37c93fff]
>[    0.000000] ACPI: Early table checksum verification disabled
>[    0.000000] ACPI: RSDP 0x00000000DAEA6000 000024 (v02 DELL  )
>[    0.000000] ACPI: XSDT 0x00000000DAEA60C0 000104 (v01 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: FACP 0x00000000DAEB9798 00010C (v05 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: DSDT 0x00000000DAEA6258 013539 (v02 DELL   CBX3     01072009 INTL 20120913)
>[    0.000000] ACPI: FACS 0x00000000DB7FFF80 000040
>[    0.000000] ACPI: APIC 0x00000000DAEB98A8 000084 (v03 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: FPDT 0x00000000DAEB9930 000044 (v01 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: FIDT 0x00000000DAEB9978 00009C (v01 DELL   CBX3     01072009 AMI  00010013)
>[    0.000000] ACPI: MCFG 0x00000000DAEB9A18 00003C (v01 DELL   CBX3     01072009 MSFT 00000097)
>[    0.000000] ACPI: HPET 0x00000000DAEB9A58 000038 (v01 DELL   CBX3     01072009 AMI. 00000005)
>[    0.000000] ACPI: SSDT 0x00000000DAEB9A90 000455 (v01 SataRe SataTabl 00001000 INTL 20120913)
>[    0.000000] ACPI: UEFI 0x00000000DAEB9EE8 000042 (v01                 00000000      00000000)
>[    0.000000] ACPI: SSDT 0x00000000DAEB9F30 0004A7 (v02 Intel_ Tpm2Tabl 00001000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEBA3D8 00004B (v02 MeSsdt MeSsdt   00003000 INTL 20120913)
>[    0.000000] ACPI: TPM2 0x00000000DAEBA428 000034 (v03                 00000000      00000000)
>[    0.000000] ACPI: LPIT 0x00000000DAEBA460 000094 (v01                 00000000      00000000)
>[    0.000000] ACPI: SSDT 0x00000000DAEBA4F8 002048 (v02 AcpiRe Ult0Rtd3 00001000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEBC540 000CDB (v02 Ther_R Ther_Rvp 00001000 INTL 20120913)
>[    0.000000] ACPI: ASF! 0x00000000DAEBD220 0000A0 (v32 INTEL   HCG     00000001 TFSM 000F4240)
>[    0.000000] ACPI: SSDT 0x00000000DAEBD2C0 00051F (v02 PmRef  Cpu0Ist  00003000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEBD7E0 000B74 (v02 CpuRef CpuSsdt  00003000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEBE358 0001C7 (v02 PmRef  LakeTiny 00003000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEBE520 0003A5 (v02 CppcTa CppcTabl 00001000 INTL 20120913)
>[    0.000000] ACPI: PCCT 0x00000000DAEBE8C8 00006E (v05 PcctTa PcctTabl 00001000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEBE938 000AC4 (v02 Cpc_Ta Cpc_Tabl 00001000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEBF400 004207 (v02 SaSsdt SaSsdt   00003000 INTL 20120913)
>[    0.000000] ACPI: SSDT 0x00000000DAEC3608 004646 (v01 DptfTa DptfTabl 00001000 INTL 20120913)
>[    0.000000] ACPI: SLIC 0x00000000DAEC7C50 000176 (v03 DELL   CBX3     01072009 MSFT 00010013)
>[    0.000000] ACPI: MSDM 0x00000000DAEC7DC8 000055 (v03 DELL   CBX3     06222004 AMI  00010013)
>[    0.000000] ACPI: DMAR 0x00000000DAEC7E20 0000F0 (v01 INTEL  BDW      00000001 INTL 00000001)
>[    0.000000] ACPI: CSRT 0x00000000DAEC7F10 0000C4 (v01 INTL   BDW-ULT  00000001 INTL 20100528)
>[    0.000000] ACPI: BGRT 0x00000000DAEC7FD8 000038 (v00                 01072009 AMI  00010013)
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] No NUMA configuration found
>[    0.000000] Faking a node at [mem 0x0000000000000000-0x000000021e7fffff]
>[    0.000000] NODE_DATA(0) allocated [mem 0x21e7f9000-0x21e7fcfff]
>[    0.000000]  [ffffea0000000000-ffffea00087fffff] PMD -> [ffff880215e00000-ffff88021ddfffff] on node 0
>[    0.000000] Zone ranges:
>[    0.000000]   DMA      [mem 0x0000000000001000-0x0000000000ffffff]
>[    0.000000]   DMA32    [mem 0x0000000001000000-0x00000000ffffffff]
>[    0.000000]   Normal   [mem 0x0000000100000000-0x000000021e7fffff]
>[    0.000000] Movable zone start for each node
>[    0.000000] Early memory node ranges
>[    0.000000]   node   0: [mem 0x0000000000001000-0x0000000000057fff]
>[    0.000000]   node   0: [mem 0x0000000000059000-0x000000000009dfff]
>[    0.000000]   node   0: [mem 0x0000000000100000-0x00000000c6432fff]
>[    0.000000]   node   0: [mem 0x00000000c68e7000-0x00000000daddbfff]
>[    0.000000]   node   0: [mem 0x00000000dbafe000-0x00000000dbafefff]
>[    0.000000]   node   0: [mem 0x0000000100000000-0x000000021e7fffff]
>[    0.000000] Initmem setup node 0 [mem 0x0000000000001000-0x000000021e7fffff]
>[    0.000000] On node 0 totalpages: 2068677
>[    0.000000]   DMA zone: 64 pages used for memmap
>[    0.000000]   DMA zone: 22 pages reserved
>[    0.000000]   DMA zone: 3996 pages, LIFO batch:0
>[    0.000000]   DMA32 zone: 13925 pages used for memmap
>[    0.000000]   DMA32 zone: 891177 pages, LIFO batch:31
>[    0.000000]   Normal zone: 18336 pages used for memmap
>[    0.000000]   Normal zone: 1173504 pages, LIFO batch:31
>[    0.000000] Reserving Intel graphics stolen memory at 0xdd800000-0xdf7fffff
>[    0.000000] ACPI: PM-Timer IO Port: 0x1808
>[    0.000000] ACPI: Local APIC address 0xfee00000
>[    0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x03] lapic_id[0x01] enabled)
>[    0.000000] ACPI: LAPIC (acpi_id[0x04] lapic_id[0x03] enabled)
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] dfl dfl lint[0x0])
>[    0.000000] ACPI: NMI not connected to LINT 1!
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x02] dfl dfl lint[0x0])
>[    0.000000] ACPI: NMI not connected to LINT 1!
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x03] dfl dfl lint[0x0])
>[    0.000000] ACPI: NMI not connected to LINT 1!
>[    0.000000] ACPI: LAPIC_NMI (acpi_id[0x04] res res lint[0x0])
>[    0.000000] ACPI: NMI not connected to LINT 1!
>[    0.000000] ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0])
>[    0.000000] IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-39
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>[    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
>[    0.000000] ACPI: IRQ0 used by override.
>[    0.000000] ACPI: IRQ9 used by override.
>[    0.000000] Using ACPI (MADT) for SMP configuration information
>[    0.000000] ACPI: HPET id: 0x8086a701 base: 0xfed00000
>[    0.000000] smpboot: Allowing 4 CPUs, 0 hotplug CPUs
>[    0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x00058000-0x00058fff]
>[    0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x0009ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xc6433000-0xc68e6fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdaddc000-0xdae9cfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdae9d000-0xdaec9fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdaeca000-0xdb801fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdb802000-0xdba9cfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdba9d000-0xdbafdfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdbaff000-0xdcffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdd000000-0xdf7fffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xdf800000-0xf7ffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xf8000000-0xfbffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfc000000-0xfebfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfec00000-0xfec00fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfec01000-0xfecfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed00000-0xfed03fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed04000-0xfed1bfff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed1c000-0xfed1ffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfed20000-0xfedfffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfee00000-0xfee00fff]
>[    0.000000] PM: Registered nosave memory: [mem 0xfee01000-0xfeffffff]
>[    0.000000] PM: Registered nosave memory: [mem 0xff000000-0xffffffff]
>[    0.000000] e820: [mem 0xdf800000-0xf7ffffff] available for PCI devices
>[    0.000000] Booting paravirtualized kernel on bare hardware
>[    0.000000] setup_percpu: NR_CPUS:128 nr_cpumask_bits:128 nr_cpu_ids:4 nr_node_ids:1
>[    0.000000] PERCPU: Embedded 31 pages/cpu @ffff88021e400000 s87000 r8192 d31784 u524288
>[    0.000000] pcpu-alloc: s87000 r8192 d31784 u524288 alloc=1*2097152
>[    0.000000] pcpu-alloc: [0] 0 1 2 3 
>[    0.000000] Built 1 zonelists in Node order, mobility grouping on.  Total pages: 2036330
>[    0.000000] Policy zone: Normal
>[    0.000000] Kernel command line: BOOT_IMAGE=/vmlinuz-linux-xps13-9343 root=UUID=89818ba1-6a85-4982-8161-bb7333d9cbb8 rw drm.debug=0x6 quiet
>[    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
>[    0.000000] xsave: enabled xstate_bv 0x7, cntxt size 0x340 using standard form
>[    0.000000] Memory: 7973060K/8274708K available (5464K kernel code, 887K rwdata, 1728K rodata, 1140K init, 1148K bss, 301648K reserved, 0K cma-reserved)
>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
>[    0.000000] Preemptible hierarchical RCU implementation.
>[    0.000000] 	RCU dyntick-idle grace-period acceleration is enabled.
>[    0.000000] 	RCU restricting CPUs from NR_CPUS=128 to nr_cpu_ids=4.
>[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
>[    0.000000] NR_IRQS:8448 nr_irqs:728 16
>[    0.000000] Console: colour dummy device 80x25
>[    0.000000] console [tty0] enabled
>[    0.000000] hpet clockevent registered
>[    0.000000] tsc: Fast TSC calibration using PIT
>[    0.000000] tsc: Detected 2593.979 MHz processor
>[    0.000025] Calibrating delay loop (skipped), value calculated using timer frequency.. 5190.12 BogoMIPS (lpj=8646596)
>[    0.000028] pid_max: default: 32768 minimum: 301
>[    0.000031] ACPI: Core revision 20150204
>[    0.022091] ACPI: All ACPI Tables successfully acquired
>[    0.023667] Security Framework initialized
>[    0.023672] Yama: becoming mindful.
>[    0.024067] Dentry cache hash table entries: 1048576 (order: 11, 8388608 bytes)
>[    0.025426] Inode-cache hash table entries: 524288 (order: 10, 4194304 bytes)
>[    0.026010] Mount-cache hash table entries: 16384 (order: 5, 131072 bytes)
>[    0.026018] Mountpoint-cache hash table entries: 16384 (order: 5, 131072 bytes)
>[    0.026179] Initializing cgroup subsys blkio
>[    0.026181] Initializing cgroup subsys memory
>[    0.026187] Initializing cgroup subsys devices
>[    0.026188] Initializing cgroup subsys freezer
>[    0.026190] Initializing cgroup subsys net_cls
>[    0.026210] CPU: Physical Processor ID: 0
>[    0.026210] CPU: Processor Core ID: 0
>[    0.026214] ENERGY_PERF_BIAS: Set to 'normal', was 'performance'
>[    0.026215] ENERGY_PERF_BIAS: View and update with x86_energy_perf_policy(8)
>[    0.027134] mce: CPU supports 7 MCE banks
>[    0.027144] CPU0: Thermal monitoring enabled (TM1)
>[    0.027153] Last level iTLB entries: 4KB 64, 2MB 8, 4MB 8
>[    0.027154] Last level dTLB entries: 4KB 64, 2MB 0, 4MB 0, 1GB 4
>[    0.027458] Freeing SMP alternatives memory: 20K (ffffffff819fc000 - ffffffff81a01000)
>[    0.030304] ftrace: allocating 20991 entries in 82 pages
>[    0.037964] dmar: Host address width 39
>[    0.037965] dmar: DRHD base: 0x000000fed90000 flags: 0x0
>[    0.037973] dmar: IOMMU 0: reg_base_addr fed90000 ver 1:0 cap 1c0000c40660462 ecap 7e1ff0505e
>[    0.037974] dmar: DRHD base: 0x000000fed91000 flags: 0x1
>[    0.037978] dmar: IOMMU 1: reg_base_addr fed91000 ver 1:0 cap d2008c20660462 ecap f010da
>[    0.037979] dmar: RMRR base: 0x000000db9ee000 end: 0x000000db9fcfff
>[    0.037980] dmar: RMRR base: 0x000000dd000000 end: 0x000000df7fffff
>[    0.037981] dmar: ANDD device: 1 name: \_SB.PCI0.SDMA
>[    0.037982] dmar: ANDD device: 3 name: \_SB.PCI0.ADSP
>[    0.037984] IOAPIC id 2 under DRHD base  0xfed91000 IOMMU 1
>[    0.037985] HPET id 0 under DRHD base 0xfed91000
>[    0.038275] Your BIOS is broken and requested that x2apic be disabled.
>               This will slightly decrease performance.
>               Use 'intremap=no_x2apic_optout' to override BIOS request.
>[    0.038285] Enabled IRQ remapping in xapic mode
>[    0.038286] x2apic: IRQ remapping doesn't support X2APIC mode
>[    0.038868] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>[    0.071894] TSC deadline timer enabled
>[    0.071896] smpboot: CPU0: Intel(R) Core(TM) i7-5600U CPU @ 2.60GHz (fam: 06, model: 3d, stepping: 04)
>[    0.071919] Performance Events: PEBS fmt2+, generic architected perfmon, full-width counters, Intel PMU driver.
>[    0.071924] ... version:                3
>[    0.071925] ... bit width:              48
>[    0.071925] ... generic registers:      4
>[    0.071926] ... value mask:             0000ffffffffffff
>[    0.071927] ... max period:             0000ffffffffffff
>[    0.071928] ... fixed-purpose events:   3
>[    0.071928] ... event mask:             000000070000000f
>[    0.092055] x86: Booting SMP configuration:
>[    0.092056] .... node  #0, CPUs:      #1
>[    0.106234] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter.
>[    0.112930]  #2 #3
>[    0.147944] x86: Booted up 1 node, 4 CPUs
>[    0.147947] smpboot: Total of 4 processors activated (20760.49 BogoMIPS)
>[    0.151880] devtmpfs: initialized
>[    0.153783] PM: Registering ACPI NVS region [mem 0xdaeca000-0xdb801fff] (9666560 bytes)
>[    0.153988] pinctrl core: initialized pinctrl subsystem
>[    0.154022] RTC time: 12:07:08, date: 04/01/15
>[    0.154113] NET: Registered protocol family 16
>[    0.165083] cpuidle: using governor ladder
>[    0.178440] cpuidle: using governor menu
>[    0.178464] ACPI FADT declares the system doesn't support PCIe ASPM, so disable it
>[    0.178466] ACPI: bus type PCI registered
>[    0.178467] acpiphp: ACPI Hot Plug PCI Controller Driver version: 0.5
>[    0.178520] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf8000000-0xfbffffff] (base 0xf8000000)
>[    0.178522] PCI: MMCONFIG at [mem 0xf8000000-0xfbffffff] reserved in E820
>[    0.178591] PCI: Using configuration type 1 for base access
>[    0.178596] dmi type 0xB1 record - unknown flag
>[    0.192037] ACPI: Added _OSI(Module Device)
>[    0.192038] ACPI: Added _OSI(Processor Device)
>[    0.192039] ACPI: Added _OSI(3.0 _SCP Extensions)
>[    0.192040] ACPI: Added _OSI(Processor Aggregator Device)
>[    0.198097] ACPI: Executed 17 blocks of module-level executable AML code
>[    0.207612] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query ignored
>[    0.210211] ACPI: Dynamic OEM Table Load:
>[    0.210217] ACPI: SSDT 0xFFFF8802140F9000 0003D3 (v02 PmRef  Cpu0Cst  00003001 INTL 20120913)
>[    0.211027] ACPI: Dynamic OEM Table Load:
>[    0.211033] ACPI: SSDT 0xFFFF88021407B000 0005AA (v02 PmRef  ApIst    00003000 INTL 20120913)
>[    0.211876] ACPI: Dynamic OEM Table Load:
>[    0.211880] ACPI: SSDT 0xFFFF8802140C7600 000119 (v02 PmRef  ApCst    00003000 INTL 20120913)
>[    0.220797] ACPI: Interpreter enabled
>[    0.220805] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20150204/hwxface-580)
>[    0.220812] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20150204/hwxface-580)
>[    0.220826] ACPI: (supports S0 S3 S4 S5)
>[    0.220827] ACPI: Using IOAPIC for interrupt routing
>[    0.220855] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
>[    0.222551] ACPI: Power Resource [PG00] (on)
>[    0.222866] ACPI: Power Resource [PG01] (on)
>[    0.223157] ACPI: Power Resource [PG02] (on)
>[    0.223559] ACPI: Power Resource [PXP] (on)
>[    0.227562] ACPI: Power Resource [PX05] (on)
>[    0.228307] ACPI: Power Resource [PAUD] (on)
>[    0.252238] ACPI: Power Resource [PXTC] (off)
>[    0.253409] ACPI: Power Resource [P3PR] (off)
>[    0.257835] ACPI: Power Resource [FN00] (off)
>[    0.257894] ACPI: Power Resource [FN01] (off)
>[    0.257951] ACPI: Power Resource [FN02] (off)
>[    0.258014] ACPI: Power Resource [FN03] (off)
>[    0.258068] ACPI: Power Resource [FN04] (off)
>[    0.258792] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-3e])
>[    0.258797] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
>[    0.259198] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability]
>[    0.259496] PCI host bridge to bus 0000:00
>[    0.259499] pci_bus 0000:00: root bus resource [bus 00-3e]
>[    0.259500] pci_bus 0000:00: root bus resource [io  0x0000-0x0cf7 window]
>[    0.259502] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
>[    0.259503] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
>[    0.259504] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000c3fff window]
>[    0.259505] pci_bus 0000:00: root bus resource [mem 0x000c4000-0x000c7fff window]
>[    0.259506] pci_bus 0000:00: root bus resource [mem 0x000c8000-0x000cbfff window]
>[    0.259508] pci_bus 0000:00: root bus resource [mem 0x000cc000-0x000cffff window]
>[    0.259509] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff window]
>[    0.259510] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff window]
>[    0.259511] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff window]
>[    0.259513] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff window]
>[    0.259514] pci_bus 0000:00: root bus resource [mem 0xdf800000-0xfeafffff window]
>[    0.259521] pci 0000:00:00.0: [8086:1604] type 00 class 0x060000
>[    0.259597] pci 0000:00:02.0: [8086:1616] type 00 class 0x030000
>[    0.259607] pci 0000:00:02.0: reg 0x10: [mem 0xf6000000-0xf6ffffff 64bit]
>[    0.259613] pci 0000:00:02.0: reg 0x18: [mem 0xe0000000-0xefffffff 64bit pref]
>[    0.259617] pci 0000:00:02.0: reg 0x20: [io  0xf000-0xf03f]
>[    0.259689] pci 0000:00:03.0: [8086:160c] type 00 class 0x040300
>[    0.259695] pci 0000:00:03.0: reg 0x10: [mem 0xf7218000-0xf721bfff 64bit]
>[    0.259769] pci 0000:00:04.0: [8086:1603] type 00 class 0x118000
>[    0.259779] pci 0000:00:04.0: reg 0x10: [mem 0xf7210000-0xf7217fff 64bit]
>[    0.259871] pci 0000:00:14.0: [8086:9cb1] type 00 class 0x0c0330
>[    0.259886] pci 0000:00:14.0: reg 0x10: [mem 0xf7200000-0xf720ffff 64bit]
>[    0.259938] pci 0000:00:14.0: PME# supported from D3hot D3cold
>[    0.259980] pci 0000:00:14.0: System wakeup disabled by ACPI
>[    0.260010] pci 0000:00:16.0: [8086:9cba] type 00 class 0x078000
>[    0.260026] pci 0000:00:16.0: reg 0x10: [mem 0xf7221000-0xf722101f 64bit]
>[    0.260080] pci 0000:00:16.0: PME# supported from D0 D3hot D3cold
>[    0.260147] pci 0000:00:1c.0: [8086:9c90] type 01 class 0x060400
>[    0.260208] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold
>[    0.260253] pci 0000:00:1c.0: System wakeup disabled by ACPI
>[    0.260280] pci 0000:00:1c.3: [8086:9c96] type 01 class 0x060400
>[    0.260344] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold
>[    0.260383] pci 0000:00:1c.3: System wakeup disabled by ACPI
>[    0.260419] pci 0000:00:1f.0: [8086:9cc3] type 00 class 0x060100
>[    0.260579] pci 0000:00:1f.2: [8086:9c83] type 00 class 0x010601
>[    0.260591] pci 0000:00:1f.2: reg 0x10: [io  0xf0b0-0xf0b7]
>[    0.260597] pci 0000:00:1f.2: reg 0x14: [io  0xf0a0-0xf0a3]
>[    0.260603] pci 0000:00:1f.2: reg 0x18: [io  0xf090-0xf097]
>[    0.260608] pci 0000:00:1f.2: reg 0x1c: [io  0xf080-0xf083]
>[    0.260614] pci 0000:00:1f.2: reg 0x20: [io  0xf060-0xf07f]
>[    0.260620] pci 0000:00:1f.2: reg 0x24: [mem 0xf721e000-0xf721e7ff]
>[    0.260652] pci 0000:00:1f.2: PME# supported from D3hot
>[    0.260708] pci 0000:00:1f.3: [8086:9ca2] type 00 class 0x0c0500
>[    0.260720] pci 0000:00:1f.3: reg 0x10: [mem 0xf721d000-0xf721d0ff 64bit]
>[    0.260736] pci 0000:00:1f.3: reg 0x20: [io  0xf040-0xf05f]
>[    0.260812] pci 0000:00:1f.6: [8086:9ca4] type 00 class 0x118000
>[    0.260838] pci 0000:00:1f.6: reg 0x10: [mem 0xf721c000-0xf721cfff 64bit]
>[    0.261055] pci 0000:01:00.0: [10ec:5249] type 00 class 0xff0000
>[    0.261074] pci 0000:01:00.0: reg 0x10: [mem 0xf7100000-0xf7100fff]
>[    0.261193] pci 0000:01:00.0: supports D1 D2
>[    0.261194] pci 0000:01:00.0: PME# supported from D1 D2 D3hot D3cold
>[    0.261228] pci 0000:01:00.0: System wakeup disabled by ACPI
>[    0.266997] pci 0000:00:1c.0: PCI bridge to [bus 01]
>[    0.267001] pci 0000:00:1c.0:   bridge window [mem 0xf7100000-0xf71fffff]
>[    0.267106] pci 0000:02:00.0: [8086:095a] type 00 class 0x028000
>[    0.267146] pci 0000:02:00.0: reg 0x10: [mem 0xf7000000-0xf7001fff 64bit]
>[    0.267326] pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
>[    0.267370] pci 0000:02:00.0: System wakeup disabled by ACPI
>[    0.273695] pci 0000:00:1c.3: PCI bridge to [bus 02]
>[    0.273699] pci 0000:00:1c.3:   bridge window [mem 0xf7000000-0xf70fffff]
>[    0.273731] acpi PNP0A08:00: Disabling ASPM (FADT indicates it is unsupported)
>[    0.277673] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.277711] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.277749] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.277785] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.277821] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.277858] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.277895] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.277930] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled.
>[    0.279058] ACPI: Enabled 3 GPEs in block 00 to 7F
>[    0.279103] ACPI : EC: GPE = 0x27, I/O: command/status = 0x934, data = 0x930
>[    0.279185] vgaarb: setting as boot device: PCI:0000:00:02.0
>[    0.279187] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
>[    0.279189] vgaarb: loaded
>[    0.279190] vgaarb: bridge control possible 0000:00:02.0
>[    0.279276] PCI: Using ACPI for IRQ routing
>[    0.280452] PCI: pci_cache_line_size set to 64 bytes
>[    0.280486] e820: reserve RAM buffer [mem 0x00058000-0x0005ffff]
>[    0.280487] e820: reserve RAM buffer [mem 0x0009e000-0x0009ffff]
>[    0.280488] e820: reserve RAM buffer [mem 0xc6433000-0xc7ffffff]
>[    0.280489] e820: reserve RAM buffer [mem 0xdaddc000-0xdbffffff]
>[    0.280490] e820: reserve RAM buffer [mem 0xdbaff000-0xdbffffff]
>[    0.280491] e820: reserve RAM buffer [mem 0x21e800000-0x21fffffff]
>[    0.280574] NetLabel: Initializing
>[    0.280575] NetLabel:  domain hash size = 128
>[    0.280576] NetLabel:  protocols = UNLABELED CIPSOv4
>[    0.280585] NetLabel:  unlabeled traffic allowed by default
>[    0.280603] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0
>[    0.280607] hpet0: 8 comparators, 64-bit 14.318180 MHz counter
>[    0.282630] Switched to clocksource hpet
>[    0.286504] pnp: PnP ACPI init
>[    0.286664] system 00:00: [io  0x0680-0x069f] has been reserved
>[    0.286667] system 00:00: [io  0xffff] has been reserved
>[    0.286668] system 00:00: [io  0xffff] has been reserved
>[    0.286670] system 00:00: [io  0xffff] has been reserved
>[    0.286672] system 00:00: [io  0x1800-0x18fe] could not be reserved
>[    0.286673] system 00:00: [io  0x164e-0x164f] has been reserved
>[    0.286676] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.286720] pnp 00:01: Plug and Play ACPI device, IDs PNP0b00 (active)
>[    0.286753] system 00:02: [io  0x1854-0x1857] has been reserved
>[    0.286755] system 00:02: Plug and Play ACPI device, IDs INT3f0d PNP0c02 (active)
>[    0.286874] pnp 00:03: Plug and Play ACPI device, IDs PNP0303 (active)
>[    0.286894] pnp 00:04: Plug and Play ACPI device, IDs DLL0665 PNP0f13 (active)
>[    0.287016] system 00:05: [mem 0xfed1c000-0xfed1ffff] has been reserved
>[    0.287018] system 00:05: [mem 0xfed10000-0xfed17fff] has been reserved
>[    0.287019] system 00:05: [mem 0xfed18000-0xfed18fff] has been reserved
>[    0.287021] system 00:05: [mem 0xfed19000-0xfed19fff] has been reserved
>[    0.287023] system 00:05: [mem 0xf8000000-0xfbffffff] has been reserved
>[    0.287025] system 00:05: [mem 0xfed20000-0xfed3ffff] has been reserved
>[    0.287027] system 00:05: [mem 0xfed90000-0xfed93fff] could not be reserved
>[    0.287028] system 00:05: [mem 0xfed45000-0xfed8ffff] could not be reserved
>[    0.287030] system 00:05: [mem 0xff000000-0xffffffff] has been reserved
>[    0.287032] system 00:05: [mem 0xfee00000-0xfeefffff] could not be reserved
>[    0.287033] system 00:05: [mem 0xf7fe0000-0xf7feffff] has been reserved
>[    0.287035] system 00:05: [mem 0xf7ff0000-0xf7ffffff] has been reserved
>[    0.287037] system 00:05: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.287416] system 00:06: [mem 0xfe102000-0xfe102fff] has been reserved
>[    0.287418] system 00:06: [mem 0xfe104000-0xfe104fff] has been reserved
>[    0.287419] system 00:06: [mem 0xfe106000-0xfe106fff] has been reserved
>[    0.287421] system 00:06: Plug and Play ACPI device, IDs PNP0c02 (active)
>[    0.291265] pnp: PnP ACPI: found 7 devices
>[    0.297428] pci 0000:00:1c.0: PCI bridge to [bus 01]
>[    0.297432] pci 0000:00:1c.0:   bridge window [mem 0xf7100000-0xf71fffff]
>[    0.297438] pci 0000:00:1c.3: PCI bridge to [bus 02]
>[    0.297441] pci 0000:00:1c.3:   bridge window [mem 0xf7000000-0xf70fffff]
>[    0.297448] pci_bus 0000:00: resource 4 [io  0x0000-0x0cf7 window]
>[    0.297449] pci_bus 0000:00: resource 5 [io  0x0d00-0xffff window]
>[    0.297451] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window]
>[    0.297452] pci_bus 0000:00: resource 7 [mem 0x000c0000-0x000c3fff window]
>[    0.297453] pci_bus 0000:00: resource 8 [mem 0x000c4000-0x000c7fff window]
>[    0.297455] pci_bus 0000:00: resource 9 [mem 0x000c8000-0x000cbfff window]
>[    0.297456] pci_bus 0000:00: resource 10 [mem 0x000cc000-0x000cffff window]
>[    0.297457] pci_bus 0000:00: resource 11 [mem 0x000d0000-0x000d3fff window]
>[    0.297458] pci_bus 0000:00: resource 12 [mem 0x000d4000-0x000d7fff window]
>[    0.297460] pci_bus 0000:00: resource 13 [mem 0x000d8000-0x000dbfff window]
>[    0.297461] pci_bus 0000:00: resource 14 [mem 0x000dc000-0x000dffff window]
>[    0.297462] pci_bus 0000:00: resource 15 [mem 0xdf800000-0xfeafffff window]
>[    0.297463] pci_bus 0000:01: resource 1 [mem 0xf7100000-0xf71fffff]
>[    0.297465] pci_bus 0000:02: resource 1 [mem 0xf7000000-0xf70fffff]
>[    0.297489] NET: Registered protocol family 2
>[    0.297629] TCP established hash table entries: 65536 (order: 7, 524288 bytes)
>[    0.297739] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes)
>[    0.297843] TCP: Hash tables configured (established 65536 bind 65536)
>[    0.297860] TCP: reno registered
>[    0.297868] UDP hash table entries: 4096 (order: 5, 131072 bytes)
>[    0.297889] UDP-Lite hash table entries: 4096 (order: 5, 131072 bytes)
>[    0.297933] NET: Registered protocol family 1
>[    0.297945] pci 0000:00:02.0: Video device with shadowed ROM
>[    0.298123] PCI: CLS 64 bytes, default 64
>[    0.298156] Unpacking initramfs...
>[    0.346754] Freeing initrd memory: 3440K (ffff880037938000 - ffff880037c94000)
>[    0.346769] dmar: ACPI device "INTL9C60:00" under DMAR at fed91000 as 00:15.0
>[    0.346773] dmar: ACPI device "INT3438:00" under DMAR at fed91000 as 00:13.0
>[    0.346780] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
>[    0.346782] software IO TLB [mem 0xd2ce2000-0xd6ce2000] (64MB) mapped at [ffff8800d2ce2000-ffff8800d6ce1fff]
>[    0.346947] microcode: CPU0 sig=0x306d4, pf=0x40, revision=0x1d
>[    0.346954] microcode: CPU1 sig=0x306d4, pf=0x40, revision=0x1d
>[    0.346959] microcode: CPU2 sig=0x306d4, pf=0x40, revision=0x1d
>[    0.346964] microcode: CPU3 sig=0x306d4, pf=0x40, revision=0x1d
>[    0.346998] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba
>[    0.347020] Scanning for low memory corruption every 60 seconds
>[    0.347219] futex hash table entries: 1024 (order: 4, 65536 bytes)
>[    0.347233] Initialise system trusted keyring
>[    0.347449] HugeTLB registered 2 MB page size, pre-allocated 0 pages
>[    0.348491] zpool: loaded
>[    0.348492] zbud: loaded
>[    0.348607] VFS: Disk quotas dquot_6.5.2
>[    0.348630] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
>[    0.348745] Key type big_key registered
>[    0.348894] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
>[    0.348924] io scheduler noop registered
>[    0.348927] io scheduler deadline registered (default)
>[    0.348948] io scheduler cfq registered
>[    0.349282] pcieport 0000:00:1c.0: Signaling PME through PCIe PME interrupt
>[    0.349284] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt
>[    0.349287] pcie_pme 0000:00:1c.0:pcie01: service driver pcie_pme loaded
>[    0.349297] pcieport 0000:00:1c.3: Signaling PME through PCIe PME interrupt
>[    0.349298] pci 0000:02:00.0: Signaling PME through PCIe PME interrupt
>[    0.349301] pcie_pme 0000:00:1c.3:pcie01: service driver pcie_pme loaded
>[    0.349306] pci_hotplug: PCI Hot Plug PCI Core version: 0.5
>[    0.349319] pciehp: PCI Express Hot Plug Controller Driver version: 0.4
>[    0.349334] efifb: probing for efifb
>[    0.349359] efifb: framebuffer at 0xe0000000, mapped to 0xffffc90005080000, using 5120k, total 5120k
>[    0.349360] efifb: mode is 1280x1024x32, linelength=5120, pages=1
>[    0.349361] efifb: scrolling: redraw
>[    0.349362] efifb: Truecolor: size=8:8:8:8, shift=24:16:8:0
>[    0.352041] Console: switching to colour frame buffer device 160x64
>[    0.354654] fb0: EFI VGA frame buffer device
>[    0.354660] intel_idle: MWAIT substates: 0x11142120
>[    0.354661] intel_idle: v0.4 model 0x3D
>[    0.354661] intel_idle: lapic_timer_reliable_states 0xffffffff
>[    0.354864] GHES: HEST is not enabled!
>[    0.354909] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
>[    0.355219] Linux agpgart interface v0.103
>[    0.355251] Loaded prism54 driver, version 1.2
>[    0.355268] rtc_cmos 00:01: RTC can wake from S4
>[    0.355378] rtc_cmos 00:01: rtc core: registered rtc_cmos as rtc0
>[    0.355402] rtc_cmos 00:01: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
>[    0.355412] Intel P-state driver initializing.
>[    0.355523] ledtrig-cpu: registered to indicate activity on CPUs
>[    0.355793] TCP: cubic registered
>[    0.356048] NET: Registered protocol family 10
>[    0.356458] NET: Registered protocol family 17
>[    0.357116] Loading compiled-in X.509 certificates
>[    0.357140] registered taskstats version 1
>[    0.357991]   Magic number: 11:397:126
>[    0.358018] platform INT3432:00: hash matches
>[    0.358046] acpi INT3432:00: hash matches
>[    0.358069] acpi device:01: hash matches
>[    0.358143] rtc_cmos 00:01: setting system clock to 2015-04-01 12:07:08 UTC (1427890028)
>[    0.358425] PM: Hibernation image not present or could not be loaded.
>[    0.359053] Freeing unused kernel memory: 1140K (ffffffff818df000 - ffffffff819fc000)
>[    0.359056] Write protecting the kernel read-only data: 8192k
>[    0.359799] Freeing unused kernel memory: 668K (ffff880001559000 - ffff880001600000)
>[    0.360046] Freeing unused kernel memory: 320K (ffff8800017b0000 - ffff880001800000)
>[    0.369873] random: systemd-tmpfile urandom read with 5 bits of entropy available
>[    0.383231] sdhci: Secure Digital Host Controller Interface driver
>[    0.383234] sdhci: Copyright(c) Pierre Ossman
>[    0.384931] i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq 1,12
>[    0.385477] i8042: Warning: Keylock active
>[    0.387631] serio: i8042 KBD port at 0x60,0x64 irq 1
>[    0.387673] serio: i8042 AUX port at 0x60,0x64 irq 12
>[    0.390102] rtsx_pci 0000:01:00.0: enabling device (0000 -> 0002)
>[    0.390232] rtsx_pci 0000:01:00.0: rtsx_pci_acquire_irq: pcr->msi_en = 1, pci->irq = 44
>[    0.390274] ACPI: bus type USB registered
>[    0.390293] usbcore: registered new interface driver usbfs
>[    0.390301] usbcore: registered new interface driver hub
>[    0.390324] usbcore: registered new device driver usb
>[    0.391047] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    0.391052] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 1
>[    0.391116] xhci_hcd 0000:00:14.0: hcc params 0x200077c1 hci version 0x100 quirks 0x00001810
>[    0.391120] xhci_hcd 0000:00:14.0: cache line size of 64 is not supported
>[    0.391299] hub 1-0:1.0: USB hub found
>[    0.391313] hub 1-0:1.0: 11 ports detected
>[    0.392038] SCSI subsystem initialized
>[    0.393262] libata version 3.00 loaded.
>[    0.395277] xhci_hcd 0000:00:14.0: xHCI Host Controller
>[    0.395282] xhci_hcd 0000:00:14.0: new USB bus registered, assigned bus number 2
>[    0.395451] hub 2-0:1.0: USB hub found
>[    0.395458] hub 2-0:1.0: 4 ports detected
>[    0.397365] ahci 0000:00:1f.2: version 3.0
>[    0.397625] ahci 0000:00:1f.2: SSS flag set, parallel bus scan disabled
>[    0.403382] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input0
>[    0.409427] ahci 0000:00:1f.2: AHCI 0001.0300 32 slots 4 ports 6 Gbps 0x8 impl SATA mode
>[    0.409430] ahci 0000:00:1f.2: flags: 64bit ncq stag pm led clo only pio slum part deso sadm sds apst 
>[    0.409866] scsi host0: ahci
>[    0.409967] scsi host1: ahci
>[    0.410048] scsi host2: ahci
>[    0.410127] scsi host3: ahci
>[    0.410163] ata1: DUMMY
>[    0.410164] ata2: DUMMY
>[    0.410165] ata3: DUMMY
>[    0.410167] ata4: SATA max UDMA/133 abar m2048@0xf721e000 port 0xf721e280 irq 46
>[    0.729637] ata4: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>[    0.731603] ata4.00: failed to get NCQ Send/Recv Log Emask 0x1
>[    0.731606] ata4.00: ATA-9: SAMSUNG SSD PM851 M.2 2280 256GB, EXT25D0Q, max UDMA/133
>[    0.731608] ata4.00: 500118192 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
>[    0.731933] ata4.00: failed to get NCQ Send/Recv Log Emask 0x1
>[    0.732000] ata4.00: configured for UDMA/133
>[    0.732144] scsi 3:0:0:0: Direct-Access     ATA      SAMSUNG SSD PM85 5D0Q PQ: 0 ANSI: 5
>[    0.733815] sd 3:0:0:0: [sda] 500118192 512-byte logical blocks: (256 GB/238 GiB)
>[    0.733911] sd 3:0:0:0: [sda] Write Protect is off
>[    0.733914] sd 3:0:0:0: [sda] Mode Sense: 00 3a 00 00
>[    0.733939] sd 3:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>[    0.735683]  sda: sda1 sda2 sda3 sda4
>[    0.736068] sd 3:0:0:0: [sda] Attached SCSI disk
>[    0.752996] usb 1-3: new full-speed USB device number 2 using xhci_hcd
>[    0.926965] usb 1-3: No LPM exit latency info found, disabling LPM.
>[    1.045826] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: (null)
>[    1.086494] usb 1-4: new full-speed USB device number 3 using xhci_hcd
>[    1.137079] systemd[1]: Cannot add dependency job for unit acpid.service, ignoring: Unit acpid.service failed to load: No such file or directory.
>[    1.156203] EXT4-fs (sda2): re-mounted. Opts: data=ordered
>[    1.160392] vboxdrv: Found 4 processor cores.
>[    1.163522] vboxdrv: fAsync=0 offMin=0x186 offMax=0x2113
>[    1.163606] vboxdrv: TSC mode is 'synchronous', kernel timer mode is 'normal'.
>[    1.163608] vboxdrv: Successfully loaded version 4.3.26_OSE (interface 0x001a000a).
>[    1.261547] usb 1-4: ep 0x2 - rounding interval to 64 microframes, ep desc says 80 microframes
>[    1.279640] vboxpci: IOMMU not found (not registered)
>[    1.337161] ACPI: AC Adapter [AC] (off-line)
>[    1.337350] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input2
>[    1.339338] ACPI: Lid Switch [LID0]
>[    1.339399] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input3
>[    1.339402] ACPI: Power Button [PBTN]
>[    1.339433] input: Sleep Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0E:00/input/input4
>[    1.339435] ACPI: Sleep Button [SBTN]
>[    1.339467] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input5
>[    1.339469] ACPI: Power Button [PWRF]
>[    1.340645] ACPI Warning: \_SB_.IETM._ART: Return Package type mismatch at index 0 - found Integer, expected Reference (20150204/nspredef-297)
>[    1.340704] ACPI: Invalid package element [0]: got number, expecting [R]
>[    1.340706] _ART package 0 is invalid, ignored
>[    1.340960] thermal LNXTHERM:00: registered as thermal_zone0
>[    1.340963] ACPI: Thermal Zone [THM] (25 C)
>[    1.343961] thermal LNXTHERM:01: registered as thermal_zone2
>[    1.343963] ACPI: Thermal Zone [TZ00] (53 C)
>[    1.346665] thermal LNXTHERM:02: registered as thermal_zone3
>[    1.346667] ACPI: Thermal Zone [TZ01] (53 C)
>[    1.350090] tsc: Refined TSC clocksource calibration: 2593.995 MHz
>[    1.351847] systemd-journald[129]: Received request to flush runtime journal from PID 1
>[    1.381613] ACPI: Battery Slot [BAT0] (battery present)
>[    1.401084] wmi: Mapper loaded
>[    1.403827] proc_thermal 0000:00:04.0: enabling device (0000 -> 0002)
>[    1.408635] hidraw: raw HID events driver (C) Jiri Kosina
>[    1.415171] [drm] Initialized drm 1.1.0 20060810
>[    1.422071] dw_dmac INTL9C60:00: DesignWare DMA Controller, 8 channels
>[    1.423362] usb 1-5: new high-speed USB device number 4 using xhci_hcd
>[    1.423958] random: nonblocking pool is initialized
>[    1.424929] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4
>[    1.424945] snd_hda_intel 0000:00:03.0: enabling device (0000 -> 0002)
>[    1.440361] [drm:i915_dump_device_info] i915 device info: gen=8, pciid=0x1616 rev=0x09 flags=is_mobile,need_gfx_hws,has_fbc,has_hotplug,has_llc,has_ddi,has_fpga_dbg,
>[    1.440380] [drm:intel_detect_pch] Found LynxPoint LP PCH
>[    1.440463] [drm] Memory usable by graphics device = 4096M
>[    1.440466] [drm:i915_gem_gtt_init] GMADR size = 256M
>[    1.440467] [drm:i915_gem_gtt_init] GTT stolen size = 32M
>[    1.440468] [drm:i915_gem_gtt_init] ppgtt mode: 2
>[    1.440471] checking generic (e0000000 500000) vs hw (e0000000 10000000)
>[    1.440472] fb: switching to inteldrmfb from EFI VGA
>[    1.440490] Console: switching to colour dummy device 80x25
>[    1.440582] [drm] Replacing VGA console driver
>[    1.441187] [drm:intel_opregion_setup] graphic opregion physical addr: 0xdb7f5018
>[    1.441198] [drm:intel_opregion_setup] Public ACPI methods supported
>[    1.441199] [drm:intel_opregion_setup] SWSCI supported
>[    1.441201] [drm] ACPI BIOS requests an excessive sleep of 20000 ms, using 1500 ms instead
>[    1.451825] input: PC Speaker as /devices/platform/pcspkr/input/input6
>[    1.456631] cfg80211: Calling CRDA to update world regulatory domain
>[    1.462236] [drm:swsci_setup] SWSCI GBDA callbacks 00000cb3, SBCB callbacks 00700583
>[    1.462239] [drm:intel_opregion_setup] ASLE supported
>[    1.462437] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>[    1.462438] [drm] Driver supports precise vblank timestamp query.
>[    1.462441] [drm:init_vbt_defaults] Set default to SSC at 120000 kHz
>[    1.462444] [drm:validate_vbt] Using VBT from OpRegion: $VBT HASWELL        d
>[    1.462446] [drm:parse_general_features] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>[    1.462447] [drm:parse_general_definitions] crt_ddc_bus_pin: 0
>[    1.462449] [drm:parse_lfp_panel_data] DRRS supported mode is seamless
>[    1.462451] [drm:parse_lfp_panel_data] Found panel mode in BIOS VBT tables:
>[    1.462455] [drm:drm_mode_debug_printmodeline] Modeline 0:"1366x768" 0 69300 1366 1398 1430 1470 768 771 776 786 0x8 0xa
>[    1.462456] [drm:parse_lfp_panel_data] VBT initial LVDS value 300
>[    1.462458] [drm:parse_lfp_backlight] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 10, level 255
>[    1.462461] [drm:parse_sdvo_panel_data] Found SDVO panel mode in BIOS VBT tables:
>[    1.462463] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 0 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x8 0xa
>[    1.462465] [drm:parse_sdvo_device_mapping] No SDVO device info is found in VBT
>[    1.462467] [drm:parse_driver_features] DRRS State Enabled:0
>[    1.462468] [drm:parse_edp] VBT has unknown eDP link rate value 2
>[    1.462471] [drm:parse_ddi_port] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>[    1.462472] [drm:parse_ddi_port] VBT HDMI level shift for port A: 0
>[    1.462474] [drm:parse_ddi_port] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>[    1.462475] [drm:parse_ddi_port] VBT HDMI level shift for port B: 6
>[    1.462507] [drm:intel_dsm_pci_probe] no _DSM method for intel device
>[    1.462513] [drm:i915_gem_init_stolen] found 33554432 bytes of stolen memory at dd800000
>[    1.462516] [drm:intel_display_power_get] enabling always-on
>[    1.462517] [drm:intel_display_power_get] enabling display
>[    1.463757] [drm:intel_print_wm_latency] Primary WM0 latency 20 (2.0 usec)
>[    1.463760] [drm:intel_print_wm_latency] Primary WM1 latency 50 (25.0 usec)
>[    1.463762] [drm:intel_print_wm_latency] Primary WM2 latency 90 (45.0 usec)
>[    1.463764] [drm:intel_print_wm_latency] Primary WM3 latency 130 (65.0 usec)
>[    1.463765] [drm:intel_print_wm_latency] Primary WM4 latency 160 (80.0 usec)
>[    1.463767] [drm:intel_print_wm_latency] Sprite WM0 latency 20 (2.0 usec)
>[    1.463769] [drm:intel_print_wm_latency] Sprite WM1 latency 50 (25.0 usec)
>[    1.463771] [drm:intel_print_wm_latency] Sprite WM2 latency 90 (45.0 usec)
>[    1.463772] [drm:intel_print_wm_latency] Sprite WM3 latency 130 (65.0 usec)
>[    1.463774] [drm:intel_print_wm_latency] Sprite WM4 latency 160 (80.0 usec)
>[    1.463776] [drm:intel_print_wm_latency] Cursor WM0 latency 20 (2.0 usec)
>[    1.463777] [drm:intel_print_wm_latency] Cursor WM1 latency 50 (25.0 usec)
>[    1.463779] [drm:intel_print_wm_latency] Cursor WM2 latency 90 (45.0 usec)
>[    1.463780] [drm:intel_print_wm_latency] Cursor WM3 latency 130 (65.0 usec)
>[    1.463782] [drm:intel_print_wm_latency] Cursor WM4 latency 160 (80.0 usec)
>[    1.463784] [drm:intel_modeset_init] 3 display pipes available.
>[    1.463799] [drm:intel_ddi_pll_init] CDCLK running at 540000KHz
>[    1.463803] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem
>[    1.464741] [drm:intel_dp_init_connector] Adding eDP connector on port A
>[    1.464796] [drm:intel_dp_init_panel_power_sequencer] cur t1_t3 0 t8 0 t9 0 t10 500 t11_t12 6000
>[    1.464798] [drm:intel_dp_init_panel_power_sequencer] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 5000
>[    1.464800] [drm:intel_dp_init_panel_power_sequencer] panel power up delay 200, power down delay 50, power cycle delay 600
>[    1.464802] [drm:intel_dp_init_panel_power_sequencer] backlight on delay 1, off delay 200
>[    1.464804] [drm:intel_dp_aux_init] registering DPDDC-A bus for card0-eDP-1
>[    1.464851] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    1.464858] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[    1.465980] [drm:intel_dp_get_dpcd] DPCD: 12 14 84 40 00 00 01 01 02 00 00 00 00 0b 00
>[    1.466274] [drm:intel_dp_get_dpcd] Detected EDP PSR Panel.
>[    1.466283] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af06
>[    1.468153] AVX2 version of gcm_enc/dec engaged.
>[    1.468156] AES CTR mode by8 optimization enabled
>[    1.475258] Intel(R) Wireless WiFi driver for Linux
>[    1.475261] Copyright(c) 2003- 2014 Intel Corporation
>[    1.475312] iwlwifi 0000:02:00.0: enabling device (0000 -> 0002)
>[    1.495368] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    1.495373] [drm:intel_dp_drrs_init] VBT doesn't support DRRS
>[    1.495379] [drm:intel_panel_setup_backlight] Connector eDP-1 backlight initialized, enabled, brightness 543/937
>[    1.495391] [drm:intel_dp_init_connector] Adding DP connector on port B
>[    1.495446] [drm:intel_dp_aux_init] registering DPDDC-B bus for card0-DP-1
>[    1.502241] Adding 7812092k swap on /dev/sda3.  Priority:-1 extents:1 across:7812092k SSFS
>[    1.506879] iwlwifi 0000:02:00.0: loaded firmware version 25.15.12.0 op_mode iwlmvm
>[    1.513976] [drm:intel_modeset_readout_hw_state] [CRTC:20] hw state readout: enabled
>[    1.513980] [drm:intel_modeset_readout_hw_state] [CRTC:24] hw state readout: disabled
>[    1.513983] [drm:intel_modeset_readout_hw_state] [CRTC:28] hw state readout: disabled
>[    1.513986] [drm:intel_modeset_readout_hw_state] WRPLL 1 hw state readout: crtc_mask 0x00000000, on 0
>[    1.513988] [drm:intel_modeset_readout_hw_state] WRPLL 2 hw state readout: crtc_mask 0x00000000, on 0
>[    1.513992] [drm:intel_ddi_get_config] pipe has 24 bpp for eDP panel, overriding BIOS-provided max 18 bpp
>[    1.513994] [drm:intel_modeset_readout_hw_state] [ENCODER:30:TMDS-30] hw state readout: enabled, pipe A
>[    1.513996] [drm:intel_modeset_readout_hw_state] [ENCODER:38:TMDS-38] hw state readout: disabled, pipe A
>[    1.513998] [drm:intel_modeset_readout_hw_state] [ENCODER:40:DP MST-40] hw state readout: disabled, pipe A
>[    1.514000] [drm:intel_modeset_readout_hw_state] [ENCODER:41:DP MST-41] hw state readout: disabled, pipe B
>[    1.514001] [drm:intel_modeset_readout_hw_state] [ENCODER:42:DP MST-42] hw state readout: disabled, pipe C
>[    1.514004] [drm:intel_modeset_readout_hw_state] [CONNECTOR:31:eDP-1] hw state readout: enabled
>[    1.514006] [drm:intel_modeset_readout_hw_state] [CONNECTOR:39:DP-1] hw state readout: disabled
>[    1.514008] [drm:intel_modeset_readout_hw_state] [CONNECTOR:43:HDMI-A-1] hw state readout: disabled
>[    1.514013] [drm:intel_dump_pipe_config] [CRTC:20][setup_hw_state] config for pipe A
>[    1.514014] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    1.514016] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    1.514018] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.514020] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 362389, link_n: 524288, tu: 64
>[    1.514022] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.514024] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.514025] [drm:intel_dump_pipe_config] requested mode:
>[    1.514029] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 1280 0 0 0 1024 0 0 0 0x0 0x0
>[    1.514030] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.514033] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0xa
>[    1.514036] [drm:intel_dump_crtc_timings] crtc timings: 373249 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x0 flags: 0xa
>[    1.514037] [drm:intel_dump_pipe_config] port clock: 540000
>[    1.514039] [drm:intel_dump_pipe_config] pipe src size: 1280x1024
>[    1.514041] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.514043] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x0c800708, enabled
>[    1.514044] [drm:intel_dump_pipe_config] ips: 0
>[    1.514046] [drm:intel_dump_pipe_config] double wide: 0
>[    1.514048] [drm:i915_get_vblank_timestamp] crtc 1 is disabled
>[    1.514050] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe B
>[    1.514052] [drm:i915_get_vblank_timestamp] crtc 1 is disabled
>[    1.514054] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe B
>[    1.514056] [drm:intel_dump_pipe_config] [CRTC:24][setup_hw_state] config for pipe B
>[    1.514058] [drm:intel_dump_pipe_config] cpu_transcoder: B
>[    1.514059] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    1.514061] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.514063] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.514065] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.514067] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.514068] [drm:intel_dump_pipe_config] requested mode:
>[    1.514071] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    1.514072] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.514075] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    1.514077] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    1.514078] [drm:intel_dump_pipe_config] port clock: 0
>[    1.514079] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    1.514081] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.514083] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    1.514084] [drm:intel_dump_pipe_config] ips: 0
>[    1.514085] [drm:intel_dump_pipe_config] double wide: 0
>[    1.514087] [drm:i915_get_vblank_timestamp] crtc 2 is disabled
>[    1.514089] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe C
>[    1.514091] [drm:i915_get_vblank_timestamp] crtc 2 is disabled
>[    1.514093] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe C
>[    1.514094] [drm:intel_dump_pipe_config] [CRTC:28][setup_hw_state] config for pipe C
>[    1.514096] [drm:intel_dump_pipe_config] cpu_transcoder: C
>[    1.514097] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0
>[    1.514099] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.514101] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.514103] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.514105] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.514106] [drm:intel_dump_pipe_config] requested mode:
>[    1.514109] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    1.514110] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.514113] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    1.514115] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>[    1.514117] [drm:intel_dump_pipe_config] port clock: 0
>[    1.514118] [drm:intel_dump_pipe_config] pipe src size: 0x0
>[    1.514120] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.514122] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    1.514123] [drm:intel_dump_pipe_config] ips: 0
>[    1.514125] [drm:intel_dump_pipe_config] double wide: 0
>[    1.514130] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1]
>[    1.514133] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[    1.514136] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[    1.514138] [drm:check_encoder_state] [ENCODER:40:DP MST-40]
>[    1.514139] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[    1.514141] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[    1.514143] [drm:check_crtc_state] [CRTC:20]
>[    1.514149] [drm:check_crtc_state] [CRTC:24]
>[    1.514151] [drm:check_crtc_state] [CRTC:28]
>[    1.514153] [drm:check_shared_dpll_state] WRPLL 1
>[    1.514155] [drm:check_shared_dpll_state] WRPLL 2
>[    1.514161] [drm:ironlake_get_initial_plane_config] pipe A with fb: size=1280x1024@32, offset=0, pitch 5120, size 0x500000
>[    1.514163] [drm:i915_gem_object_create_stolen_for_preallocated] creating preallocated stolen object: stolen_offset=0, gtt_offset=0, size=500000
>[    1.514167] [drm:i915_pages_create_for_stolen] offset=0x0, size=5242880
>[    1.514171] [drm:intel_alloc_plane_obj] plane fb obj ffff8800d942c000
>[    1.514173] [drm:drm_atomic_set_fb_for_plane] Set [FB:45] for plane state ffff88021314df00
>[    1.514216] [drm:i915_gem_setup_global_gtt] reserving preallocated space: 0 + 500000
>[    1.514219] [drm:i915_gem_setup_global_gtt] clearing unused GTT space: [500000, fffff000]
>[    1.514710] EXT4-fs (sda4): mounted filesystem with ordered data mode. Opts: data=ordered
>[    1.522193] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    1.522197] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    1.522201] [drm:i915_gem_context_init] LR context support initialized
>[    1.522306] [drm:intel_init_pipe_control] render ring pipe control offset: 0x00534000
>[    1.522462] [drm:gen8_init_common_ring] Execlists enabled for render ring
>[    1.522468] [drm:gen8_init_common_ring] Execlists enabled for bsd ring
>[    1.522471] [drm:gen8_init_common_ring] Execlists enabled for blitter ring
>[    1.522474] [drm:gen8_init_common_ring] Execlists enabled for video enhancement ring
>[    1.522622] [drm:intel_backlight_device_register] Connector eDP-1 backlight sysfs interface registered
>[    1.522644] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[    1.522646] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[    1.522650] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] status updated from 3 to 1
>[    1.522662] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    1.522665] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[    1.522669] [drm:drm_mode_debug_printmodeline] Modeline 32:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    1.522671] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[    1.522673] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[    1.522677] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] status updated from 3 to 2
>[    1.522679] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[    1.522681] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[    1.522683] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[    1.522839] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    1.522842] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    1.522844] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] status updated from 3 to 2
>[    1.522848] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[    1.522851] [drm:drm_setup_crtcs] 
>[    1.522853] [drm:drm_enable_connectors] connector 31 enabled? yes
>[    1.522854] [drm:drm_enable_connectors] connector 39 enabled? no
>[    1.522856] [drm:drm_enable_connectors] connector 43 enabled? no
>[    1.522858] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    1.522860] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[    1.522863] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 3200x1800
>[    1.522865] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    1.522867] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    1.522869] [drm:drm_setup_crtcs] desired mode 3200x1800 set on crtc 20 (0,0)
>[    1.522871] [drm:intelfb_create] no BIOS fb, allocating a new one
>[    1.522874] [drm:i915_gem_object_create_stolen] creating stolen object: size=15f9000
>[    1.522876] [drm:i915_pages_create_for_stolen] offset=0x500000, size=23040000
>[    1.524463] dcdbas dcdbas: Dell Systems Management Base Driver (version 5.6.0-3.2)
>[    1.524642] [drm:intelfb_create] allocated 3200x1800 fb: 0x0059c000, bo ffff8800d942d340
>[    1.524714] fbcon: inteldrmfb (fb0) is primary device
>[    1.524782] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037d01a20
>[    1.524785] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800d94cc900 state to ffff880037d01a20
>[    1.524787] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880213277400 state to ffff880037d01a20
>[    1.524788] [drm:drm_atomic_check_only] checking ffff880037d01a20
>[    1.524792] [drm:drm_atomic_commit] commiting ffff880037d01a20
>[    1.524807] [drm:intel_fbc_update] no output, disabling
>[    1.524809] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037d01a20
>[    1.524811] [drm:drm_atomic_state_free] Freeing atomic state ffff880037d01a20
>[    1.524812] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037d01a20
>[    1.524814] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800d94cc9c0 state to ffff880037d01a20
>[    1.524815] [drm:drm_atomic_check_only] checking ffff880037d01a20
>[    1.524816] [drm:drm_atomic_commit] commiting ffff880037d01a20
>[    1.524817] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037d01a20
>[    1.524818] [drm:drm_atomic_state_free] Freeing atomic state ffff880037d01a20
>[    1.524820] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037d01a20
>[    1.524821] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8800d94cca80 state to ffff880037d01a20
>[    1.524822] [drm:drm_atomic_check_only] checking ffff880037d01a20
>[    1.524823] [drm:drm_atomic_commit] commiting ffff880037d01a20
>[    1.524824] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037d01a20
>[    1.524825] [drm:drm_atomic_state_free] Freeing atomic state ffff880037d01a20
>[    1.524826] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037d01a20
>[    1.524828] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800d94ccb40 state to ffff880037d01a20
>[    1.524829] [drm:drm_atomic_check_only] checking ffff880037d01a20
>[    1.524829] [drm:drm_atomic_commit] commiting ffff880037d01a20
>[    1.524830] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037d01a20
>[    1.524831] [drm:drm_atomic_state_free] Freeing atomic state ffff880037d01a20
>[    1.524833] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037d01a20
>[    1.524834] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800d94ccc00 state to ffff880037d01a20
>[    1.524835] [drm:drm_atomic_check_only] checking ffff880037d01a20
>[    1.524836] [drm:drm_atomic_commit] commiting ffff880037d01a20
>[    1.524837] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037d01a20
>[    1.524838] [drm:drm_atomic_state_free] Freeing atomic state ffff880037d01a20
>[    1.524839] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037d01a20
>[    1.524841] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff8800d94cccc0 state to ffff880037d01a20
>[    1.524841] [drm:drm_atomic_check_only] checking ffff880037d01a20
>[    1.524843] [drm:drm_atomic_commit] commiting ffff880037d01a20
>[    1.524844] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037d01a20
>[    1.524844] [drm:drm_atomic_state_free] Freeing atomic state ffff880037d01a20
>[    1.524846] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037d01a20
>[    1.524847] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800d94ccd80 state to ffff880037d01a20
>[    1.524848] [drm:drm_atomic_check_only] checking ffff880037d01a20
>[    1.524849] [drm:drm_atomic_commit] commiting ffff880037d01a20
>[    1.524850] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037d01a20
>[    1.524851] [drm:drm_atomic_state_free] Freeing atomic state ffff880037d01a20
>[    1.524852] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037d01a20
>[    1.524854] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800d94cce40 state to ffff880037d01a20
>[    1.524854] [drm:drm_atomic_check_only] checking ffff880037d01a20
>[    1.524855] [drm:drm_atomic_commit] commiting ffff880037d01a20
>[    1.524857] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037d01a20
>[    1.524858] [drm:drm_atomic_state_free] Freeing atomic state ffff880037d01a20
>[    1.524859] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880037d01a20
>[    1.524861] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff8800d94ccf00 state to ffff880037d01a20
>[    1.524862] [drm:drm_atomic_check_only] checking ffff880037d01a20
>[    1.524863] [drm:drm_atomic_commit] commiting ffff880037d01a20
>[    1.524864] [drm:drm_atomic_state_clear] Clearing atomic state ffff880037d01a20
>[    1.524865] [drm:drm_atomic_state_free] Freeing atomic state ffff880037d01a20
>[    1.524867] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    1.524869] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set
>[    1.524872] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>[    1.524874] [drm:drm_mode_debug_printmodeline] Modeline 46:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    1.524876] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=1
>[    1.524877] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    1.524887] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    1.524889] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    1.524892] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[    1.524897] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[    1.524898] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[    1.524900] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    1.524901] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    1.524902] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    1.524903] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    1.524904] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    1.524905] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[    1.524907] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    1.524907] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    1.524908] [drm:intel_dump_pipe_config] requested mode:
>[    1.524910] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    1.524910] [drm:intel_dump_pipe_config] adjusted mode:
>[    1.524912] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    1.524913] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[    1.524914] [drm:intel_dump_pipe_config] port clock: 540000
>[    1.524915] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    1.524916] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    1.524917] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    1.524918] [drm:intel_dump_pipe_config] ips: 1
>[    1.524919] [drm:intel_dump_pipe_config] double wide: 0
>[    1.530105] [drm:intel_edp_backlight_off] 
>[    1.533483] iwlwifi 0000:02:00.0: Detected Intel(R) Dual Band Wireless AC 7265, REV=0x184
>[    1.533538] iwlwifi 0000:02:00.0: L1 Disabled - LTR Disabled
>[    1.533697] iwlwifi 0000:02:00.0: L1 Disabled - LTR Disabled
>[    1.536116] input: Dell WMI hotkeys as /devices/virtual/input/input8
>[    1.537321] intel_rapl: Found RAPL domain package
>[    1.537326] intel_rapl: Found RAPL domain core
>[    1.537328] intel_rapl: Found RAPL domain uncore
>[    1.537330] intel_rapl: Found RAPL domain dram
>[    1.537700] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>[    1.539474] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input9
>[    1.539894] snd_hda_intel 0000:00:03.0: bound 0000:00:02.0 (ops i915_audio_component_bind_ops [i915])
>[    1.539899] [drm] Initialized i915 1.6.0 20150130 for 0000:00:02.0 on minor 0
>[    1.540654] ACPI Warning: SystemIO range 0x000000000000f040-0x000000000000f05f conflicts with OpRegion 0x000000000000f040-0x000000000000f04f (\_SB_.PCI0.SBUS.SMBI) (20150204/utaddress-258)
>[    1.540655] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver
>[    1.546770] sst-acpi INT3438:00: DesignWare DMA Controller, 8 channels
>[    1.563756] iTCO_vendor_support: vendor-support=0
>[    1.564209] iTCO_wdt: Intel TCO WatchDog Timer Driver v1.11
>[    1.564247] iTCO_wdt: Found a Wildcat Point_LP TCO device (Version=2, TCOBASE=0x1860)
>[    1.564425] iTCO_wdt: initialized. heartbeat=30 sec (nowayout=0)
>[    1.566045] i2c_hid i2c-DLL0665:01: failed to retrieve report from device.
>[    1.568377] haswell-pcm-audio haswell-pcm-audio: FW loaded, mailbox readback FW info: type 01, - version: 00.00, build 77, source commit id: 876ac6906f31a43b6772b23c7c983ce9dcb18a19
>[    1.571175] input: HDA Intel HDMI HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:03.0/sound/card0/input10
>[    1.571263] input: HDA Intel HDMI HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:03.0/sound/card0/input11
>[    1.571333] input: HDA Intel HDMI HDMI/DP,pcm=8 as /devices/pci0000:00/0000:00:03.0/sound/card0/input12
>[    1.573193] broadwell-audio broadwell-audio: snd-soc-dummy-dai <-> System Pin mapping ok
>[    1.573251] broadwell-audio broadwell-audio: snd-soc-dummy-dai <-> Offload0 Pin mapping ok
>[    1.573306] broadwell-audio broadwell-audio: snd-soc-dummy-dai <-> Offload1 Pin mapping ok
>[    1.573358] broadwell-audio broadwell-audio: snd-soc-dummy-dai <-> Loopback Pin mapping ok
>[    1.573386] broadwell-audio broadwell-audio: rt286-aif1 <-> snd-soc-dummy-dai mapping ok
>[    1.574302] i2c_hid i2c-DLL0665:01: failed to retrieve report from device.
>[    1.575108] i2c_hid i2c-DLL0665:01: failed to retrieve report from device.
>[    1.576527] i2c_hid i2c-DLL0665:01: failed to retrieve report from device.
>[    1.576592] input: DLL0665:01 06CB:76AD UNKNOWN as /devices/pci0000:00/INT3433:00/i2c-1/i2c-DLL0665:01/0018:06CB:76AD.0001/input/input14
>[    1.576670] hid-multitouch 0018:06CB:76AD.0001: input,hidraw0: <UNKNOWN> HID v1.00 Mouse [DLL0665:01 06CB:76AD] on 
>[    1.581699] mousedev: PS/2 mouse device common for all mice
>[    1.599052] ieee80211 phy0: Selected rate control algorithm 'iwl-mvm-rs'
>[    1.599157] input: broadwell-rt286 Headset as /devices/pci0000:00/INT3438:00/broadwell-audio/sound/card1/input13
>[    1.602261] iwlwifi 0000:02:00.0 wlp2s0: renamed from wlan0
>[    1.673098] Bluetooth: Core ver 2.20
>[    1.673110] NET: Registered protocol family 31
>[    1.673111] Bluetooth: HCI device and connection manager initialized
>[    1.673114] Bluetooth: HCI socket layer initialized
>[    1.673116] Bluetooth: L2CAP socket layer initialized
>[    1.673121] Bluetooth: SCO socket layer initialized
>[    1.677347] input: ELAN Touchscreen as /devices/pci0000:00/0000:00:14.0/usb1/1-4/1-4:1.0/0003:04F3:20D0.0002/input/input16
>[    1.677658] usbcore: registered new interface driver btusb
>[    1.678732] hid-multitouch 0003:04F3:20D0.0002: input,hiddev0,hidraw1: USB HID v1.10 Device [ELAN Touchscreen] on usb-0000:00:14.0-4/input0
>[    1.678758] usbcore: registered new interface driver usbhid
>[    1.678759] usbhid: USB HID core driver
>[    1.691768] media: Linux media interface: v0.10
>[    1.695277] Bluetooth: hci0: read Intel version: 370810011002270d00
>[    1.695419] Linux video capture interface: v2.00
>[    1.695542] Bluetooth: hci0: Intel Bluetooth firmware file: intel/ibt-hw-37.8.10-fw-1.10.2.27.d.bseq
>[    1.700863] iwlwifi 0000:02:00.0: L1 Disabled - LTR Disabled
>[    1.701022] iwlwifi 0000:02:00.0: L1 Disabled - LTR Disabled
>[    1.703883] uvcvideo: Found UVC 1.00 device Integrated_Webcam_HD (0bda:5758)
>[    1.710106] input: Integrated_Webcam_HD as /devices/pci0000:00/0000:00:14.0/usb1/1-5/1-5:1.0/input/input18
>[    1.710191] usbcore: registered new interface driver uvcvideo
>[    1.710192] USB Video Class driver (1.1.1)
>[    1.733540] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[    1.740373] [drm:edp_panel_off] Turn eDP port A panel power off
>[    1.740377] [drm:wait_panel_off] Wait for panel power off time
>[    1.740380] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[    1.793578] [drm:wait_panel_status] Wait complete
>[    1.793590] [drm:drm_atomic_set_fb_for_plane] Set [FB:47] for plane state ffff8802135bc300
>[    1.793607] [drm:edp_panel_on] Turn eDP port A panel power on
>[    1.793608] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[    1.859399] Bluetooth: hci0: Intel Bluetooth firmware patch completed and activated
>[    2.344002] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[    2.344004] [drm:wait_panel_status] Wait complete
>[    2.344008] [drm:wait_panel_on] Wait for panel power on
>[    2.344011] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[    2.350794] Switched to clocksource tsc
>[    2.476832] cfg80211: Calling CRDA to update world regulatory domain
>[    2.557451] [drm:wait_panel_status] Wait complete
>[    2.557457] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
>[    2.557463] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[    2.558514] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[    2.559111] [drm:intel_dp_start_link_train] clock recovery OK
>[    2.560008] [drm:intel_dp_set_signal_levels] Using signal levels 08000000
>[    2.560896] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[    2.561124] [drm:intel_edp_backlight_on] 
>[    2.561125] [drm:intel_panel_enable_backlight] pipe A
>[    2.561130] [drm:intel_panel_actually_set_backlight] set backlight PWM = 543
>[    2.564058] [drm:intel_psr_match_conditions] PSR disable by flag
>[    2.564059] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS
>[    2.570761] [drm:ironlake_update_primary_plane] Writing base 0059C000 00000000 0 0 12800
>[    2.600814] [drm:intel_fbc_update] disabled per chip default
>[    2.600819] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1]
>[    2.600822] [drm:check_encoder_state] [ENCODER:30:TMDS-30]
>[    2.600823] [drm:check_encoder_state] [ENCODER:38:TMDS-38]
>[    2.600825] [drm:check_encoder_state] [ENCODER:40:DP MST-40]
>[    2.600825] [drm:check_encoder_state] [ENCODER:41:DP MST-41]
>[    2.600826] [drm:check_encoder_state] [ENCODER:42:DP MST-42]
>[    2.600827] [drm:check_crtc_state] [CRTC:20]
>[    2.600832] [drm:check_crtc_state] [CRTC:24]
>[    2.600833] [drm:check_crtc_state] [CRTC:28]
>[    2.600834] [drm:check_shared_dpll_state] WRPLL 1
>[    2.600835] [drm:check_shared_dpll_state] WRPLL 2
>[    2.600847] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    2.600849] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    2.600850] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.600851] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.600852] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[    2.600853] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[    2.600854] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.600854] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.600857] [drm:drm_fb_helper_hotplug_event] 
>[    2.600858] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[    2.600859] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[    2.600867] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    2.600869] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[    2.600871] [drm:drm_mode_debug_printmodeline] Modeline 32:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    2.600872] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[    2.600872] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[    2.600874] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[    2.600875] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[    2.600876] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[    2.601063] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    2.601065] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    2.601067] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[    2.601071] [drm:drm_setup_crtcs] 
>[    2.601072] [drm:drm_enable_connectors] connector 31 enabled? yes
>[    2.601073] [drm:drm_enable_connectors] connector 39 enabled? no
>[    2.601073] [drm:drm_enable_connectors] connector 43 enabled? no
>[    2.601074] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1
>[    2.601075] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0
>[    2.601076] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 3200x1800
>[    2.601077] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping
>[    2.601077] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping
>[    2.601078] [drm:drm_setup_crtcs] desired mode 3200x1800 set on crtc 20 (0,0)
>[    2.601083] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2f00
>[    2.601084] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880210cc3780 state to ffff880210cc2f00
>[    2.601086] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d93e7c00 state to ffff880210cc2f00
>[    2.601087] [drm:drm_atomic_check_only] checking ffff880210cc2f00
>[    2.601089] [drm:drm_atomic_commit] commiting ffff880210cc2f00
>[    2.601100] [drm:ironlake_update_primary_plane] Writing base 0059C000 00000000 0 0 12800
>[    2.601104] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2f00
>[    2.601105] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2f00
>[    2.601106] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2f00
>[    2.601107] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff880210cc39c0 state to ffff880210cc2f00
>[    2.601108] [drm:drm_atomic_check_only] checking ffff880210cc2f00
>[    2.601108] [drm:drm_atomic_commit] commiting ffff880210cc2f00
>[    2.601109] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2f00
>[    2.601110] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2f00
>[    2.601110] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2f00
>[    2.601111] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff880210cc3600 state to ffff880210cc2f00
>[    2.601111] [drm:drm_atomic_check_only] checking ffff880210cc2f00
>[    2.601112] [drm:drm_atomic_commit] commiting ffff880210cc2f00
>[    2.601113] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2f00
>[    2.601113] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2f00
>[    2.601114] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2f00
>[    2.601115] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880210cc3300 state to ffff880210cc2f00
>[    2.601115] [drm:drm_atomic_check_only] checking ffff880210cc2f00
>[    2.601116] [drm:drm_atomic_commit] commiting ffff880210cc2f00
>[    2.601117] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2f00
>[    2.601117] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2f00
>[    2.601118] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2f00
>[    2.601119] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880210cc3840 state to ffff880210cc2f00
>[    2.601119] [drm:drm_atomic_check_only] checking ffff880210cc2f00
>[    2.601120] [drm:drm_atomic_commit] commiting ffff880210cc2f00
>[    2.601120] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2f00
>[    2.601121] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2f00
>[    2.601121] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2f00
>[    2.601122] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff880210cc3180 state to ffff880210cc2f00
>[    2.601123] [drm:drm_atomic_check_only] checking ffff880210cc2f00
>[    2.601123] [drm:drm_atomic_commit] commiting ffff880210cc2f00
>[    2.601124] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2f00
>[    2.601124] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2f00
>[    2.601125] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2f00
>[    2.601126] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880210cc36c0 state to ffff880210cc2f00
>[    2.601126] [drm:drm_atomic_check_only] checking ffff880210cc2f00
>[    2.601127] [drm:drm_atomic_commit] commiting ffff880210cc2f00
>[    2.601127] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2f00
>[    2.601128] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2f00
>[    2.601129] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2f00
>[    2.601129] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880210cc3b40 state to ffff880210cc2f00
>[    2.601130] [drm:drm_atomic_check_only] checking ffff880210cc2f00
>[    2.601130] [drm:drm_atomic_commit] commiting ffff880210cc2f00
>[    2.601131] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2f00
>[    2.601131] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2f00
>[    2.601132] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2f00
>[    2.601133] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff880210cc3c00 state to ffff880210cc2f00
>[    2.601133] [drm:drm_atomic_check_only] checking ffff880210cc2f00
>[    2.601134] [drm:drm_atomic_commit] commiting ffff880210cc2f00
>[    2.601134] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2f00
>[    2.601135] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2f00
>[    2.601137] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    2.601138] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    2.601139] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.601140] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.601141] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    2.601143] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[    2.601146] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[    2.601147] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[    2.601148] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.601149] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    2.601150] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.601150] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.601151] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.601152] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[    2.601153] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.601153] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.601154] [drm:intel_dump_pipe_config] requested mode:
>[    2.601155] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    2.601155] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.601157] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    2.601158] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[    2.601158] [drm:intel_dump_pipe_config] port clock: 540000
>[    2.601159] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    2.601159] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.601160] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.601160] [drm:intel_dump_pipe_config] ips: 1
>[    2.601161] [drm:intel_dump_pipe_config] double wide: 0
>[    2.601162] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    2.601163] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    2.601163] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.601164] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.601165] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[    2.601165] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[    2.601166] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.601167] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.601172] Console: switching to colour frame buffer device 400x112
>[    2.601178] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    2.601180] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    2.601180] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.601181] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.601182] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    2.601182] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[    2.601185] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[    2.601185] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[    2.601186] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.601186] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    2.601187] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.601187] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.601188] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.601189] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[    2.601190] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.601190] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.601190] [drm:intel_dump_pipe_config] requested mode:
>[    2.601192] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    2.601192] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.601193] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    2.601194] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[    2.601194] [drm:intel_dump_pipe_config] port clock: 540000
>[    2.601195] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    2.601196] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.601196] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.601197] [drm:intel_dump_pipe_config] ips: 1
>[    2.601197] [drm:intel_dump_pipe_config] double wide: 0
>[    2.611377] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>[    2.611378] i915 0000:00:02.0: registered panic notifier
>[    2.619448] [drm:i915_gem_open] 
>[    2.620961] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    2.620964] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    2.620978] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.621143] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2e40
>[    2.621147] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880210c5d600 state to ffff880210cc2e40
>[    2.621149] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880213bd7000 state to ffff880210cc2e40
>[    2.621150] [drm:drm_atomic_check_only] checking ffff880210cc2e40
>[    2.621152] [drm:drm_atomic_commit] commiting ffff880210cc2e40
>[    2.621167] [drm:ironlake_update_primary_plane] Writing base 0059C000 00000000 0 0 12800
>[    2.621172] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2e40
>[    2.621173] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2e40
>[    2.621175] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2e40
>[    2.621176] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff880210c5dd80 state to ffff880210cc2e40
>[    2.621177] [drm:drm_atomic_check_only] checking ffff880210cc2e40
>[    2.621178] [drm:drm_atomic_commit] commiting ffff880210cc2e40
>[    2.621179] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2e40
>[    2.621180] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2e40
>[    2.621181] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2e40
>[    2.621182] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff880210c5da80 state to ffff880210cc2e40
>[    2.621183] [drm:drm_atomic_check_only] checking ffff880210cc2e40
>[    2.621184] [drm:drm_atomic_commit] commiting ffff880210cc2e40
>[    2.621185] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2e40
>[    2.621186] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2e40
>[    2.621187] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2e40
>[    2.621189] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880210cc3600 state to ffff880210cc2e40
>[    2.621190] [drm:drm_atomic_check_only] checking ffff880210cc2e40
>[    2.621191] [drm:drm_atomic_commit] commiting ffff880210cc2e40
>[    2.621192] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2e40
>[    2.621192] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2e40
>[    2.621194] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2e40
>[    2.621195] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880210cc3300 state to ffff880210cc2e40
>[    2.621196] [drm:drm_atomic_check_only] checking ffff880210cc2e40
>[    2.621196] [drm:drm_atomic_commit] commiting ffff880210cc2e40
>[    2.621197] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2e40
>[    2.621198] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2e40
>[    2.621199] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2e40
>[    2.621201] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff880210cc3840 state to ffff880210cc2e40
>[    2.621202] [drm:drm_atomic_check_only] checking ffff880210cc2e40
>[    2.621203] [drm:drm_atomic_commit] commiting ffff880210cc2e40
>[    2.621205] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2e40
>[    2.621206] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2e40
>[    2.621207] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2e40
>[    2.621208] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880210cc3180 state to ffff880210cc2e40
>[    2.621209] [drm:drm_atomic_check_only] checking ffff880210cc2e40
>[    2.621210] [drm:drm_atomic_commit] commiting ffff880210cc2e40
>[    2.621211] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2e40
>[    2.621212] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2e40
>[    2.621213] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2e40
>[    2.621214] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880210cc36c0 state to ffff880210cc2e40
>[    2.621215] [drm:drm_atomic_check_only] checking ffff880210cc2e40
>[    2.621216] [drm:drm_atomic_commit] commiting ffff880210cc2e40
>[    2.621217] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2e40
>[    2.621217] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2e40
>[    2.621219] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2e40
>[    2.621220] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff880210cc3b40 state to ffff880210cc2e40
>[    2.621220] [drm:drm_atomic_check_only] checking ffff880210cc2e40
>[    2.621221] [drm:drm_atomic_commit] commiting ffff880210cc2e40
>[    2.621222] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2e40
>[    2.621223] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2e40
>[    2.621225] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    2.621227] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    2.621229] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.621231] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.621233] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    2.621235] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[    2.621240] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[    2.621241] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[    2.621242] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.621243] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    2.621244] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.621245] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.621247] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.621248] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[    2.621250] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.621251] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.621252] [drm:intel_dump_pipe_config] requested mode:
>[    2.621254] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    2.621255] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.621256] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    2.621258] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[    2.621259] [drm:intel_dump_pipe_config] port clock: 540000
>[    2.621260] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    2.621261] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.621262] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.621262] [drm:intel_dump_pipe_config] ips: 1
>[    2.621263] [drm:intel_dump_pipe_config] double wide: 0
>[    2.621265] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    2.621266] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    2.621267] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.621268] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.621269] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[    2.621270] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[    2.621271] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.621272] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.629929] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=843/937
>[    2.629933] [drm:intel_panel_actually_set_backlight] set backlight PWM = 847
>[    2.646285] [drm:i915_gem_open] 
>[    2.647518] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    2.647520] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    2.647720] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2180
>[    2.647722] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880210c5d6c0 state to ffff880210cc2180
>[    2.647725] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff880213bd7000 state to ffff880210cc2180
>[    2.647726] [drm:drm_atomic_check_only] checking ffff880210cc2180
>[    2.647729] [drm:drm_atomic_commit] commiting ffff880210cc2180
>[    2.647742] [drm:ironlake_update_primary_plane] Writing base 0059C000 00000000 0 0 12800
>[    2.647747] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2180
>[    2.647748] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2180
>[    2.647750] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2180
>[    2.647751] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff880210c5d600 state to ffff880210cc2180
>[    2.647752] [drm:drm_atomic_check_only] checking ffff880210cc2180
>[    2.647753] [drm:drm_atomic_commit] commiting ffff880210cc2180
>[    2.647754] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2180
>[    2.647755] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2180
>[    2.647756] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2180
>[    2.647758] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff880210c5dd80 state to ffff880210cc2180
>[    2.647758] [drm:drm_atomic_check_only] checking ffff880210cc2180
>[    2.647759] [drm:drm_atomic_commit] commiting ffff880210cc2180
>[    2.647760] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2180
>[    2.647761] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2180
>[    2.647762] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2180
>[    2.647764] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880210c5da80 state to ffff880210cc2180
>[    2.647765] [drm:drm_atomic_check_only] checking ffff880210cc2180
>[    2.647766] [drm:drm_atomic_commit] commiting ffff880210cc2180
>[    2.647767] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2180
>[    2.647768] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2180
>[    2.647769] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2180
>[    2.647770] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880210c5d480 state to ffff880210cc2180
>[    2.647771] [drm:drm_atomic_check_only] checking ffff880210cc2180
>[    2.647772] [drm:drm_atomic_commit] commiting ffff880210cc2180
>[    2.647773] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2180
>[    2.647774] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2180
>[    2.647775] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2180
>[    2.647776] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff880210c29f00 state to ffff880210cc2180
>[    2.647777] [drm:drm_atomic_check_only] checking ffff880210cc2180
>[    2.647778] [drm:drm_atomic_commit] commiting ffff880210cc2180
>[    2.647779] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2180
>[    2.647780] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2180
>[    2.647781] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2180
>[    2.647782] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880210c293c0 state to ffff880210cc2180
>[    2.647783] [drm:drm_atomic_check_only] checking ffff880210cc2180
>[    2.647784] [drm:drm_atomic_commit] commiting ffff880210cc2180
>[    2.647785] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2180
>[    2.647786] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2180
>[    2.647787] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2180
>[    2.647788] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880210c29540 state to ffff880210cc2180
>[    2.647789] [drm:drm_atomic_check_only] checking ffff880210cc2180
>[    2.647790] [drm:drm_atomic_commit] commiting ffff880210cc2180
>[    2.647791] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2180
>[    2.647792] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2180
>[    2.647793] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210cc2180
>[    2.647794] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff880210c29600 state to ffff880210cc2180
>[    2.647795] [drm:drm_atomic_check_only] checking ffff880210cc2180
>[    2.647796] [drm:drm_atomic_commit] commiting ffff880210cc2180
>[    2.647797] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210cc2180
>[    2.647797] [drm:drm_atomic_state_free] Freeing atomic state ffff880210cc2180
>[    2.647799] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[    2.647802] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[    2.647804] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.647805] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.647807] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    2.647809] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[    2.647813] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[    2.647814] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[    2.647816] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.647817] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    2.647818] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.647819] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.647820] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.647822] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[    2.647823] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.647824] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.647825] [drm:intel_dump_pipe_config] requested mode:
>[    2.647827] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    2.647828] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.647829] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    2.647831] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[    2.647832] [drm:intel_dump_pipe_config] port clock: 540000
>[    2.647832] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    2.647834] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.647835] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.647835] [drm:intel_dump_pipe_config] ips: 1
>[    2.647836] [drm:intel_dump_pipe_config] double wide: 0
>[    2.647838] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    2.647839] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    2.647840] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.647841] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.647842] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[    2.647843] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[    2.647844] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.647845] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.660197] [drm:i915_gem_open] 
>[    2.661772] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    2.661775] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    2.661791] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.662803] [drm:i915_gem_open] 
>[    2.663982] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    2.663985] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    2.663998] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.664001] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.665299] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.665314] [drm:drm_mode_addfb2] [FB:46]
>[    2.665460] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.665463] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[3] ENCODERS[5]
>[    2.665555] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    2.665597] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    2.665762] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[    2.665767] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[    2.665794] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[    2.665797] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[    2.705951] [drm:drm_mode_addfb2] [FB:46]
>[    2.706733] [drm:drm_mode_setcrtc] [CRTC:20]
>[    2.706738] [drm:drm_mode_setcrtc] [CONNECTOR:31:eDP-1]
>[    2.706741] [drm:intel_crtc_set_config] [CRTC:20] [FB:46] #connectors=1 (x y) (0 0)
>[    2.706745] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[    2.706747] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.706750] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[    2.706752] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[    2.706756] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[    2.706761] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[    2.706763] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[    2.706765] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[    2.706767] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[    2.706769] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[    2.706771] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[    2.706773] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[    2.706775] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[    2.706777] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[    2.706778] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[    2.706780] [drm:intel_dump_pipe_config] requested mode:
>[    2.706783] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 0 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x0 0xa
>[    2.706784] [drm:intel_dump_pipe_config] adjusted mode:
>[    2.706787] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    2.706789] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[    2.706791] [drm:intel_dump_pipe_config] port clock: 540000
>[    2.706792] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[    2.706794] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[    2.706795] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[    2.706796] [drm:intel_dump_pipe_config] ips: 1
>[    2.706798] [drm:intel_dump_pipe_config] double wide: 0
>[    2.706801] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    2.718519] [drm:ironlake_update_primary_plane] Writing base 01B95000 00000000 0 0 12800
>[    2.727948] [drm:drm_mode_setcrtc] [CRTC:24]
>[    2.727952] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[    2.727955] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[    2.727956] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.727958] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    2.727961] [drm:drm_mode_setcrtc] [CRTC:28]
>[    2.727962] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[    2.727964] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[    2.727965] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[    2.727966] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[    3.124101] [drm:i915_gem_open] 
>[    3.125202] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    3.125205] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    3.151047] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    3.151050] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    3.151080] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[    3.152139] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[    3.261105] fuse init (API version 7.23)
>[    3.355474] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    3.355478] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[    3.355479] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[    3.355489] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    3.355492] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[    3.355494] [drm:drm_mode_debug_printmodeline] Modeline 32:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    3.355498] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    3.355596] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[    3.355597] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[    3.355598] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[    3.355601] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[    3.355603] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[    3.355605] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[    3.355606] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[    3.355758] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    3.355759] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    3.355761] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[    3.356384] [drm:i915_gem_open] 
>[    3.357695] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    3.357699] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    3.361258] [drm:intel_print_rc6_info] Enabling RC6 states: RC6 on
>[    3.381591] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    3.381594] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    3.381596] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[    3.382246] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[    3.384796] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    3.384799] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    3.384801] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[    4.119138] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    4.119144] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[    4.119146] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[    4.119156] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    4.119158] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[    4.119161] [drm:drm_mode_debug_printmodeline] Modeline 32:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    4.119164] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    4.119237] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[    4.119238] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[    4.119239] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[    4.119242] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[    4.119244] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[    4.119246] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[    4.119247] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[    4.119406] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    4.119408] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    4.119409] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[    4.260137] [drm:drm_mode_addfb2] [FB:48]
>[    4.302986] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.352566] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.368101] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.383813] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.400545] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.417260] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.433993] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.450644] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.467240] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.483945] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.500567] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.517233] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.534164] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.550589] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.567311] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.583896] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.600551] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.617269] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.634006] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.650821] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.667043] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.683985] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.700726] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.717348] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.734058] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.750719] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.767533] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.784076] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.800834] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.817459] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.834165] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.850814] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.873565] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.893633] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.901217] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.917747] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.934552] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.951213] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    4.967873] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    4.984468] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.001210] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.017861] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.034533] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.051293] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.067896] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.084587] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.101253] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.117959] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.135057] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.151407] wlp2s0: authenticate with 88:03:55:d8:8a:a9
>[    5.153153] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.155001] wlp2s0: send auth to 88:03:55:d8:8a:a9 (try 1/3)
>[    5.156813] wlp2s0: authenticated
>[    5.158997] wlp2s0: associate with 88:03:55:d8:8a:a9 (try 1/3)
>[    5.162350] wlp2s0: RX AssocResp from 88:03:55:d8:8a:a9 (capab=0x411 status=0 aid=3)
>[    5.163485] wlp2s0: associated
>[    5.169419] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.184601] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.201374] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.218045] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.234668] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.251546] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.268239] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.284895] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.487666] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.569310] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off
>[    5.569317] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[    5.627988] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.650750] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.683149] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.703944] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.720384] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.737076] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.753275] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.770814] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.787293] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.804105] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.820665] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.837307] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.853823] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.868693] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    5.886508] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    5.902064] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    8.888586] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    8.905172] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    8.922309] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    8.939234] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    8.955322] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    8.971999] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    8.988652] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    9.005364] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    9.021110] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    9.039387] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    9.055070] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    9.072059] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    9.088721] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    9.105448] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[    9.121562] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[    9.164830] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff8800da3cd840
>[    9.167693] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880037f20d80
>[    9.412873] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880207306cc0
>[    9.545966] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    9.545971] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[    9.545973] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[    9.545983] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[    9.545985] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[    9.545987] [drm:drm_mode_debug_printmodeline] Modeline 32:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[    9.545990] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[    9.546051] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[    9.546052] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[    9.546053] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[    9.546056] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[    9.546058] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[    9.546060] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[    9.546061] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[    9.546217] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[    9.546218] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[    9.546219] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[    9.546818] [drm:i915_gem_open] 
>[    9.548571] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    9.548575] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    9.580106] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    9.580111] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    9.580114] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[    9.580870] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[    9.584047] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[    9.584052] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[    9.584055] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   10.331351] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   10.331357] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[   10.331359] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[   10.331372] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   10.331375] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[   10.331379] [drm:drm_mode_debug_printmodeline] Modeline 32:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   10.331383] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   10.331468] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[   10.331470] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[   10.331471] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[   10.331477] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[   10.331480] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   10.331482] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[   10.331484] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[   10.331647] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   10.331650] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   10.331653] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[   10.590865] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   10.610840] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   10.637584] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   10.693827] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   10.720862] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   10.736575] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   10.753107] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   10.769783] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   10.786459] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   10.803098] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   10.821265] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   10.839456] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   10.856176] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   10.874322] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   10.889497] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   10.906223] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   10.923182] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   10.939770] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   10.956289] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   10.975816] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   10.989968] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   11.006336] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   11.023129] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   11.040082] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   11.056434] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   11.073099] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   11.089687] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   11.106669] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   11.123034] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   11.154525] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   11.177761] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   11.191369] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   11.208435] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   11.224705] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   11.241378] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   11.258138] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   11.275594] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   11.292211] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   11.308237] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   11.324762] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   11.353547] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20f00
>[   11.373281] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   11.380102] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa899c0
>[   11.386835] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.393661] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.400402] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.407169] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.413974] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.420768] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.427525] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.434311] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.441051] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.447869] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.454676] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.461475] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.468028] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.475017] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.481798] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.488571] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.495328] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.502141] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.508927] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.515694] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.522491] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.529266] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.536010] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.542559] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.549621] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.556402] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.563164] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.569934] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.576708] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.583491] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.590263] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.664792] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.671568] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.678388] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.684908] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.691937] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.698700] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.705490] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.712268] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.719047] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.725798] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.732599] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.739396] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.746157] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.752920] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609600
>[   11.759731] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   11.766481] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   11.773255] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   11.780035] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   11.786824] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   11.793606] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   11.800379] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   11.807156] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   11.813936] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   11.820695] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   11.827449] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   11.834207] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   11.840984] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   11.847777] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   11.854507] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   11.861309] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   11.868112] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   11.874579] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609900
>[   11.888425] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   11.895187] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89c00
>[   11.901950] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   11.922256] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89c00
>[   15.080807] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.087582] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.094374] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.101148] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.107946] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.114717] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.121520] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.128315] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.135133] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.141903] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.148661] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.155474] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.162272] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.169031] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.175570] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.182617] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.189360] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.196153] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.202950] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.209734] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.216222] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.223287] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.230039] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.236812] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.243322] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.250342] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.257132] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.263918] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.270649] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.277429] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.284208] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.290979] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.304527] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.311307] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.318085] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.324862] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.331644] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.338431] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.345162] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   15.351876] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6093c0
>[   15.358600] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.643555] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   15.650332] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.657126] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   15.663924] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.670693] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   15.677498] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.684264] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   15.691047] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.697806] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   15.704574] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.711349] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   15.718154] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.724964] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   15.731739] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.738516] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   15.745326] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.752089] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   15.758859] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.765665] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   15.772459] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.779262] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   15.786041] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.792803] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   15.799568] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.806085] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   15.813130] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.819892] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   15.826625] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   15.833355] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89600
>[   16.389227] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   16.395987] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20e40
>[   16.402592] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   16.409570] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20e40
>[   16.416323] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   16.423103] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20e40
>[   16.429863] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   16.436627] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20e40
>[   16.443447] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   16.450204] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20e40
>[   16.456944] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   16.463740] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20e40
>[   16.470533] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   16.477309] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20e40
>[   16.484106] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   16.490882] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20e40
>[   16.497460] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   16.504418] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20e40
>[   16.511133] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   16.517803] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20e40
>[   16.524747] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   16.531539] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20e40
>[   16.538316] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   16.545090] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20e40
>[   16.761933] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   16.768735] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609240
>[   16.775413] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609000
>[   18.754557] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   18.761308] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20b40
>[   18.767921] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   18.774714] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20b40
>[   18.781671] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   18.788449] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20b40
>[   18.795224] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   18.802000] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20b40
>[   18.808774] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   18.815552] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20b40
>[   18.822329] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   18.829103] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20b40
>[   18.835879] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd206c0
>[   18.842560] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20b40
>[   18.849234] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89540
>[   18.856172] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89a80
>[   18.862966] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89540
>[   18.869797] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20c00
>[   18.876589] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89a80
>[   18.883285] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   18.890070] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89a80
>[   18.896866] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   18.903601] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89a80
>[   18.910414] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   18.917194] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89a80
>[   18.923967] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   18.930738] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89a80
>[   18.937426] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   18.944094] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89a80
>[   18.951033] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   18.957787] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89a80
>[   18.964545] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   18.971271] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89a80
>[   18.978047] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89cc0
>[   18.991586] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89a80
>[   19.222179] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20600
>[   19.228966] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20840
>[   19.235751] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20600
>[   19.242530] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20840
>[   19.249310] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20600
>[   19.256102] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20840
>[   19.262837] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20600
>[   19.269534] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20840
>[   19.276454] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20600
>[   19.283187] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20840
>[   19.289988] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20600
>[   19.296775] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20840
>[   19.303574] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20600
>[   19.310323] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20840
>[   19.317105] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20600
>[   19.323914] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20840
>[   19.330665] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20600
>[   19.337439] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20840
>[   19.344245] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389b40
>[   19.351021] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389a80
>[   19.357784] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389b40
>[   19.364560] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389a80
>[   19.371283] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389b40
>[   19.493359] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20a80
>[   19.500145] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20780
>[   19.506922] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20a80
>[   19.513717] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20780
>[   19.520480] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20a80
>[   19.527118] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20780
>[   19.534044] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609180
>[   19.540812] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6096c0
>[   19.547109] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609180
>[   19.554337] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6096c0
>[   19.561091] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609180
>[   19.567870] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d6096c0
>[   19.569778] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   19.574552] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609180
>[   19.581186] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   19.587876] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   19.594906] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   19.601655] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   19.608435] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   19.615215] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   19.621972] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   19.628668] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   19.630279] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   19.635463] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   19.642249] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   19.649015] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   19.655796] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89b40
>[   19.811838] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20a80
>[   19.818627] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20300
>[   19.825427] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20a80
>[   19.832199] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20300
>[   19.839009] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20a80
>[   19.845789] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20300
>[   19.852559] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20a80
>[   19.859380] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389a80
>[   19.866168] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389cc0
>[   19.872979] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389a80
>[   19.879709] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20300
>[   19.886484] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389cc0
>[   19.893240] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389d80
>[   19.899993] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389cc0
>[   19.906796] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389d80
>[   19.913615] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389cc0
>[   19.920387] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389d80
>[   19.927151] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389cc0
>[   19.933905] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20240
>[   19.940693] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389d80
>[   19.947476] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389300
>[   19.954237] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389d80
>[   19.961012] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389300
>[   19.967803] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389d80
>[   19.974583] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389300
>[   19.981336] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389d80
>[   19.988120] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389300
>[   19.995088] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020cd20000
>[   20.001495] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020d609c00
>[   20.008417] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389d80
>[   20.015187] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389540
>[   20.021963] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389d80
>[   20.028769] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389540
>[   20.035409] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389d80
>[   20.042239] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff880213389540
>[   21.510833] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020fa89900
>[   21.578383] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   21.607619] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   21.634002] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   21.653918] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   21.670471] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   21.686958] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   21.703872] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   21.730623] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   21.747300] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   21.764000] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   21.780424] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   21.813034] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   21.834741] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   21.887080] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   22.164398] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   22.193266] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   22.297785] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   22.327905] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   22.354113] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   22.636278] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   22.651856] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.119549] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   23.131770] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.148352] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   23.164996] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.181651] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   23.198536] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.216353] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   23.234784] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.252309] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   23.268712] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.290984] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   23.301957] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.319200] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   23.335536] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.351615] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   23.384426] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.384631] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020eaf1000
>[   23.489714] [drm:i915_gem_open] 
>[   23.490964] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   23.490966] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   23.502549] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   23.521126] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   23.521130] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   23.521132] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   23.522365] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[   23.602441] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.635340] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   23.660862] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020a3313c0
>[   23.692283] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   23.692287] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   23.692293] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[   23.700265] [drm:drm_mode_addfb2] [FB:50]
>[   23.701629] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.756614] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   23.772509] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.810682] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   23.840350] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.873264] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   23.913894] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.940239] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   23.952825] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   23.952829] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   23.952836] [drm:i915_gem_context_create_ioctl] HW context 2 created
>[   23.969184] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   23.990539] [drm:gen8_ppgtt_init] Allocated 4 pages for page directories (0 wasted)
>[   23.990544] [drm:gen8_ppgtt_init] Allocated 2048 pages for page tables (0 wasted)
>[   23.990547] [drm:i915_gem_context_create_ioctl] HW context 3 created
>[   29.824416] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   29.857994] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   29.874868] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   29.892493] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   29.925167] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff8800c5584840
>[   29.944249] [drm:drm_atomic_set_fb_for_plane] Set [FB:49] for plane state ffff88020eaf00c0
>[   29.961569] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   30.953042] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8802072a06c0
>[   32.237167] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88020f534c00
>[   34.445604] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff88020f534c00
>[   38.062636] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801ccf20e40
>[   38.062653] [drm:intel_fbc_update] no output, disabling
>[   38.077012] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801d525ab40
>[   38.077022] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801d525aa80
>[   38.077050] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[   38.077052] [drm:intel_set_config_compute_mode_changes] crtc has no fb, will flip
>[   38.077053] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[   38.077054] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   38.077055] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   38.077057] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[   38.077059] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[   38.077062] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[   38.077063] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[   38.077064] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   38.077065] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   38.077066] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   38.077066] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   38.077067] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   38.077068] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[   38.077069] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   38.077069] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   38.077069] [drm:intel_dump_pipe_config] requested mode:
>[   38.077071] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   38.077071] [drm:intel_dump_pipe_config] adjusted mode:
>[   38.077073] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   38.077074] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[   38.077074] [drm:intel_dump_pipe_config] port clock: 540000
>[   38.077075] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   38.077075] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   38.077076] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   38.077077] [drm:intel_dump_pipe_config] ips: 1
>[   38.077077] [drm:intel_dump_pipe_config] double wide: 0
>[   38.077078] [drm:drm_atomic_set_fb_for_plane] Set [FB:47] for plane state ffff8801d525a180
>[   38.077087] [drm:ironlake_update_primary_plane] Writing base 0059C000 00000000 0 0 12800
>[   38.093671] [drm:intel_fbc_update] disabled per chip default
>[   38.122350] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880207834540
>[   38.122353] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800a59ed780 state to ffff880207834540
>[   38.122355] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8801d50e7800 state to ffff880207834540
>[   38.122356] [drm:drm_atomic_check_only] checking ffff880207834540
>[   38.122358] [drm:drm_atomic_commit] commiting ffff880207834540
>[   38.122372] [drm:ironlake_update_primary_plane] Writing base 0059C000 00000000 0 0 12800
>[   38.122376] [drm:drm_atomic_state_clear] Clearing atomic state ffff880207834540
>[   38.122377] [drm:drm_atomic_state_free] Freeing atomic state ffff880207834540
>[   38.122378] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880207834540
>[   38.122379] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800a59edb40 state to ffff880207834540
>[   38.122380] [drm:drm_atomic_check_only] checking ffff880207834540
>[   38.122381] [drm:drm_atomic_commit] commiting ffff880207834540
>[   38.122382] [drm:drm_atomic_state_clear] Clearing atomic state ffff880207834540
>[   38.122382] [drm:drm_atomic_state_free] Freeing atomic state ffff880207834540
>[   38.122383] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880207834540
>[   38.122384] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8800a59ed180 state to ffff880207834540
>[   38.122384] [drm:drm_atomic_check_only] checking ffff880207834540
>[   38.122385] [drm:drm_atomic_commit] commiting ffff880207834540
>[   38.122386] [drm:drm_atomic_state_clear] Clearing atomic state ffff880207834540
>[   38.122386] [drm:drm_atomic_state_free] Freeing atomic state ffff880207834540
>[   38.122387] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880207834540
>[   38.122388] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800a59ed600 state to ffff880207834540
>[   38.122388] [drm:drm_atomic_check_only] checking ffff880207834540
>[   38.122389] [drm:drm_atomic_commit] commiting ffff880207834540
>[   38.122389] [drm:drm_atomic_state_clear] Clearing atomic state ffff880207834540
>[   38.122390] [drm:drm_atomic_state_free] Freeing atomic state ffff880207834540
>[   38.122390] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880207834540
>[   38.122391] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800a59edc00 state to ffff880207834540
>[   38.122391] [drm:drm_atomic_check_only] checking ffff880207834540
>[   38.122392] [drm:drm_atomic_commit] commiting ffff880207834540
>[   38.122392] [drm:drm_atomic_state_clear] Clearing atomic state ffff880207834540
>[   38.122393] [drm:drm_atomic_state_free] Freeing atomic state ffff880207834540
>[   38.122394] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880207834540
>[   38.122395] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff8800a59ed900 state to ffff880207834540
>[   38.122395] [drm:drm_atomic_check_only] checking ffff880207834540
>[   38.122395] [drm:drm_atomic_commit] commiting ffff880207834540
>[   38.122396] [drm:drm_atomic_state_clear] Clearing atomic state ffff880207834540
>[   38.122397] [drm:drm_atomic_state_free] Freeing atomic state ffff880207834540
>[   38.122397] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880207834540
>[   38.122398] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800a59ed240 state to ffff880207834540
>[   38.122398] [drm:drm_atomic_check_only] checking ffff880207834540
>[   38.122399] [drm:drm_atomic_commit] commiting ffff880207834540
>[   38.122400] [drm:drm_atomic_state_clear] Clearing atomic state ffff880207834540
>[   38.122400] [drm:drm_atomic_state_free] Freeing atomic state ffff880207834540
>[   38.122401] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880207834540
>[   38.122401] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800a59ed300 state to ffff880207834540
>[   38.122402] [drm:drm_atomic_check_only] checking ffff880207834540
>[   38.122402] [drm:drm_atomic_commit] commiting ffff880207834540
>[   38.122403] [drm:drm_atomic_state_clear] Clearing atomic state ffff880207834540
>[   38.122403] [drm:drm_atomic_state_free] Freeing atomic state ffff880207834540
>[   38.122404] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880207834540
>[   38.122405] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff8800a59ed3c0 state to ffff880207834540
>[   38.122405] [drm:drm_atomic_check_only] checking ffff880207834540
>[   38.122406] [drm:drm_atomic_commit] commiting ffff880207834540
>[   38.122406] [drm:drm_atomic_state_clear] Clearing atomic state ffff880207834540
>[   38.122407] [drm:drm_atomic_state_free] Freeing atomic state ffff880207834540
>[   38.122408] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[   38.122410] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[   38.122412] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   38.122413] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   38.122415] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[   38.122417] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[   38.122420] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[   38.122420] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[   38.122422] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   38.122423] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   38.122424] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   38.122424] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   38.122425] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   38.122426] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[   38.122427] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   38.122427] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   38.122428] [drm:intel_dump_pipe_config] requested mode:
>[   38.122429] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   38.122430] [drm:intel_dump_pipe_config] adjusted mode:
>[   38.122431] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   38.122432] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[   38.122432] [drm:intel_dump_pipe_config] port clock: 540000
>[   38.122433] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   38.122433] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   38.122434] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   38.122434] [drm:intel_dump_pipe_config] ips: 1
>[   38.122435] [drm:intel_dump_pipe_config] double wide: 0
>[   38.122436] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[   38.122437] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[   38.122438] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   38.122438] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   38.122439] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[   38.122439] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[   38.122440] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   38.122441] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   38.122444] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[   38.122445] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[   38.122446] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   38.122447] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   38.122447] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[   38.122448] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[   38.122451] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[   38.122451] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[   38.122452] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   38.122452] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   38.122453] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   38.122453] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   38.122454] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   38.122455] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[   38.122455] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   38.122456] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   38.122456] [drm:intel_dump_pipe_config] requested mode:
>[   38.122458] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   38.122458] [drm:intel_dump_pipe_config] adjusted mode:
>[   38.122459] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   38.122460] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[   38.122460] [drm:intel_dump_pipe_config] port clock: 540000
>[   38.122461] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   38.122461] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   38.122462] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   38.122462] [drm:intel_dump_pipe_config] ips: 1
>[   38.122463] [drm:intel_dump_pipe_config] double wide: 0
>[   38.122469] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[   38.122470] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[   38.122470] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   38.122471] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   38.122471] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[   38.122472] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[   38.122475] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[   38.122475] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[   38.122476] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   38.122476] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   38.122477] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   38.122477] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   38.122478] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   38.122479] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[   38.122479] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   38.122480] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   38.122480] [drm:intel_dump_pipe_config] requested mode:
>[   38.122481] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   38.122489] [drm:intel_dump_pipe_config] adjusted mode:
>[   38.122490] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   38.122491] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[   38.122491] [drm:intel_dump_pipe_config] port clock: 540000
>[   38.122491] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   38.122492] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   38.122493] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   38.122493] [drm:intel_dump_pipe_config] ips: 1
>[   38.122494] [drm:intel_dump_pipe_config] double wide: 0
>[   43.954611] dell_wmi: Unknown key 151 pressed
>[   44.660257] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800bc2e5d20
>[   44.660266] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800d944c540 state to ffff8800bc2e5d20
>[   44.660272] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8801be378000 state to ffff8800bc2e5d20
>[   44.660276] [drm:drm_atomic_check_only] checking ffff8800bc2e5d20
>[   44.660282] [drm:drm_atomic_commit] commiting ffff8800bc2e5d20
>[   44.660305] [drm:ironlake_update_primary_plane] Writing base 0059C000 00000000 0 0 12800
>[   44.660315] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800bc2e5d20
>[   44.660320] [drm:drm_atomic_state_free] Freeing atomic state ffff8800bc2e5d20
>[   44.660330] [drm:drm_mode_setcrtc] [CRTC:20]
>[   44.660336] [drm:drm_mode_setcrtc] [CONNECTOR:31:eDP-1]
>[   44.660341] [drm:intel_crtc_set_config] [CRTC:20] [FB:46] #connectors=1 (x y) (0 0)
>[   44.660347] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[   44.660351] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   44.660357] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   44.660361] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[   44.660368] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[   44.660378] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[   44.660381] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[   44.660386] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   44.660391] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   44.660394] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   44.660397] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   44.660402] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   44.660407] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[   44.660411] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   44.660415] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   44.660418] [drm:intel_dump_pipe_config] requested mode:
>[   44.660424] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 0 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x0 0xa
>[   44.660427] [drm:intel_dump_pipe_config] adjusted mode:
>[   44.660434] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   44.660439] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[   44.660442] [drm:intel_dump_pipe_config] port clock: 540000
>[   44.660446] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   44.660449] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   44.660453] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   44.660456] [drm:intel_dump_pipe_config] ips: 1
>[   44.660459] [drm:intel_dump_pipe_config] double wide: 0
>[   44.660464] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800d944c600
>[   44.660478] [drm:ironlake_update_primary_plane] Writing base 01B95000 00000000 0 0 12800
>[   44.666902] [drm:drm_mode_setcrtc] [CRTC:24]
>[   44.666915] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[   44.666926] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[   44.666934] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   44.666943] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   44.666962] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800bc2e5d20
>[   44.666973] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800d944c540 state to ffff8800bc2e5d20
>[   44.666980] [drm:drm_atomic_check_only] checking ffff8800bc2e5d20
>[   44.666989] [drm:drm_atomic_commit] commiting ffff8800bc2e5d20
>[   44.666997] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800bc2e5d20
>[   44.667004] [drm:drm_atomic_state_free] Freeing atomic state ffff8800bc2e5d20
>[   44.667018] [drm:drm_mode_setcrtc] [CRTC:28]
>[   44.667023] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[   44.667030] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[   44.667037] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   44.667047] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   44.667060] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800bc2e5d20
>[   44.667068] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800d944c9c0 state to ffff8800bc2e5d20
>[   44.667073] [drm:drm_atomic_check_only] checking ffff8800bc2e5d20
>[   44.667080] [drm:drm_atomic_commit] commiting ffff8800bc2e5d20
>[   44.667087] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800bc2e5d20
>[   44.667093] [drm:drm_atomic_state_free] Freeing atomic state ffff8800bc2e5d20
>[   44.668679] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   44.668690] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[   44.668698] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[   44.668730] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   44.668740] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[   44.668752] [drm:drm_mode_debug_printmodeline] Modeline 32:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   44.668764] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   44.669063] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[   44.669072] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[   44.669077] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[   44.669088] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[   44.669101] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   44.669107] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[   44.669112] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[   44.669308] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   44.669320] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   44.669330] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[   44.933684] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800d944c600
>[   45.412455] haswell-pcm-audio haswell-pcm-audio: FW loaded, mailbox readback FW info: type 01, - version: 00.00, build 77, source commit id: 876ac6906f31a43b6772b23c7c983ce9dcb18a19
>[   47.365065] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800d944cb40
>[   47.365083] [drm:intel_fbc_update] no output, disabling
>[   47.368917] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880037f28840
>[   47.368926] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880037f28d80
>[   47.369012] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800bc1e34e0
>[   47.369013] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff880037f28000 state to ffff8800bc1e34e0
>[   47.369014] [drm:drm_atomic_check_only] checking ffff8800bc1e34e0
>[   47.369016] [drm:drm_atomic_commit] commiting ffff8800bc1e34e0
>[   47.369018] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800bc1e34e0
>[   47.369019] [drm:drm_atomic_state_free] Freeing atomic state ffff8800bc1e34e0
>[   47.369021] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800bc1e34e0
>[   47.369022] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff880037f28f00 state to ffff8800bc1e34e0
>[   47.369022] [drm:drm_atomic_check_only] checking ffff8800bc1e34e0
>[   47.369023] [drm:drm_atomic_commit] commiting ffff8800bc1e34e0
>[   47.369024] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800bc1e34e0
>[   47.369025] [drm:drm_atomic_state_free] Freeing atomic state ffff8800bc1e34e0
>[   47.369026] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800bc1e34e0
>[   47.369027] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff880037f28e40 state to ffff8800bc1e34e0
>[   47.369028] [drm:drm_atomic_check_only] checking ffff8800bc1e34e0
>[   47.369028] [drm:drm_atomic_commit] commiting ffff8800bc1e34e0
>[   47.369029] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800bc1e34e0
>[   47.369030] [drm:drm_atomic_state_free] Freeing atomic state ffff8800bc1e34e0
>[   47.369031] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800bc1e34e0
>[   47.369032] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff880037f28540 state to ffff8800bc1e34e0
>[   47.369032] [drm:drm_atomic_check_only] checking ffff8800bc1e34e0
>[   47.369033] [drm:drm_atomic_commit] commiting ffff8800bc1e34e0
>[   47.369034] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800bc1e34e0
>[   47.369035] [drm:drm_atomic_state_free] Freeing atomic state ffff8800bc1e34e0
>[   47.369036] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800bc1e34e0
>[   47.369037] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff880037f28840 state to ffff8800bc1e34e0
>[   47.369037] [drm:drm_atomic_check_only] checking ffff8800bc1e34e0
>[   47.369038] [drm:drm_atomic_commit] commiting ffff8800bc1e34e0
>[   47.369039] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800bc1e34e0
>[   47.369040] [drm:drm_atomic_state_free] Freeing atomic state ffff8800bc1e34e0
>[   47.369041] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800bc1e34e0
>[   47.369042] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff880037f28180 state to ffff8800bc1e34e0
>[   47.369043] [drm:drm_atomic_check_only] checking ffff8800bc1e34e0
>[   47.369043] [drm:drm_atomic_commit] commiting ffff8800bc1e34e0
>[   47.369044] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800bc1e34e0
>[   47.369045] [drm:drm_atomic_state_free] Freeing atomic state ffff8800bc1e34e0
>[   47.369046] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800bc1e34e0
>[   47.369048] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff880037f280c0 state to ffff8800bc1e34e0
>[   47.369048] [drm:drm_atomic_check_only] checking ffff8800bc1e34e0
>[   47.369049] [drm:drm_atomic_commit] commiting ffff8800bc1e34e0
>[   47.369050] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800bc1e34e0
>[   47.369051] [drm:drm_atomic_state_free] Freeing atomic state ffff8800bc1e34e0
>[   47.369053] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800bc1e34e0
>[   47.369054] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff880037f28d80 state to ffff8800bc1e34e0
>[   47.369055] [drm:drm_atomic_check_only] checking ffff8800bc1e34e0
>[   47.369056] [drm:drm_atomic_commit] commiting ffff8800bc1e34e0
>[   47.369057] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800bc1e34e0
>[   47.369057] [drm:drm_atomic_state_free] Freeing atomic state ffff8800bc1e34e0
>[   47.369059] [drm:drm_atomic_state_alloc] Allocate atomic state ffff8800bc1e34e0
>[   47.369060] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff880037f28240 state to ffff8800bc1e34e0
>[   47.369060] [drm:drm_atomic_check_only] checking ffff8800bc1e34e0
>[   47.369061] [drm:drm_atomic_commit] commiting ffff8800bc1e34e0
>[   47.369062] [drm:drm_atomic_state_clear] Clearing atomic state ffff8800bc1e34e0
>[   47.369063] [drm:drm_atomic_state_free] Freeing atomic state ffff8800bc1e34e0
>[   47.369065] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[   47.369067] [drm:intel_set_config_compute_mode_changes] crtc has no fb, will flip
>[   47.369069] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[   47.369070] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   47.369072] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   47.369074] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[   47.369078] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[   47.369082] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[   47.369083] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[   47.369084] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   47.369085] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   47.369086] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   47.369087] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   47.369088] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   47.369089] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[   47.369090] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   47.369091] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   47.369092] [drm:intel_dump_pipe_config] requested mode:
>[   47.369094] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   47.369095] [drm:intel_dump_pipe_config] adjusted mode:
>[   47.369097] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   47.369099] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[   47.369099] [drm:intel_dump_pipe_config] port clock: 540000
>[   47.369100] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   47.369101] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   47.369102] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   47.369102] [drm:intel_dump_pipe_config] ips: 1
>[   47.369103] [drm:intel_dump_pipe_config] double wide: 0
>[   47.369105] [drm:drm_atomic_set_fb_for_plane] Set [FB:47] for plane state ffff880037f28300
>[   47.369116] [drm:ironlake_update_primary_plane] Writing base 0059C000 00000000 0 0 12800
>[   47.385525] [drm:intel_fbc_update] disabled per chip default
>[   47.402219] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[   47.402222] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[   47.402223] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   47.402225] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   47.402227] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[   47.402228] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[   47.402229] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   47.402230] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   47.402237] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[   47.402239] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[   47.402240] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   47.402241] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   47.402243] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[   47.402248] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[   47.402252] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[   47.402253] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[   47.402255] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   47.402256] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   47.402257] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   47.402257] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   47.402259] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   47.402260] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[   47.402262] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   47.402262] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   47.402263] [drm:intel_dump_pipe_config] requested mode:
>[   47.402266] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   47.402266] [drm:intel_dump_pipe_config] adjusted mode:
>[   47.402269] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   47.402271] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[   47.402271] [drm:intel_dump_pipe_config] port clock: 540000
>[   47.402272] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   47.402273] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   47.402274] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   47.402275] [drm:intel_dump_pipe_config] ips: 1
>[   47.402276] [drm:intel_dump_pipe_config] double wide: 0
>[   47.402286] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[   47.402287] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[   47.402288] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   47.402289] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   47.402289] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[   47.402291] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[   47.402294] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[   47.402294] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[   47.402295] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   47.402296] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   47.402296] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   47.402297] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   47.402298] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   47.402298] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[   47.402299] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   47.402300] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   47.402300] [drm:intel_dump_pipe_config] requested mode:
>[   47.402301] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   47.402301] [drm:intel_dump_pipe_config] adjusted mode:
>[   47.402303] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   47.402304] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[   47.402304] [drm:intel_dump_pipe_config] port clock: 540000
>[   47.402305] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   47.402305] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   47.402306] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   47.402306] [drm:intel_dump_pipe_config] ips: 1
>[   47.402306] [drm:intel_dump_pipe_config] double wide: 0
>[   47.416179] [drm:intel_crtc_set_config] [CRTC:20] [FB:47] #connectors=1 (x y) (0 0)
>[   47.416181] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0
>[   47.416183] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   47.416184] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   47.416186] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[   47.416189] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[   47.416193] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[   47.416193] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[   47.416195] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   47.416195] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   47.416196] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   47.416196] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   47.416197] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   47.416198] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[   47.416199] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   47.416200] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   47.416200] [drm:intel_dump_pipe_config] requested mode:
>[   47.416202] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   47.416202] [drm:intel_dump_pipe_config] adjusted mode:
>[   47.416203] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   47.416204] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[   47.416205] [drm:intel_dump_pipe_config] port clock: 540000
>[   47.416205] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   47.416206] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   47.416207] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   47.416207] [drm:intel_dump_pipe_config] ips: 1
>[   47.416208] [drm:intel_dump_pipe_config] double wide: 0
>[   48.290639] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210c71240
>[   48.290645] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800c55843c0 state to ffff880210c71240
>[   48.290648] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800d2a31000 state to ffff880210c71240
>[   48.290649] [drm:drm_atomic_check_only] checking ffff880210c71240
>[   48.290652] [drm:drm_atomic_commit] commiting ffff880210c71240
>[   48.290667] [drm:ironlake_update_primary_plane] Writing base 0059C000 00000000 0 0 12800
>[   48.290672] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210c71240
>[   48.290674] [drm:drm_atomic_state_free] Freeing atomic state ffff880210c71240
>[   48.290678] [drm:drm_mode_setcrtc] [CRTC:20]
>[   48.290682] [drm:drm_mode_setcrtc] [CONNECTOR:31:eDP-1]
>[   48.290684] [drm:intel_crtc_set_config] [CRTC:20] [FB:48] #connectors=1 (x y) (0 0)
>[   48.290687] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1
>[   48.290689] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   48.290691] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0
>[   48.290693] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains
>[   48.290696] [drm:intel_dp_compute_config] DP link computation with max lane count 4 max bw 14 pixel clock 373250KHz
>[   48.290700] [drm:intel_dp_compute_config] DP link bw 14 lane count 4 clock 540000 bpp 24
>[   48.290702] [drm:intel_dp_compute_config] DP link bw required 895800 available 1728000
>[   48.290704] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[   48.290706] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A
>[   48.290707] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[   48.290709] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[   48.290710] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[   48.290712] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4348677, gmch_n: 8388608, link_m: 724779, link_n: 1048576, tu: 64
>[   48.290714] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[   48.290716] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0
>[   48.290717] [drm:intel_dump_pipe_config] requested mode:
>[   48.290720] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 0 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x0 0xa
>[   48.290721] [drm:intel_dump_pipe_config] adjusted mode:
>[   48.290724] [drm:drm_mode_debug_printmodeline] Modeline 0:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   48.290726] [drm:intel_dump_crtc_timings] crtc timings: 373250 3200 3248 3280 3360 1800 1803 1808 1852, type: 0x48 flags: 0xa
>[   48.290728] [drm:intel_dump_pipe_config] port clock: 540000
>[   48.290729] [drm:intel_dump_pipe_config] pipe src size: 3200x1800
>[   48.290730] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[   48.290732] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[   48.290733] [drm:intel_dump_pipe_config] ips: 1
>[   48.290734] [drm:intel_dump_pipe_config] double wide: 0
>[   48.290737] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800c5584840
>[   48.290744] [drm:ironlake_update_primary_plane] Writing base 043A7000 00000000 0 0 12800
>[   48.303081] [drm:drm_mode_setcrtc] [CRTC:24]
>[   48.303086] [drm:intel_crtc_set_config] [CRTC:24] [NOFB]
>[   48.303090] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0
>[   48.303093] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   48.303097] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   48.303105] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210c71d80
>[   48.303109] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800c55843c0 state to ffff880210c71d80
>[   48.303111] [drm:drm_atomic_check_only] checking ffff880210c71d80
>[   48.303115] [drm:drm_atomic_commit] commiting ffff880210c71d80
>[   48.303118] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210c71d80
>[   48.303121] [drm:drm_atomic_state_free] Freeing atomic state ffff880210c71d80
>[   48.303126] [drm:drm_mode_setcrtc] [CRTC:28]
>[   48.303128] [drm:intel_crtc_set_config] [CRTC:28] [NOFB]
>[   48.303131] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0
>[   48.303134] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20]
>[   48.303136] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0
>[   48.303141] [drm:drm_atomic_state_alloc] Allocate atomic state ffff880210c71d80
>[   48.303144] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800c5584300 state to ffff880210c71d80
>[   48.303146] [drm:drm_atomic_check_only] checking ffff880210c71d80
>[   48.303148] [drm:drm_atomic_commit] commiting ffff880210c71d80
>[   48.303151] [drm:drm_atomic_state_clear] Clearing atomic state ffff880210c71d80
>[   48.303153] [drm:drm_atomic_state_free] Freeing atomic state ffff880210c71d80
>[   48.304708] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   48.304711] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1]
>[   48.304714] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1]
>[   48.304724] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[   48.304728] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes :
>[   48.304731] [drm:drm_mode_debug_printmodeline] Modeline 32:"3200x1800" 60 373250 3200 3248 3280 3360 1800 1803 1808 1852 0x48 0xa
>[   48.304734] [drm:drm_mode_getconnector] [CONNECTOR:31:?]
>[   48.304807] [drm:drm_mode_getconnector] [CONNECTOR:39:?]
>[   48.304809] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1]
>[   48.304810] [drm:intel_dp_detect] [CONNECTOR:39:DP-1]
>[   48.304813] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:39:DP-1] disconnected
>[   48.304815] [drm:drm_mode_getconnector] [CONNECTOR:43:?]
>[   48.304817] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1]
>[   48.304819] [drm:intel_hdmi_detect] [CONNECTOR:43:HDMI-A-1]
>[   48.304984] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1)
>[   48.304988] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>[   48.304991] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:HDMI-A-1] disconnected
>[   48.319171] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU pipe A FIFO underrun
>[   48.548300] [drm:drm_atomic_set_fb_for_plane] Set [FB:46] for plane state ffff8800c5584840

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