Attachment 132323 Details for Bug 101636 – kern.log

kern.log

kern.log (text/plain), 405.95 KB, created by Humberto Israel Perez Rodriguez on 2017-06-28 21:10:35 UTC

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Creator: Humberto Israel Perez Rodriguez

Created: 2017-06-28 21:10:35 UTC

Size: 405.95 KB

patch

obsolete

>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Linux version 4.12.0-rc7-drm-tip-ww26-commit-85a692e+ (gfx@bifrost) (gcc version 5.4.0 20160609 (Ubuntu 5.4.0-6ubuntu1~16.04.4) ) #1 SMP PREEMPT Wed Jun 28 09:33:37 CDT 2017
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Command line: BOOT_IMAGE=/boot/vmlinuz-4.12.0-rc7-drm-tip-ww26-commit-85a692e+ root=UUID=2a8388ef-fcb0-4ae0-964a-bd124748729c ro quiet drm.debug=0x1e i915.alpha_support=1 resume=/dev/sda3 fastboot i915.enable_guc_loading=2 i915.enable_guc_submission=2 log_buf_len=1M
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers'
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers'
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/fpu: Supporting XSAVE feature 0x008: 'MPX bounds registers'
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/fpu: Supporting XSAVE feature 0x010: 'MPX CSR'
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/fpu: xstate_offset[3]:  576, xstate_sizes[3]:   64
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/fpu: xstate_offset[4]:  640, xstate_sizes[4]:   64
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/fpu: Enabled xstate features 0x1b, context size is 704 bytes, using 'compacted' format.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] e820: BIOS-provided physical RAM map:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000000000000-0x0000000000057fff] usable
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000000058000-0x0000000000059fff] reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x000000000005a000-0x000000000009dfff] usable
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x000000000009e000-0x00000000000fffff] reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000000fffffff] usable
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000010000000-0x0000000012151fff] reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000012152000-0x0000000076cbcfff] usable
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000076cbd000-0x0000000076efcfff] reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000076efd000-0x0000000076fecfff] type 20
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000076fed000-0x00000000799ecfff] reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x00000000799ed000-0x0000000079a4cfff] ACPI NVS
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000079a4d000-0x0000000079a8cfff] ACPI data
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000079a8d000-0x000000007abfffff] usable
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x000000007ac00000-0x000000007fffffff] reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x00000000a121a000-0x00000000a121afff] reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x00000000e0000000-0x00000000e3ffffff] reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x00000000fed01000-0x00000000fed01fff] reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000017fffffff] usable
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] NX (Execute Disable) protection: active
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] efi: EFI v2.60 by EDK II
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] efi:  SMBIOS=0x76ef9000  SMBIOS 3.0=0x76ef7000  ACPI=0x79a8c000  ACPI 2.0=0x79a8c014  ESRT=0x799ac000 
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] SMBIOS 3.1.1 present.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] DMI: Intel Corp. Geminilake/GLK RVP1 DDR4 (05), BIOS GELKRVPA.X64.0050.B51.1706021357 06/02/2017
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] tsc: Using PIT calibration value
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] e820: last_pfn = 0x180000 max_arch_pfn = 0x400000000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] MTRR default type: uncachable
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] MTRR fixed ranges enabled:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   00000-9FFFF write-back
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   A0000-BFFFF uncachable
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   C0000-FFFFF write-protect
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] MTRR variable ranges enabled:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   0 base 00FF800000 mask 7FFF800000 write-combining
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   1 base 0000000000 mask 7F80000000 write-back
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   2 base 007B000000 mask 7FFF000000 uncachable
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   3 base 007C000000 mask 7FFC000000 uncachable
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   4 base 0100000000 mask 7F80000000 write-back
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   5 disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   6 disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   7 disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   8 disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   9 disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] x86/PAT: Configuration [0-7]: WB  WC  UC- UC  WB  WC  UC- WT  
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] e820: last_pfn = 0x7ac00 max_arch_pfn = 0x400000000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] esrt: ESRT header is not in the memory map.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Base memory trampoline at [ffff880000098000] 98000 size 24576
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Using GB pages for direct mapping
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BRK [0x056c2000, 0x056c2fff] PGTABLE
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BRK [0x056c3000, 0x056c3fff] PGTABLE
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BRK [0x056c4000, 0x056c4fff] PGTABLE
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BRK [0x056c5000, 0x056c5fff] PGTABLE
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BRK [0x056c6000, 0x056c6fff] PGTABLE
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] BRK [0x056c7000, 0x056c7fff] PGTABLE
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] log_buf_len: 1048576 bytes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] early log buf free: 257608(98%)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Secure boot could not be determined
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] RAMDISK: [mem 0x36960000-0x374a7fff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: Early table checksum verification disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: RSDP 0x0000000079A8C014 000024 (v02 INTEL )
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: XSDT 0x0000000079A5A188 0000FC (v01 INTEL  EDK2     00000003 BRXT 01000013)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: FACP 0x0000000079A84000 00010C (v05 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: DSDT 0x0000000079A6B000 011491 (v02 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: FACS 0x0000000079A3A000 000040
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: UEFI 0x0000000079A43000 000042 (v01 INTEL  EDK2     00000002 BRXT 01000013)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A8A000 0003E9 (v02 INTEL  Tpm2Tabl 00001000 INTL 20160527)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: TPM2 0x0000000079A89000 000034 (v04                 00000000      00000000)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: BDAT 0x0000000079A88000 000030 (v02                 00000000      00000000)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: HPET 0x0000000079A83000 000038 (v01 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: LPIT 0x0000000079A82000 00005C (v01 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: APIC 0x0000000079A81000 000084 (v03 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: MCFG 0x0000000079A80000 00003C (v01 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: NPKT 0x0000000079A7F000 000065 (v01 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: PRAM 0x0000000079A7E000 000030 (v01 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: WSMT 0x0000000079A7D000 000028 (v01 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A67000 003EA7 (v02 INTEL  DptfTab  00000003 BRXT 0100000D)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A61000 0059F0 (v02 INTEL  RVPRtd3  00000003 BRXT 0100000D)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A5F000 0010B3 (v02 INTEL  UsbCTabl 00000003 BRXT 0100000D)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A5D000 001524 (v01 Intel_ Platform 00001000 INTL 20160527)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A5C000 0000B1 (v01 Intel_ ADebTabl 00001000 INTL 20160527)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A5B000 0003F7 (v02 PmRef  Cpu0Ist  00003000 INTL 20160527)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A8B000 000775 (v02 CpuRef CpuSsdt  00003000 INTL 20160527)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A59000 000388 (v02 PmRef  Cpu0Tst  00003000 INTL 20160527)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A58000 0001E6 (v02 PmRef  ApTst    00003000 INTL 20160527)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: SSDT 0x0000000079A55000 002939 (v02 SaSsdt SaSsdt   00003000 INTL 20160527)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: FPDT 0x0000000079A54000 000044 (v01 INTEL  EDK2     00000002 BRXT 01000013)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: DBGP 0x0000000079A86000 000034 (v01 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: DBG2 0x0000000079A87000 000072 (v00 INTEL  EDK2     00000003 BRXT 0100000D)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: WDAT 0x0000000079A85000 000104 (v01                 00000000      00000000)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: NHLT 0x0000000079A52000 001A50 (v00 INTEL  EDK2     00000002 BRXT 01000013)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: Local APIC address 0xfee00000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Zone ranges:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   DMA      [mem 0x0000000000001000-0x0000000000ffffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   DMA32    [mem 0x0000000001000000-0x00000000ffffffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   Normal   [mem 0x0000000100000000-0x000000017fffffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Movable zone start for each node
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Early memory node ranges
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   node   0: [mem 0x0000000000001000-0x0000000000057fff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   node   0: [mem 0x000000000005a000-0x000000000009dfff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   node   0: [mem 0x0000000000100000-0x000000000fffffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   node   0: [mem 0x0000000012152000-0x0000000076cbcfff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   node   0: [mem 0x0000000079a8d000-0x000000007abfffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   node   0: [mem 0x0000000100000000-0x000000017fffffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Initmem setup node 0 [mem 0x0000000000001000-0x000000017fffffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] On node 0 totalpages: 1006713
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   DMA zone: 64 pages used for memmap
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   DMA zone: 23 pages reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   DMA zone: 3995 pages, LIFO batch:0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   DMA32 zone: 7476 pages used for memmap
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   DMA32 zone: 478430 pages, LIFO batch:31
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   Normal zone: 8192 pages used for memmap
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]   Normal zone: 524288 pages, LIFO batch:31
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Reserving Intel graphics memory at 0x000000007c000000-0x000000007fffffff
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: PM-Timer IO Port: 0x408
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: Local APIC address 0xfee00000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: LAPIC_NMI (acpi_id[0x01] high level lint[0x1])
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: LAPIC_NMI (acpi_id[0x02] high level lint[0x1])
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: LAPIC_NMI (acpi_id[0x03] high level lint[0x1])
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: LAPIC_NMI (acpi_id[0x04] high level lint[0x1])
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] IOAPIC[0]: apic_id 1, version 32, address 0xfec00000, GSI 0-119
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: IRQ0 used by override.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: IRQ9 used by override.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Using ACPI (MADT) for SMP configuration information
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ACPI: HPET id: 0x8086a701 base: 0xfed00000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] smpboot: Allowing 4 CPUs, 0 hotplug CPUs
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x00058000-0x00059fff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x000fffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x10000000-0x12151fff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x76cbd000-0x76efcfff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x76efd000-0x76fecfff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x76fed000-0x799ecfff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x799ed000-0x79a4cfff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x79a4d000-0x79a8cfff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x7ac00000-0x7fffffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0x80000000-0xa1219fff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0xa121a000-0xa121afff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0xa121b000-0xdfffffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0xe0000000-0xe3ffffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0xe4000000-0xfed00fff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0xfed01000-0xfed01fff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PM: Registered nosave memory: [mem 0xfed02000-0xffffffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] e820: [mem 0xa121b000-0xdfffffff] available for PCI devices
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1910969940391419 ns
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] setup_percpu: NR_CPUS:16 nr_cpumask_bits:16 nr_cpu_ids:4 nr_node_ids:1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] percpu: Embedded 37 pages/cpu @ffff88017fc00000 s114376 r8192 d28984 u524288
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] pcpu-alloc: s114376 r8192 d28984 u524288 alloc=1*2097152
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] pcpu-alloc: [0] 0 1 2 3 
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 990958
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Kernel command line: BOOT_IMAGE=/boot/vmlinuz-4.12.0-rc7-drm-tip-ww26-commit-85a692e+ root=UUID=2a8388ef-fcb0-4ae0-964a-bd124748729c ro quiet drm.debug=0x1e i915.alpha_support=1 resume=/dev/sda3 fastboot i915.enable_guc_loading=2 i915.enable_guc_submission=2 log_buf_len=1M
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Memory: 3793728K/4026852K available (8673K kernel code, 1378K rwdata, 3444K rodata, 1200K init, 22640K bss, 233124K reserved, 0K cma-reserved)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Running RCU self tests
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Preemptible hierarchical RCU implementation.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] 	RCU lockdep checking is enabled.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] 	RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=4.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] kmemleak: Kernel memory leak detector disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] NR_IRQS:4352 nr_irqs:1024 16
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Console: colour dummy device 80x25
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] console [tty0] enabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ... MAX_LOCKDEP_SUBCLASSES:  8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ... MAX_LOCK_DEPTH:          48
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ... MAX_LOCKDEP_KEYS:        8191
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ... CLASSHASH_SIZE:          4096
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ... MAX_LOCKDEP_ENTRIES:     32768
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ... MAX_LOCKDEP_CHAINS:      65536
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] ... CHAINHASH_SIZE:          32768
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]  memory used by lock dependency info: 8159 kB
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000]  per task-struct memory footprint: 1920 bytes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] kmemleak: Early log buffer exceeded (2878), please increase DEBUG_KMEMLEAK_EARLY_LOG_SIZE
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 99544814920 ns
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.000000] hpet clockevent registered
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.002000] tsc: PIT calibration matches HPET. 1 loops
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.002000] tsc: Detected 1094.586 MHz processor
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.002000] Calibrating delay loop (skipped), value calculated using timer frequency.. 2188.80 BogoMIPS (lpj=1094400)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.002000] pid_max: default: 32768 minimum: 301
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.002000] ACPI: Core revision 20170303
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.256035] random: fast init done
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.417308] ACPI Error: Invalid type (RegionField) for target of Scope operator [SSP2] (Cannot override) (20170303/dswload-273)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.417393] ACPI Exception: AE_AML_OPERAND_TYPE, During name lookup/catalog (20170303/psobject-241)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.418859] ACPI Exception: AE_AML_OPERAND_TYPE, (SSDT: RVPRtd3) while loading table (20170303/tbxfload-228)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.494266] ACPI Error: 1 table load failures, 11 successful (20170303/tbxfload-246)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.495357] Mount-cache hash table entries: 8192 (order: 4, 65536 bytes)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.495365] Mountpoint-cache hash table entries: 8192 (order: 4, 65536 bytes)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.497559] CPU: Physical Processor ID: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.497564] CPU: Processor Core ID: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.497587] mce: CPU supports 7 MCE banks
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.497678] CPU0: Thermal monitoring enabled (TM1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.497751] process: using mwait in idle threads
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.497758] Last level iTLB entries: 4KB 0, 2MB 0, 4MB 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.497762] Last level dTLB entries: 4KB 0, 2MB 0, 4MB 0, 1GB 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.498462] Freeing SMP alternatives memory: 32K
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.512626] smpboot: Max logical packages: 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.514137] x2apic: IRQ remapping doesn't support X2APIC mode
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.519894] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.529954] TSC deadline timer enabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.529975] smpboot: CPU0: Genuine Intel(R) CPU @ 1.10GHz (family: 0x6, model: 0x7a, stepping: 0x0)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.531262] mce: [Hardware Error]: Machine check events logged
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.531277] mce: [Hardware Error]: CPU 0: Machine Check: 0 Bank 4: a600000000020408
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.531329] mce: [Hardware Error]: TSC 0 ADDR fef4c9a0 
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.531374] mce: [Hardware Error]: PROCESSOR 0:706a0 TIME 1498683980 SOCKET 0 APIC 0 microcode 1c
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.533099] Performance Events: PEBS fmt3+, generic architected perfmon, full-width counters, Intel PMU driver.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.533135] ... version:                4
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.533140] ... bit width:              48
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.533144] ... generic registers:      4
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.533148] ... value mask:             0000ffffffffffff
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.533152] ... max period:             00007fffffffffff
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.533156] ... fixed-purpose events:   3
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.533160] ... event mask:             000000070000000f
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.541808] NMI watchdog: enabled on all CPUs, permanently consumes one hw-PMU counter.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.543025] smp: Bringing up secondary CPUs ...
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.551225] x86: Booting SMP configuration:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.551239] .... node  #0, CPUs:      #1 #2 #3
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.750283] smp: Brought up 1 node, 4 CPUs
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.750283] smpboot: Total of 4 processors activated (8845.86 BogoMIPS)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.751811] sched_clock: Marking stable (751000000, 0)->(761746083, -10746083)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.753524] devtmpfs: initialized
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.756436] PM: Registering ACPI NVS region [mem 0x799ed000-0x79a4cfff] (393216 bytes)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.758184] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.758200] futex hash table entries: 1024 (order: 5, 131072 bytes)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.758714] xor: measuring software checksum speed
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.768172]    prefetch64-sse:  5672.000 MB/sec
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.778285]    generic_sse:  4856.000 MB/sec
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.778290] xor: using function: prefetch64-sse (5672.000 MB/sec)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.778320] pinctrl core: initialized pinctrl subsystem
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.784805] NET: Registered protocol family 16
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.788144] cpuidle: using governor menu
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.788158] PCCT header not found.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.788639] ACPI: bus type PCI registered
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.789357] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xe0000000-0xe3ffffff] (base 0xe0000000)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.789479] PCI: MMCONFIG at [mem 0xe0000000-0xe3ffffff] reserved in E820
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.789523] PCI: Using configuration type 1 for base access
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.819953] HugeTLB registered 2 MB page size, pre-allocated 0 pages
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.839229] raid6: sse2x1   gen()  2531 MB/s
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.856415] raid6: sse2x1   xor()  1697 MB/s
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.873610] raid6: sse2x2   gen()  3003 MB/s
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.890784] raid6: sse2x2   xor()  1996 MB/s
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.907962] raid6: sse2x4   gen()  3480 MB/s
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.925144] raid6: sse2x4   xor()  1833 MB/s
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.925150] raid6: using algorithm sse2x4 gen() 3480 MB/s
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.925155] raid6: .... xor() 1833 MB/s, rmw enabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.925160] raid6: using ssse3x2 recovery algorithm
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.925606] ACPI: Added _OSI(Module Device)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.925629] ACPI: Added _OSI(Processor Device)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.925635] ACPI: Added _OSI(3.0 _SCP Extensions)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.925641] ACPI: Added _OSI(Processor Aggregator Device)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    0.935853] ACPI: Executed 15 blocks of module-level executable AML code
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.207869] ACPI: Dynamic OEM Table Load:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.207942] ACPI: SSDT 0xFFFF88017A530358 0001A5 (v02 PmRef  Cpu0Cst  00003001 INTL 20160527)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.209812] ACPI: Executed 1 blocks of module-level executable AML code
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.218908] ACPI: Dynamic OEM Table Load:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.218972] ACPI: SSDT 0xFFFF88017A533858 0001E6 (v02 PmRef  ApIst    00003000 INTL 20160527)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.222403] ACPI: Executed 1 blocks of module-level executable AML code
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.224397] ACPI: Dynamic OEM Table Load:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.224460] ACPI: SSDT 0xFFFF88017A43C6F8 0000C9 (v02 PmRef  ApCst    00003000 INTL 20160527)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.225987] ACPI: Executed 1 blocks of module-level executable AML code
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.274989] ACPI : EC: EC started
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.275001] ACPI : EC: interrupt blocked
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.451259] ACPI: \_SB_.PCI0.LPCB.H_EC: Used as first EC
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.451281] ACPI: \_SB_.PCI0.LPCB.H_EC: GPE=0x25, EC_CMD/EC_SC=0x66, EC_DATA=0x62
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.451301] ACPI: \_SB_.PCI0.LPCB.H_EC: Used as boot DSDT EC to handle transactions
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.451310] ACPI: Interpreter enabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.451616] ACPI: (supports S0 S3 S4 S5)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.451624] ACPI: Using IOAPIC for interrupt routing
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.452157] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    1.551422] ACPI: Power Resource [PXP] (on)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.307006] ACPI: Power Resource [FN00] (on)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.353782] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.353825] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.376344] acpi PNP0A08:00: _OSC: OS now controls [PCIeHotplug PME AER PCIeCapability]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.376418] acpi PNP0A08:00: [Firmware Info]: MMCONFIG for domain 0000 [bus 00-3f] only partially covers this bridge
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378765] PCI host bridge to bus 0000:00
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378780] pci_bus 0000:00: root bus resource [io  0x0070-0x0077]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378793] pci_bus 0000:00: root bus resource [io  0x0000-0x006f window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378805] pci_bus 0000:00: root bus resource [io  0x0078-0x0cf7 window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378817] pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378829] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378840] pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000dffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378851] pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000fffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378863] pci_bus 0000:00: root bus resource [mem 0x7c000001-0x7fffffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378874] pci_bus 0000:00: root bus resource [mem 0x80000000-0xbfffffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378885] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xefffffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378896] pci_bus 0000:00: root bus resource [mem 0xfea00000-0xfeafffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378907] pci_bus 0000:00: root bus resource [mem 0xfed00000-0xfed003ff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378918] pci_bus 0000:00: root bus resource [mem 0xfed01000-0xfed01fff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378929] pci_bus 0000:00: root bus resource [mem 0xfed03000-0xfed03fff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378940] pci_bus 0000:00: root bus resource [mem 0xfed06000-0xfed06fff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378962] pci_bus 0000:00: root bus resource [mem 0xfed08000-0xfed09fff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378974] pci_bus 0000:00: root bus resource [mem 0xfed80000-0xfedbffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378986] pci_bus 0000:00: root bus resource [mem 0xfed1c000-0xfed1cfff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.378998] pci_bus 0000:00: root bus resource [mem 0xfee00000-0xfeefffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.379012] pci_bus 0000:00: root bus resource [bus 00-ff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.379107] pci 0000:00:00.0: [8086:31f0] type 00 class 0x060000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.384795] pci 0000:00:00.1: [8086:318c] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.384857] pci 0000:00:00.1: reg 0x10: [mem 0x80000000-0x80007fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.390308] pci 0000:00:00.3: [8086:3190] type 00 class 0x088000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.390365] pci 0000:00:00.3: reg 0x10: [mem 0xa1218000-0xa1218fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.395622] pci 0000:00:02.0: [8086:3184] type 00 class 0x030000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.395665] pci 0000:00:02.0: reg 0x10: [mem 0xa0000000-0xa0ffffff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.395691] pci 0000:00:02.0: reg 0x18: [mem 0x90000000-0x9fffffff 64bit pref]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.395731] pci 0000:00:02.0: reg 0x20: [io  0x2000-0x203f]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.401798] pci 0000:00:0e.0: [8086:3198] type 00 class 0x040100
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.401885] pci 0000:00:0e.0: reg 0x10: [mem 0xa1210000-0xa1213fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.401973] pci 0000:00:0e.0: reg 0x20: [mem 0xa1000000-0xa10fffff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.402226] pci 0000:00:0e.0: PME# supported from D0 D3hot D3cold
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.412105] pci 0000:00:0e.0: System wakeup disabled by ACPI
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.412628] pci 0000:00:0f.0: [8086:319a] type 00 class 0x078000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.412706] pci 0000:00:0f.0: reg 0x10: [mem 0xa1219000-0xa1219fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.413080] pci 0000:00:0f.0: PME# supported from D3hot
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.418186] pci 0000:00:11.0: [8086:31a2] type 00 class 0x005007
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.418266] pci 0000:00:11.0: reg 0x10: [mem 0xa1214000-0xa1215fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.418318] pci 0000:00:11.0: reg 0x18: [mem 0xa121c000-0xa121cfff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.424305] pci 0000:00:12.0: [8086:31e3] type 00 class 0x010601
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.424357] pci 0000:00:12.0: reg 0x10: [mem 0xa1216000-0xa1217fff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.424384] pci 0000:00:12.0: reg 0x14: [mem 0xa1241000-0xa12410ff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.424411] pci 0000:00:12.0: reg 0x18: [io  0x2080-0x2087]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.424438] pci 0000:00:12.0: reg 0x1c: [io  0x2088-0x208b]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.424465] pci 0000:00:12.0: reg 0x20: [io  0x2060-0x207f]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.424492] pci 0000:00:12.0: reg 0x24: [mem 0xa123f000-0xa123f7ff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.424700] pci 0000:00:12.0: PME# supported from D3hot
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.429949] pci 0000:00:13.0: [8086:31da] type 01 class 0x060400
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.430256] pci 0000:00:13.0: PME# supported from D0 D3hot D3cold
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.435141] pci 0000:00:13.0: System wakeup disabled by ACPI
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.435732] pci 0000:00:15.0: [8086:31a8] type 00 class 0x0c0330
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.435799] pci 0000:00:15.0: reg 0x10: [mem 0xa1200000-0xa120ffff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.436117] pci 0000:00:15.0: PME# supported from D3hot D3cold
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.441192] pci 0000:00:15.0: System wakeup disabled by ACPI
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.441770] pci 0000:00:16.0: [8086:31ac] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.441837] pci 0000:00:16.0: reg 0x10: [mem 0xa121d000-0xa121dfff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.441881] pci 0000:00:16.0: reg 0x18: [mem 0xa121e000-0xa121efff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.447322] pci 0000:00:16.1: [8086:31ae] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.447391] pci 0000:00:16.1: reg 0x10: [mem 0xa121f000-0xa121ffff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.447434] pci 0000:00:16.1: reg 0x18: [mem 0xa1220000-0xa1220fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.452878] pci 0000:00:16.2: [8086:31b0] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.452944] pci 0000:00:16.2: reg 0x10: [mem 0xa1221000-0xa1221fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.452987] pci 0000:00:16.2: reg 0x18: [mem 0xa1222000-0xa1222fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.458450] pci 0000:00:16.3: [8086:31b2] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.458516] pci 0000:00:16.3: reg 0x10: [mem 0xa1223000-0xa1223fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.458560] pci 0000:00:16.3: reg 0x18: [mem 0xa1224000-0xa1224fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.464086] pci 0000:00:17.0: [8086:31b4] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.464153] pci 0000:00:17.0: reg 0x10: [mem 0xa1225000-0xa1225fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.464197] pci 0000:00:17.0: reg 0x18: [mem 0xa1226000-0xa1226fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.469672] pci 0000:00:17.1: [8086:31b6] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.469740] pci 0000:00:17.1: reg 0x10: [mem 0xa1227000-0xa1227fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.469783] pci 0000:00:17.1: reg 0x18: [mem 0xa1228000-0xa1228fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.475299] pci 0000:00:17.2: [8086:31b8] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.475365] pci 0000:00:17.2: reg 0x10: [mem 0xa1229000-0xa1229fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.475408] pci 0000:00:17.2: reg 0x18: [mem 0xa122a000-0xa122afff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.480884] pci 0000:00:17.3: [8086:31ba] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.480966] pci 0000:00:17.3: reg 0x10: [mem 0xa122b000-0xa122bfff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.481009] pci 0000:00:17.3: reg 0x18: [mem 0xa122c000-0xa122cfff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.486493] pci 0000:00:18.0: [8086:31bc] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.486559] pci 0000:00:18.0: reg 0x10: [mem 0xa122d000-0xa122dfff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.486602] pci 0000:00:18.0: reg 0x18: [mem 0xa122e000-0xa122efff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.492058] pci 0000:00:18.1: [8086:31be] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.492125] pci 0000:00:18.1: reg 0x10: [mem 0xa122f000-0xa122ffff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.492168] pci 0000:00:18.1: reg 0x18: [mem 0xa1230000-0xa1230fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.497605] pci 0000:00:18.3: [8086:31ee] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.497692] pci 0000:00:18.3: reg 0x10: [mem 0xa1231000-0xa1231fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.497736] pci 0000:00:18.3: reg 0x18: [mem 0xa1232000-0xa1232fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.503178] pci 0000:00:19.0: [8086:31c2] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.503243] pci 0000:00:19.0: reg 0x10: [mem 0xa1233000-0xa1233fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.503304] pci 0000:00:19.0: reg 0x18: [mem 0xa1234000-0xa1234fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.508715] pci 0000:00:19.1: [8086:31c4] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.508782] pci 0000:00:19.1: reg 0x10: [mem 0xa1235000-0xa1235fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.508846] pci 0000:00:19.1: reg 0x18: [mem 0xa1236000-0xa1236fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.514253] pci 0000:00:19.2: [8086:31c6] type 00 class 0x118000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.514332] pci 0000:00:19.2: reg 0x10: [mem 0xa1237000-0xa1237fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.514375] pci 0000:00:19.2: reg 0x18: [mem 0xa1238000-0xa1238fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.519895] pci 0000:00:1b.0: [8086:31ca] type 00 class 0x080501
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.519977] pci 0000:00:1b.0: reg 0x10: [mem 0xa1239000-0xa1239fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.520043] pci 0000:00:1b.0: reg 0x18: [mem 0xa123a000-0xa123afff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.526216] pci 0000:00:1c.0: [8086:31cc] type 00 class 0x080501
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.526283] pci 0000:00:1c.0: reg 0x10: [mem 0xa123b000-0xa123bfff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.526342] pci 0000:00:1c.0: reg 0x18: [mem 0xa123c000-0xa123cfff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.532423] pci 0000:00:1e.0: [8086:31d0] type 00 class 0x080501
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.532502] pci 0000:00:1e.0: reg 0x10: [mem 0xa123d000-0xa123dfff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.532545] pci 0000:00:1e.0: reg 0x18: [mem 0xa123e000-0xa123efff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.538030] pci 0000:00:1f.0: [8086:3197] type 00 class 0x060100
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.543674] pci 0000:00:1f.1: [8086:31d4] type 00 class 0x0c0500
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.543761] pci 0000:00:1f.1: reg 0x10: [mem 0xa1240000-0xa12400ff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.543884] pci 0000:00:1f.1: reg 0x20: [io  0x2040-0x205f]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.549462] pci 0000:01:00.0: [10ec:8168] type 00 class 0x020000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.549521] pci 0000:01:00.0: reg 0x10: [io  0x1000-0x10ff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.549605] pci 0000:01:00.0: reg 0x18: [mem 0xa1104000-0xa1104fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.549645] pci 0000:01:00.0: reg 0x20: [mem 0xa1100000-0xa1103fff 64bit]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.549701] pci 0000:01:00.0: can't set Max Payload Size to 256; if necessary, use "pci=pcie_bus_safe" and report a bug
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.550011] pci 0000:01:00.0: supports D1 D2
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.550017] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.550509] pci 0000:01:00.0: System wakeup disabled by ACPI
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.553756] pci 0000:00:13.0: PCI bridge to [bus 01]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.553768] pci 0000:00:13.0:   bridge window [io  0x1000-0x1fff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.553779] pci 0000:00:13.0:   bridge window [mem 0xa1100000-0xa11fffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.553830] pci_bus 0000:00: on NUMA node 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.677362] ACPI: PCI Interrupt Link [LNKA] (IRQs *3 4 5 6 10 11 12 14 15)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.679445] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 *4 5 6 10 11 12 14 15)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.681508] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 *5 6 10 11 12 14 15)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.683567] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 *6 10 11 12 14 15)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.685635] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 5 6 10 11 12 14 15) *7
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.687719] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 10 11 12 14 15) *9
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.689771] ACPI: PCI Interrupt Link [LNKG] (IRQs 3 4 5 6 *10 11 12 14 15)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.691827] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 10 *11 12 14 15)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.712726] ACPI: Enabled 3 GPEs in block 00 to 7F
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.714350] ACPI : EC: interrupt unblocked
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.714381] ACPI : EC: event unblocked
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.714422] ACPI: \_SB_.PCI0.LPCB.H_EC: GPE=0x25, EC_CMD/EC_SC=0x66, EC_DATA=0x62
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.714445] ACPI: \_SB_.PCI0.LPCB.H_EC: Used as boot DSDT EC to handle transactions and events
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.716414] pci 0000:00:02.0: vgaarb: setting as boot VGA device
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.716426] pci 0000:00:02.0: vgaarb: VGA device added: decodes=io+mem,owns=io+mem,locks=none
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.716467] pci 0000:00:02.0: vgaarb: bridge control possible
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.716472] vgaarb: loaded
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.718221] SCSI subsystem initialized
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.718810] libata version 3.00 loaded.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.719191] ACPI: bus type USB registered
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.719525] usbcore: registered new interface driver usbfs
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.719672] usbcore: registered new interface driver hub
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.719914] usbcore: registered new device driver usb
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.721000] Registered efivars operations
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.733179] Advanced Linux Sound Architecture Driver Initialized.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.733336] PCI: Using ACPI for IRQ routing
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.742893] PCI: pci_cache_line_size set to 64 bytes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.743240] e820: reserve RAM buffer [mem 0x00058000-0x0005ffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.743270] e820: reserve RAM buffer [mem 0x0009e000-0x0009ffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.743286] e820: reserve RAM buffer [mem 0x76cbd000-0x77ffffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.743302] e820: reserve RAM buffer [mem 0x7ac00000-0x7bffffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.745747] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.745788] hpet0: 8 comparators, 64-bit 19.200000 MHz counter
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.748018] clocksource: Switched to clocksource hpet
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.974950] pnp: PnP ACPI init
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.977541] system 00:00: [io  0x06a4] has been reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.977564] system 00:00: [io  0x06a0] has been reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.977605] system 00:00: Plug and Play ACPI device, IDs PNP0c02 (active)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.983453] pnp 00:01: disabling [io  0x164e-0x164f] because it overlaps 0000:00:13.0 BAR 7 [io  0x1000-0x1fff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.983932] system 00:01: [io  0x0680-0x069f] has been reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.983952] system 00:01: [io  0x0400-0x047f] has been reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.983971] system 00:01: [io  0x0500-0x05fe] has been reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.983989] system 00:01: [io  0x0600-0x061f] has been reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.984076] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    2.985464] pnp 00:02: Plug and Play ACPI device, IDs PNP0303 (active)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.077194] system 00:03: [mem 0xe0000000-0xefffffff] could not be reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.077214] system 00:03: [mem 0xfea00000-0xfeafffff] has been reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.077234] system 00:03: [mem 0xfed01000-0xfed01fff] has been reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.077264] system 00:03: [mem 0xfed03000-0xfed03fff] has been reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.077283] system 00:03: [mem 0xfed06000-0xfed06fff] has been reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.077302] system 00:03: [mem 0xfed08000-0xfed09fff] has been reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.077320] system 00:03: [mem 0xfed80000-0xfedbffff] has been reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.077339] system 00:03: [mem 0xfed1c000-0xfed1cfff] has been reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.077357] system 00:03: [mem 0xfee00000-0xfeefffff] has been reserved
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.077375] system 00:03: Plug and Play ACPI device, IDs PNP0c02 (active)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.084617] pnp 00:04: Plug and Play ACPI device, IDs PNP0b00 (active)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.094742] pnp: PnP ACPI: found 5 devices
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133056] clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, max_idle_ns: 2085701024 ns
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133106] pci 0000:00:13.0: PCI bridge to [bus 01]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133116] pci 0000:00:13.0:   bridge window [io  0x1000-0x1fff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133130] pci 0000:00:13.0:   bridge window [mem 0xa1100000-0xa11fffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133156] pci_bus 0000:00: resource 4 [io  0x0070-0x0077]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133163] pci_bus 0000:00: resource 5 [io  0x0000-0x006f window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133169] pci_bus 0000:00: resource 6 [io  0x0078-0x0cf7 window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133174] pci_bus 0000:00: resource 7 [io  0x0d00-0xffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133180] pci_bus 0000:00: resource 8 [mem 0x000a0000-0x000bffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133186] pci_bus 0000:00: resource 9 [mem 0x000c0000-0x000dffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133192] pci_bus 0000:00: resource 10 [mem 0x000e0000-0x000fffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133197] pci_bus 0000:00: resource 11 [mem 0x7c000001-0x7fffffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133203] pci_bus 0000:00: resource 12 [mem 0x80000000-0xbfffffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133209] pci_bus 0000:00: resource 13 [mem 0xe0000000-0xefffffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133215] pci_bus 0000:00: resource 14 [mem 0xfea00000-0xfeafffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133220] pci_bus 0000:00: resource 15 [mem 0xfed00000-0xfed003ff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133226] pci_bus 0000:00: resource 16 [mem 0xfed01000-0xfed01fff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133232] pci_bus 0000:00: resource 17 [mem 0xfed03000-0xfed03fff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133238] pci_bus 0000:00: resource 18 [mem 0xfed06000-0xfed06fff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133244] pci_bus 0000:00: resource 19 [mem 0xfed08000-0xfed09fff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133249] pci_bus 0000:00: resource 20 [mem 0xfed80000-0xfedbffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133255] pci_bus 0000:00: resource 21 [mem 0xfed1c000-0xfed1cfff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133261] pci_bus 0000:00: resource 22 [mem 0xfee00000-0xfeefffff window]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133268] pci_bus 0000:01: resource 0 [io  0x1000-0x1fff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.133273] pci_bus 0000:01: resource 1 [mem 0xa1100000-0xa11fffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.137781] NET: Registered protocol family 2
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.139605] TCP established hash table entries: 32768 (order: 6, 262144 bytes)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.139756] TCP bind hash table entries: 32768 (order: 9, 2097152 bytes)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.144878] TCP: Hash tables configured (established 32768 bind 32768)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.145359] UDP hash table entries: 2048 (order: 6, 327680 bytes)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.146133] UDP-Lite hash table entries: 2048 (order: 6, 327680 bytes)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.147661] NET: Registered protocol family 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.147770] pci 0000:00:02.0: Video device with shadowed ROM at [mem 0x000c0000-0x000dffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.153945] PCI: CLS 64 bytes, default 64
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.154903] Unpacking initramfs...
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.763745] Freeing initrd memory: 11552K
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.763758] PCI-DMA: Using software bounce buffering for IO (SWIOTLB)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.763766] software IO TLB [mem 0x6ec00000-0x72c00000] (64MB) mapped at [ffff88006ec00000-ffff880072bfffff]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.764099] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0xfc66f4fc7c, max_idle_ns: 440795224246 ns
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.778043] workingset: timestamp_bits=46 max_order=20 bucket_order=0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.826888] ntfs: driver 2.1.32 [Flags: R/O].
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.864335] NET: Registered protocol family 38
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.864858] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.864883] io scheduler noop registered
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.865662] io scheduler cfq registered (default)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.865669] io scheduler mq-deadline registered
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.865675] io scheduler kyber registered
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.865679] start plist test
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.871314] end plist test
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    3.878961] pcieport 0000:00:13.0: Signaling PME with IRQ 120
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    4.801665] clocksource: Switched to clocksource tsc
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.217089] uvesafb: Getting VBE info block failed (eax=0x4f00, err=1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.217149] uvesafb: vbe_init() failed with -22
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.217249] uvesafb: probe of uvesafb.0 failed with error -22
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.217475] intel_idle: MWAIT substates: 0x11242020
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.217482] intel_idle: v0.4.1 model 0x7A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.221298] intel_idle: lapic_timer_reliable_states 0xffffffff
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.222818] ACPI: AC Adapter [ADP1] (off-line)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.231535] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/device:01/PNP0C09:00/PNP0C0D:00/input/input0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.240221] ACPI: Lid Switch [LID0]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.240938] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.241032] ACPI: Power Button [PWRB]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.289641] (NULL device *): hwmon_device_register() is deprecated. Please convert the driver to use hwmon_device_register_with_info().
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.339574] thermal LNXTHERM:00: registered as thermal_zone0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.339586] ACPI: Thermal Zone [TZ01] (29 C)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.340544] GHES: HEST is not enabled!
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.341371] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.344107] ACPI: Battery Slot [BAT0] (battery present)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.344841] ACPI: Battery Slot [BAT1] (battery absent)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.363748] serial8250: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.369985] Non-volatile memory driver v1.3
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.370950] Linux agpgart interface v0.103
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.376218] loop: module loaded
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.378051] ahci 0000:00:12.0: version 3.0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.391585] ahci 0000:00:12.0: AHCI 0001.0301 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.391599] ahci 0000:00:12.0: flags: 64bit ncq sntf pm clo only pmp pio slum part deso sadm sds apst 
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.395061] scsi host0: ahci
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.396464] ata1: SATA max UDMA/133 abar m2048@0xa123f000 port 0xa123f100 irq 121
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.397035] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.397085] ehci-pci: EHCI PCI platform driver
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.397254] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.397297] ohci-pci: OHCI PCI platform driver
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.397431] uhci_hcd: USB Universal Host Controller Interface driver
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.401167] xhci_hcd 0000:00:15.0: xHCI Host Controller
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.401378] xhci_hcd 0000:00:15.0: new USB bus registered, assigned bus number 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.402981] xhci_hcd 0000:00:15.0: hcc params 0x200077c1 hci version 0x100 quirks 0x00009810
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.403026] xhci_hcd 0000:00:15.0: cache line size of 64 is not supported
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.404376] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.404390] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.404396] usb usb1: Product: xHCI Host Controller
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.404402] usb usb1: Manufacturer: Linux 4.12.0-rc7-drm-tip-ww26-commit-85a692e+ xhci-hcd
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.404408] usb usb1: SerialNumber: 0000:00:15.0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.406840] hub 1-0:1.0: USB hub found
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.407153] hub 1-0:1.0: 9 ports detected
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.458694] xhci_hcd 0000:00:15.0: xHCI Host Controller
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.458742] xhci_hcd 0000:00:15.0: new USB bus registered, assigned bus number 2
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.459644] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.459655] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.459661] usb usb2: Product: xHCI Host Controller
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.459667] usb usb2: Manufacturer: Linux 4.12.0-rc7-drm-tip-ww26-commit-85a692e+ xhci-hcd
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.459672] usb usb2: SerialNumber: 0000:00:15.0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.461764] hub 2-0:1.0: USB hub found
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.462057] hub 2-0:1.0: 7 ports detected
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.502486] usbcore: registered new interface driver usb-storage
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.503096] i8042: PNP: PS/2 Controller [PNP0303:PS2K] at 0x60,0x64 irq 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.503101] i8042: PNP: PS/2 appears to have AUX port disabled, if this is incorrect please boot with i8042.nopnp
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.503761] i8042: Warning: Keylock active
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.503916] serio: i8042 KBD port at 0x60,0x64 irq 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.505402] mousedev: PS/2 mouse device common for all mice
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.507845] rtc_cmos 00:04: RTC can wake from S4
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.509116] rtc_cmos 00:04: rtc core: registered rtc_cmos as rtc0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.509252] rtc_cmos 00:04: alarms up to one month, y3k, 242 bytes nvram, hpet irqs
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.510658] softdog: initialized. soft_noboot=0 soft_margin=60 sec soft_panic=0 (nowayout=0)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.512187] device-mapper: uevent: version 1.0.3
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.513639] device-mapper: ioctl: 4.35.0-ioctl (2016-06-23) initialised: dm-devel@redhat.com
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.513652] intel_pstate: Intel P-state driver initializing
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.518956] EFI Variables Facility v0.08 2004-May-17
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.537141] hidraw: raw HID events driver (C) Jiri Kosina
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.537782] usbcore: registered new interface driver usbhid
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.537785] usbhid: USB HID core driver
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.538243] intel_rapl: Found RAPL domain package
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.538247] intel_rapl: Found RAPL domain core
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.538251] intel_rapl: Found RAPL domain uncore
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.538255] intel_rapl: Found RAPL domain dram
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.540409] Initializing XFRM netlink socket
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.541828] NET: Registered protocol family 10
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.543776] Segment Routing with IPv6
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.543826] mip6: Mobile IPv6
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.543842] NET: Registered protocol family 17
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.543864] NET: Registered protocol family 15
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.545377] SSE version of gcm_enc/dec engaged.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.613841] alg: No test for pcbc(aes) (pcbc-aes-aesni)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.615013] registered taskstats version 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.619122] Btrfs loaded, crc32c=crc32c-generic
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.625996] rtc_cmos 00:04: setting system clock to 2017-06-28 21:06:30 UTC (1498683990)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.626487] PM: Checking hibernation image partition /dev/sda3
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.737178] atkbd serio0: Failed to deactivate keyboard on isa0060/serio0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.865100] ata1: SATA link up 6.0 Gbps (SStatus 133 SControl 300)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.880425] ata1.00: ATA-9: INTEL SSDSC2BW080A4, DC32, max UDMA/133
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.880434] ata1.00: 156301488 sectors, multi 16: LBA48 NCQ (depth 31/32), AA
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.906316] ata1.00: configured for UDMA/133
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.909075] scsi 0:0:0:0: Direct-Access     ATA      INTEL SSDSC2BW08 DC32 PQ: 0 ANSI: 5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.912958] sd 0:0:0:0: Attached scsi generic sg0 type 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.913251] sd 0:0:0:0: [sda] 156301488 512-byte logical blocks: (80.0 GB/74.5 GiB)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.913435] sd 0:0:0:0: [sda] Write Protect is off
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.913442] sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.913753] sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.919731]  sda: sda1 sda2 sda3
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [    9.923964] sd 0:0:0:0: [sda] Attached SCSI disk
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.113284] atkbd serio0: Failed to enable keyboard on isa0060/serio0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.113835] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input2
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.115664] PM: Hibernation image partition 8:3 present
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.115669] PM: Looking for hibernation image.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.118319] PM: Image not found (code -22)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.118329] PM: Hibernation image not present or could not be loaded.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.118415] ALSA device list:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.118420]   No soundcards found.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.124198] Freeing unused kernel memory: 1200K
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.124204] Write protecting the kernel read-only data: 14336k
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.127243] Freeing unused kernel memory: 1544K
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.129734] Freeing unused kernel memory: 652K
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.545427] r8169 Gigabit Ethernet driver 2.3LK-NAPI loaded
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.556155] r8169 0000:01:00.0 eth0: RTL8168h/8111h at 0xffffc90000059000, 90:49:fa:02:ae:70, XID 14100880 IRQ 123
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.556161] r8169 0000:01:00.0 eth0: jumbo features [frames: 9200 bytes, tx checksumming: ko]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.557380] Setting dangerous option alpha_support - tainting kernel
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.557389] Setting dangerous option enable_guc_loading - tainting kernel
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.557394] Setting dangerous option enable_guc_submission - tainting kernel
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.558344] sdhci: Secure Digital Host Controller Interface driver
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.558347] sdhci: Copyright(c) Pierre Ossman
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.559397] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.563722] sdhci-pci 0000:00:1c.0: SDHCI controller found [8086:31cc] (rev 1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.568439] mmc0: SDHCI controller on PCI [0000:00:1c.0] using ADMA 64-bit
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.571740] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.577710] sdhci-pci 0000:00:1e.0: SDHCI controller found [8086:31d0] (rev 1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.583813] mmc1: SDHCI controller on PCI [0000:00:1e.0] using ADMA 64-bit
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.583954] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.592850] [drm:i915_driver_load [i915]] No PCH found.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.592914] [drm:intel_power_domains_init [i915]] Allowed DC state mask 09
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.594502] [drm:intel_device_info_dump [i915]] i915 device info: platform=GEMINILAKE gen=9 pciid=0x3184 rev=0x01
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.594557] [drm:intel_device_info_dump [i915]] i915 device info: is_mobile: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.594612] [drm:intel_device_info_dump [i915]] i915 device info: is_lp: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.594664] [drm:intel_device_info_dump [i915]] i915 device info: is_alpha_support: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.594715] [drm:intel_device_info_dump [i915]] i915 device info: has_64bit_reloc: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.594766] [drm:intel_device_info_dump [i915]] i915 device info: has_aliasing_ppgtt: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.594817] [drm:intel_device_info_dump [i915]] i915 device info: has_csr: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.594868] [drm:intel_device_info_dump [i915]] i915 device info: has_ddi: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.594919] [drm:intel_device_info_dump [i915]] i915 device info: has_dp_mst: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.594969] [drm:intel_device_info_dump [i915]] i915 device info: has_reset_engine: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595019] [drm:intel_device_info_dump [i915]] i915 device info: has_fbc: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595085] [drm:intel_device_info_dump [i915]] i915 device info: has_fpga_dbg: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595135] [drm:intel_device_info_dump [i915]] i915 device info: has_full_ppgtt: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595185] [drm:intel_device_info_dump [i915]] i915 device info: has_full_48bit_ppgtt: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595235] [drm:intel_device_info_dump [i915]] i915 device info: has_gmbus_irq: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595285] [drm:intel_device_info_dump [i915]] i915 device info: has_gmch_display: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595335] [drm:intel_device_info_dump [i915]] i915 device info: has_guc: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595385] [drm:intel_device_info_dump [i915]] i915 device info: has_guc_ct: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595435] [drm:intel_device_info_dump [i915]] i915 device info: has_hotplug: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595484] [drm:intel_device_info_dump [i915]] i915 device info: has_l3_dpf: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595534] [drm:intel_device_info_dump [i915]] i915 device info: has_llc: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595584] [drm:intel_device_info_dump [i915]] i915 device info: has_logical_ring_contexts: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595634] [drm:intel_device_info_dump [i915]] i915 device info: has_overlay: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595684] [drm:intel_device_info_dump [i915]] i915 device info: has_pipe_cxsr: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595734] [drm:intel_device_info_dump [i915]] i915 device info: has_pooled_eu: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595784] [drm:intel_device_info_dump [i915]] i915 device info: has_psr: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595835] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595884] [drm:intel_device_info_dump [i915]] i915 device info: has_rc6p: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595933] [drm:intel_device_info_dump [i915]] i915 device info: has_resource_streamer: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.595982] [drm:intel_device_info_dump [i915]] i915 device info: has_runtime_pm: yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.596032] [drm:intel_device_info_dump [i915]] i915 device info: has_snoop: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.596117] [drm:intel_device_info_dump [i915]] i915 device info: unfenced_needs_alignment: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.596178] [drm:intel_device_info_dump [i915]] i915 device info: cursor_needs_physical: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.596225] [drm:intel_device_info_dump [i915]] i915 device info: hws_needs_physical: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.596272] [drm:intel_device_info_dump [i915]] i915 device info: overlay_needs_physical: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.596321] [drm:intel_device_info_dump [i915]] i915 device info: supports_tv: no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.598990] [drm:intel_device_info_runtime_init [i915]] slice mask: 0001
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599044] [drm:intel_device_info_runtime_init [i915]] slice total: 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599113] [drm:intel_device_info_runtime_init [i915]] subslice total: 3
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599164] [drm:intel_device_info_runtime_init [i915]] subslice mask 0007
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599215] [drm:intel_device_info_runtime_init [i915]] subslice per slice: 3
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599265] [drm:intel_device_info_runtime_init [i915]] EU total: 18
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599315] [drm:intel_device_info_runtime_init [i915]] EU per subslice: 6
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599365] [drm:intel_device_info_runtime_init [i915]] has slice power gating: n
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599415] [drm:intel_device_info_runtime_init [i915]] has subslice power gating: y
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599464] [drm:intel_device_info_runtime_init [i915]] has EU power gating: y
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599517] [drm:i915_driver_load [i915]] ppgtt mode: 3
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599567] [drm:i915_driver_load [i915]] use GPU semaphores? no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599618] [drm] Memory usable by graphics device = 4078M
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599675] [drm:i915_ggtt_probe_hw [i915]] GMADR size = 256M
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599730] [drm:i915_ggtt_probe_hw [i915]] GTT stolen size = 64M
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599774] [drm] Replacing VGA console driver
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599904] [drm:i915_gem_init_stolen [i915]] Memory reserved for graphics device: 65536K, usable: 57344K
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.599969] [drm:sanitize_rc6_option [i915]] BIOS enabled RC states: HW_CTRL off HW_RC6 off SW_TARGET_STATE 4
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.600433] [drm:intel_opregion_setup [i915]] graphic opregion physical addr: 0x79a35018
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.600530] [drm:intel_opregion_setup [i915]] Public ACPI methods supported
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.600589] [drm:intel_opregion_setup [i915]] ASLE supported
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.600668] [drm:intel_opregion_setup [i915]] Found valid VBT in ACPI OpRegion (RVDA)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.600994] [drm:intel_gvt_init [i915]] GVT-g is disabled by kernel params
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601021] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601023] [drm] Driver supports precise vblank timestamp query.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601085] [drm:intel_bios_init [i915]] Set default to SSC at 100000 kHz
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601145] [drm:intel_bios_init [i915]] VBT signature "$VBT GEMINILAKE     ", BDB version 210
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601206] [drm:intel_bios_init [i915]] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 0 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601264] [drm:intel_bios_init [i915]] crt_ddc_bus_pin: 2
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601325] [drm:intel_opregion_get_panel_type [i915]] Failed to get panel details from OpRegion (-19)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601383] [drm:intel_bios_init [i915]] Panel type: 2 (VBT)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601440] [drm:intel_bios_init [i915]] DRRS supported mode is seamless
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601504] [drm:intel_bios_init [i915]] Found panel mode in BIOS VBT tables:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601513] [drm:drm_mode_debug_printmodeline] Modeline 0:"1024x768" 0 65000 1024 1048 1184 1344 768 771 777 806 0x8 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601570] [drm:intel_bios_init [i915]] VBT initial LVDS value 300
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601629] [drm:intel_bios_init [i915]] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 0, level 180, controller 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601687] [drm:intel_bios_init [i915]] Unsupported child device size for SDVO mapping.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601744] [drm:intel_bios_init [i915]] Expected child device config size for VBT version 210 not known; assuming 38
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601805] [drm:intel_bios_init [i915]] DRRS State Enabled:1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601863] [drm:intel_bios_init [i915]] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601919] [drm:intel_bios_init [i915]] VBT HDMI level shift for port A: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.601975] [drm:intel_bios_init [i915]] Port B VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.602031] [drm:intel_bios_init [i915]] VBT HDMI level shift for port B: 8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.602223] [drm:intel_bios_init [i915]] Port C VBT info: DP:0 HDMI:1 DVI:1 EDP:0 CRT:0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.603565] [drm:intel_bios_init [i915]] VBT HDMI level shift for port C: 8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.606026] [drm:intel_dsm_detect [i915]] no _DSM method for intel device
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.606520] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.607573] [drm:intel_power_well_enable [i915]] enabling power well 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.608092] [drm:intel_update_cdclk [i915]] Current CD clock rate: 316800 kHz, VCO: 633600 kHz, ref: 19200 kHz
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.608168] [drm:intel_power_well_enable [i915]] enabling always-on
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.608223] [drm:intel_power_well_enable [i915]] enabling DC off
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.608473] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 00
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.608537] [drm:intel_power_well_enable [i915]] enabling power well 2
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.609910] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.613586] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.613688] [drm:_bxt_ddi_phy_init [i915]] DDI PHY 0 already enabled, won't reprogram it
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.613745] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.614091] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.614150] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.614205] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.614262] [drm:intel_power_well_enable [i915]] enabling AUX C
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.614318] [drm:skl_set_power_well [i915]] Enabling AUX C
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.614431] [drm:intel_csr_ucode_init [i915]] Loading i915/glk_dmc_ver1_04.bin
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.616300] [drm] Finished loading DMC firmware i915/glk_dmc_ver1_04.bin (v1.4)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.616552] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001a18 hp_port:38
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.619641] [drm:intel_fbc_init [i915]] Sanitized enable_fbc value: 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.619716] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM0 latency 7 (7.0 usec)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.620310] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM1 latency 7 (7.0 usec)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.620364] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM2 latency 8 (8.0 usec)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.620417] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM3 latency 22 (22.0 usec)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.620470] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM4 latency 22 (22.0 usec)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.620523] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM5 latency 22 (22.0 usec)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.620575] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM6 latency 22 (22.0 usec)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.620627] [drm:intel_print_wm_latency [i915]] Gen9 Plane WM7 latency 22 (22.0 usec)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.620689] [drm:intel_modeset_init [i915]] 3 display pipes available.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.621439] [drm:intel_update_cdclk [i915]] Current CD clock rate: 316800 kHz, VCO: 633600 kHz, ref: 19200 kHz
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.621522] [drm:intel_update_max_cdclk [i915]] Max CD clock rate: 316800 kHz
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.621582] [drm:intel_update_max_cdclk [i915]] Max dotclock rate: 627264 kHz
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.621601] i915 0000:00:02.0: vgaarb: changed VGA decodes: olddecodes=io+mem,decodes=io+mem:owns=io+mem
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.622047] [drm:intel_ddi_init [i915]] BXT BIOS forgot to set DDI_A_4_LANES for port A; fixing
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.622149] [drm:intel_dp_init_connector [i915]] Adding eDP connector on port A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.622238] [drm:intel_dp_init_connector [i915]] using AUX A for port A (VBT)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.622343] [drm:intel_pps_dump_state [i915]] cur t1_t3 0 t8 0 t9 0 t10 500 t11_t12 6000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.622406] [drm:intel_pps_dump_state [i915]] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 6000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.622464] [drm:intel_dp_init_panel_power_sequencer [i915]] panel power up delay 200, power down delay 50, power cycle delay 600
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.622521] [drm:intel_dp_init_panel_power_sequencer [i915]] backlight on delay 1, off delay 200
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.622584] [drm:intel_dp_init_panel_power_sequencer_registers [i915]] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x60
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.622641] [drm:intel_edp_panel_vdd_sanitize [i915]] VDD left on by BIOS, adjusting state tracking
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.623180] r8169 0000:01:00.0 enp1s0: renamed from eth0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.623521] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 82 41 00 00 01 80 02 00 00 00 0f 0b 00
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.623951] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.624422] [drm:intel_dp_init_connector [i915]] Detected EDP PSR Panel.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.624829] [drm:intel_dp_init_connector [i915]] EDP DPCD : 02 fb e7
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.628862] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.629106] [drm:intel_dp_init_connector [i915]] Downclock mode is not found. DRRS not supported
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.629166] [drm:intel_dp_aux_init_backlight_funcs [i915]] AUX Backlight Control Supported!
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.629977] [drm:intel_panel_setup_backlight [i915]] Connector eDP-1 backlight initialized, enabled, brightness 65472/65535
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.630181] [drm:intel_dp_init_connector [i915]] Adding DP connector on port B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.630250] [drm:intel_dp_init_connector [i915]] using AUX B for port B (VBT)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.630368] [drm:intel_hdmi_init_connector [i915]] Adding HDMI connector on port B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.630433] [drm:intel_hdmi_init_connector [i915]] Using DDC pin 0x1 for port B (VBT)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.630535] [drm:intel_hdmi_init_connector [i915]] Adding HDMI connector on port C
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.630599] [drm:intel_hdmi_init_connector [i915]] Using DDC pin 0x2 for port C (VBT)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.630654] [drm:intel_dsi_init [i915]] 
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.630858] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.630923] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:36:pipe A] hw state readout: enabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.630993] [drm:intel_set_plane_visible [i915]] pipe B active planes 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631069] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:47:pipe B] hw state readout: disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631135] [drm:intel_set_plane_visible [i915]] pipe C active planes 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631193] [drm:intel_modeset_setup_hw_state [i915]] [CRTC:58:pipe C] hw state readout: disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631254] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL A hw state readout: crtc_mask 0x00000000, on 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631335] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL B hw state readout: crtc_mask 0x00000001, on 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631394] [drm:intel_modeset_setup_hw_state [i915]] PORT PLL C hw state readout: crtc_mask 0x00000000, on 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631455] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:59:DDI A] hw state readout: disabled, pipe A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631532] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:67:DDI B] hw state readout: enabled, pipe A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631588] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:69:DP-MST A] hw state readout: disabled, pipe A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631644] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:70:DP-MST B] hw state readout: disabled, pipe B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631700] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:71:DP-MST C] hw state readout: disabled, pipe C
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631758] [drm:intel_modeset_setup_hw_state [i915]] [ENCODER:74:DDI C] hw state readout: disabled, pipe A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631847] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:60:eDP-1] hw state readout: disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631913] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:68:DP-1] hw state readout: enabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.631975] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:72:HDMI-A-1] hw state readout: disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.632036] [drm:intel_modeset_setup_hw_state [i915]] [CONNECTOR:75:HDMI-A-2] hw state readout: disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.632179] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880175b30008
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.632290] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.632633] [drm:intel_dump_pipe_config [i915]] [CRTC:36:pipe A][setup_hw_state]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.632690] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: A, pipe bpp: 24, dithering: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.632746] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.632802] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.632809] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 109 270000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.632864] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.632869] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 109 270000 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.632926] [drm:intel_dump_pipe_config [i915]] crtc timings: 270000 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x40 flags: 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.632981] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 270000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633037] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633108] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633162] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633221] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633276] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633330] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633385] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633439] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 3A] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633494] [drm:intel_dump_pipe_config [i915]] [PLANE:32:plane 4A] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633547] [drm:intel_dump_pipe_config [i915]] [PLANE:34:cursor A] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633603] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][setup_hw_state]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633656] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 0, dithering: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633710] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633763] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633768] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633821] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633826] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633879] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633933] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.633987] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634040] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634108] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634165] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634218] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634272] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 1B] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634326] [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2B] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634379] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 3B] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634432] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4B] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634485] [drm:intel_dump_pipe_config [i915]] [PLANE:45:cursor B] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634540] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe C][setup_hw_state]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634592] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 0, dithering: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634645] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634697] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634702] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634754] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634759] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634812] [drm:intel_dump_pipe_config [i915]] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634864] [drm:intel_dump_pipe_config [i915]] port clock: 0, pipe src size: 0x0, pixel rate 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634917] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.634970] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.635022] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.635090] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683995.8261] NetworkManager (version 1.2.4) is starting...
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.635166] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.635220] [drm:intel_dump_pipe_config [i915]] [PLANE:48:plane 1C] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.635273] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 2C] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.635326] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 3C] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.635379] [drm:intel_dump_pipe_config [i915]] [PLANE:54:plane 4C] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.635432] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor C] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.635653] [drm:intel_power_well_disable [i915]] disabling AUX C
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.635715] [drm:skl_set_power_well [i915]] Disabling AUX C
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.635772] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.635828] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683995.8268] Read config: /etc/NetworkManager/NetworkManager.conf (etc: default-wifi-powersave-on.conf)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.635884] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.636000] [drm:skylake_get_initial_plane_config [i915]] pipe A with fb: size=1920x1080@32, offset=0, pitch 7680, size 0x7e9000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.636078] [drm:i915_gem_object_create_stolen_for_preallocated [i915]] creating preallocated stolen object: stolen_offset=0, gtt_offset=0, size=7e9000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.636173] [drm:i915_gem_object_create_stolen_for_preallocated [i915]] failed to allocate stolen space
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.636242] [drm:intel_set_plane_visible [i915]] pipe A active planes 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.636301] [drm:fetch_uc_fw [i915]] before requesting firmware: uC fw fetch status PENDING
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.636892] [drm:fetch_uc_fw [i915]] fetch uC fw from i915/glk_huc_ver02_00_1748.bin succeeded, fw ffff880175b3c738
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.636949] [drm:fetch_uc_fw [i915]] firmware version 2.0 OK (minimum 2.0)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.637336] [drm:fetch_uc_fw [i915]] uC fw fetch status SUCCESS, obj ffff880175040040
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.637495] [drm:fetch_uc_fw [i915]] before requesting firmware: uC fw fetch status PENDING
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.637782] [drm:fetch_uc_fw [i915]] fetch uC fw from i915/glk_guc_ver10_56.bin succeeded, fw ffff880175b3c738
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.637836] [drm:fetch_uc_fw [i915]] firmware version 10.56 OK (minimum 10.56)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.638058] [drm:fetch_uc_fw [i915]] uC fw fetch status SUCCESS, obj ffff880175047840
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.638689] [drm:i915_gem_init_ggtt [i915]] clearing unused GTT space: [1000, fee00000]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.638838] [drm:i915_gem_contexts_init [i915]] logical context support initialized
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.638998] [drm:intel_engine_create_scratch [i915]] rcs0 pipe control offset: 0xfedff000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.641018] [drm:gen8_init_common_ring [i915]] Execlists enabled for rcs0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.641121] [drm:init_workarounds_ring [i915]] rcs0: Number of context specific w/a: 12
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683995.8390] manager[0x5577d81b11a0]: monitoring kernel firmware directory '/lib/firmware'.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.641245] [drm:gen8_init_common_ring [i915]] Execlists enabled for bcs0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.641368] [drm:gen8_init_common_ring [i915]] Execlists enabled for vcs0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.641490] [drm:gen8_init_common_ring [i915]] Execlists enabled for vecs0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.644427] [drm:intel_huc_init_hw [i915]] i915/glk_huc_ver02_00_1748.bin fw status: fetch SUCCESS, load NONE
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.646933] [drm:intel_huc_init_hw [i915]] HuC DMA transfer wait over with ret 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.647001] [drm:intel_huc_init_hw [i915]] i915/glk_huc_ver02_00_1748.bin fw status: fetch SUCCESS, load SUCCESS
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.647151] [drm:intel_guc_init_hw [i915]] GuC fw status: path i915/glk_guc_ver10_56.bin, fetch SUCCESS, load NONE
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.647205] [drm:intel_guc_init_hw [i915]] GuC fw status: fetch SUCCESS, load PENDING
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.653671] [drm:guc_ucode_xfer_dma [i915]] DMA status 0x10, GuC status 0x8002f0ec
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.653734] [drm:guc_ucode_xfer_dma [i915]] returning 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.653739] [drm] GuC submission enabled (firmware i915/glk_guc_ver10_56.bin [version 10.56])
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683995.8400] monitoring ifupdown state file '/run/network/ifstate'.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.659509] [drm:i915_guc_submission_enable [i915]] reserved cacheline 0x0, next 0x40, linesize 64
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.659572] [drm:i915_guc_submission_enable [i915]] Host engines 0x17 => GuC engines used 0xf
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.659628] [drm:__reserve_doorbell [i915]] client 0 (high prio=no) reserved doorbell: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.661945] [drm:i915_guc_submission_enable [i915]] new priority 2 client ffff880175358848 for engine(s) 0x17: stage_id 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.662005] [drm:i915_guc_submission_enable [i915]] doorbell id 0, cacheline offset 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.665587] [drm:intel_fbdev_init [i915]] pipe A not active or no fb, skipping
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.665647] [drm:intel_fbdev_init [i915]] pipe B not active or no fb, skipping
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.665703] [drm:intel_fbdev_init [i915]] pipe C not active or no fb, skipping
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.665758] [drm:intel_fbdev_init [i915]] no active fbs found, not using BIOS config
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.665902] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting: hp_ctl:18001818 hp_port:38
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.668604] [drm:intel_backlight_device_register [i915]] Connector eDP-1 backlight sysfs interface registered
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.668745] [drm:intel_dp_connector_register [i915]] registering DPDDC-A bus for card0-eDP-1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.670278] [drm:intel_dp_connector_register [i915]] registering DPDDC-B bus for card0-DP-1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.672137] [drm] Initialized i915 1.6.0 20170619 for 0000:00:02.0 on minor 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.675034] [drm:intel_opregion_register [i915]] 4 outputs detected
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.689412] ACPI: Video Device [GFX0] (multi-head: yes  rom: no  post: no)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.693249] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input3
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.694230] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.695269] [drm] DRM_I915_DEBUG enabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.695272] [drm] DRM_I915_DEBUG_GEM enabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.696623] [drm:drm_setup_crtcs] 
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.696641] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.696740] [drm:intel_dp_detect [i915]] [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.696811] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.696871] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.696928] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.696984] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.697499] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.698204] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1] status updated from unknown to connected
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.698348] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.698362] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1] probed modes :
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.698368] [drm:drm_mode_debug_printmodeline] Modeline 61:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.698373] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.698433] [drm:intel_dp_detect [i915]] [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.698495] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.698563] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.698567] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.699641] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.700575] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.700635] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.700693] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.700749] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.701723] [drm:drm_dp_read_desc] DP sink: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.701780] [drm:intel_dp_detect [i915]] Sink is not MST capable
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711245] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711302] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711313] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1] status updated from unknown to connected
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711386] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711400] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1] probed modes :
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711405] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711410] [drm:drm_mode_debug_printmodeline] Modeline 81:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711414] [drm:drm_mode_debug_printmodeline] Modeline 86:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711418] [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711422] [drm:drm_mode_debug_printmodeline] Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711427] [drm:drm_mode_debug_printmodeline] Modeline 87:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711431] [drm:drm_mode_debug_printmodeline] Modeline 88:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711435] [drm:drm_mode_debug_printmodeline] Modeline 89:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711439] [drm:drm_mode_debug_printmodeline] Modeline 82:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711443] [drm:drm_mode_debug_printmodeline] Modeline 83:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711448] [drm:drm_mode_debug_printmodeline] Modeline 84:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711452] [drm:drm_mode_debug_printmodeline] Modeline 85:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711456] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.711520] [drm:intel_hdmi_detect [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.713934] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.714031] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.716395] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.716414] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.718876] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.718938] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.721370] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.721393] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.721405] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] status updated from unknown to disconnected
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.721411] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] disconnected
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.721421] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.721500] [drm:intel_hdmi_detect [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.803937] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683995.8597] dns-mgr[0x5577d81a9940]: init: dns=dnsmasq, rc-manager=resolvconf, plugin=dnsmasq
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.804016] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806407] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806430] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806442] [drm:drm_rgb_quant_range_selectable] CEA VCDB 0x2b
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806452] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2] status updated from unknown to connected
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806731] [drm:drm_add_edid_modes] HDMI: DVI dual 0, max TMDS clock 170000 kHz
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806737] [drm:drm_edid_to_eld] ELD monitor HP E232
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806743] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806747] [drm:drm_edid_to_eld] ELD size 28, SAD count 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806843] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2] probed modes :
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806851] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806857] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806863] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806869] [drm:drm_mode_debug_printmodeline] Modeline 98:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806874] [drm:drm_mode_debug_printmodeline] Modeline 97:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806880] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806886] [drm:drm_mode_debug_printmodeline] Modeline 99:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806892] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806897] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806903] [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806908] [drm:drm_mode_debug_printmodeline] Modeline 95:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806914] [drm:drm_mode_debug_printmodeline] Modeline 104:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806920] [drm:drm_mode_debug_printmodeline] Modeline 102:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806925] [drm:drm_mode_debug_printmodeline] Modeline 111:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806931] [drm:drm_mode_debug_printmodeline] Modeline 116:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806937] [drm:drm_mode_debug_printmodeline] Modeline 96:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806942] [drm:drm_mode_debug_printmodeline] Modeline 117:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806948] [drm:drm_mode_debug_printmodeline] Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806984] [drm:drm_setup_crtcs] connector 60 enabled? yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806989] [drm:drm_setup_crtcs] connector 68 enabled? yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.806993] [drm:drm_setup_crtcs] connector 72 enabled? no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807033] [drm:drm_setup_crtcs] connector 75 enabled? yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807121] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807135] [drm:drm_setup_crtcs] looking for cmdline mode on connector 60
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807140] [drm:drm_setup_crtcs] looking for preferred mode on connector 60 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807144] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807148] [drm:drm_setup_crtcs] looking for cmdline mode on connector 68
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807153] [drm:drm_setup_crtcs] looking for preferred mode on connector 68 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807157] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807161] [drm:drm_setup_crtcs] looking for cmdline mode on connector 75
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807165] [drm:drm_setup_crtcs] looking for preferred mode on connector 75 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807169] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807174] [drm:drm_setup_crtcs] picking CRTCs for 8192x8192 config
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807327] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 36 (0,0)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807339] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 47 (0,0)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807349] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 58 (0,0)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.807444] [drm:intelfb_create [i915]] no BIOS fb, allocating a new one
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.811437] [drm:intelfb_create [i915]] allocated 1920x1080 fb: 0x00180000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.812578] fbcon: inteldrmfb (fb0) is primary device
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813744] [drm:drm_atomic_state_init] Allocated atomic state ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813760] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880174c9e758 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813770] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff880174c9d038 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813775] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174c9d038 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813778] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174c9d038
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813789] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff880174c9ee48 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813792] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174c9ee48 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813795] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174c9ee48
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813805] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff880174c9ebf8 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813808] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174c9ebf8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813811] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174c9ebf8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813820] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff880174c9e9a8 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813823] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174c9e9a8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813826] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174c9e9a8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813835] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880179efb098 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813844] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff880179efb2e8 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813847] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880179efb2e8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813850] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880179efb2e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813859] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff880179ef8b98 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813862] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880179ef8b98 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813865] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880179ef8b98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813891] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff880175bf4008 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813895] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175bf4008 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813897] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175bf4008
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813908] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff880175bf7c28 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813911] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175bf7c28 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813914] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175bf7c28
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813924] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880175bf4258 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813933] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff880175bf79d8 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813936] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175bf79d8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813939] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175bf79d8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813954] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff880174cabc28 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813957] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174cabc28 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813959] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174cabc28
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813970] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff880174ca8258 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813973] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174ca8258 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813976] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174ca8258
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813987] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff880174ca8008 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813990] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174ca8008 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.813992] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174ca8008
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814028] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff8801752c4138 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814047] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff8801752c4138
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814051] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174c9e758 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814054] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880174c9e758
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814059] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814087] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880179f16748 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814096] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16748 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814106] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880179f175c8 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814110] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f175c8 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814122] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff8801752c2e98 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814133] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff8801752c2e98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814136] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880179efb098 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814140] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880179efb098
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814144] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814152] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16748 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814164] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff8801752c37e8 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814175] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff8801752c37e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814178] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175bf4258 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814181] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175bf4258
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814185] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814199] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880179f173f8 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814202] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f173f8 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814206] [drm:drm_atomic_check_only] checking ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814212] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] mode changed
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814216] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] mode changed
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814219] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] enable changed
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814221] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] active changed
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814224] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] mode changed
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814227] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] enable changed
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814230] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] active changed
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814240] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814245] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] using [ENCODER:59:DDI A] on [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814249] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814253] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814257] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814261] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] using [ENCODER:74:DDI C] on [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814264] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] needs all connectors, enable: y, active: y
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814268] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814276] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] needs all connectors, enable: y, active: y
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814280] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814288] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] needs all connectors, enable: y, active: y
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814291] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814303] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814397] [drm:intel_atomic_check [i915]] [CONNECTOR:60:eDP-1] checking for sink bpp constrains
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814475] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814558] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814642] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814715] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814796] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814873] [drm:intel_dump_pipe_config [i915]] [CRTC:36:pipe A][modeset]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.814951] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815026] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815122] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815194] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815200] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815271] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815276] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815348] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815420] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815492] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815563] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815633] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815712] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815783] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815854] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815925] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.815994] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 3A] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816088] [drm:intel_dump_pipe_config [i915]] [PLANE:32:plane 4A] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816157] [drm:intel_dump_pipe_config [i915]] [PLANE:34:cursor A] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816162] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816237] [drm:intel_atomic_check [i915]] [CONNECTOR:68:DP-1] checking for sink bpp constrains
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816308] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816384] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816458] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816529] [drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816601] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816671] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][modeset]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816740] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816809] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816878] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816945] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.816951] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817018] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817044] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817113] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817181] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 148500
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817250] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817318] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817385] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817457] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817525] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817593] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 1B] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817660] [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2B] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817727] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 3B] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817794] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4B] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817861] [drm:intel_dump_pipe_config [i915]] [PLANE:45:cursor B] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817866] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.817940] [drm:intel_atomic_check [i915]] [CONNECTOR:75:HDMI-A-2] checking for sink bpp constrains
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.818008] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.818134] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.818236] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.818336] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.818433] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe C][modeset]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.818528] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 24, dithering: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.818623] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.818717] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.818725] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.818819] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.818826] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.818922] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819016] [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819147] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819214] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819262] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819315] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x0, ebb4: 0x0,pll0: 0x0, pll1: 0x0, pll2: 0x0, pll3: 0x0, pll6: 0x0, pll8: 0x0, pll9: 0x0, pll10: 0x0, pcsdw12: 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819364] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819414] [drm:intel_dump_pipe_config [i915]] [PLANE:48:plane 1C] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819462] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 2C] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819511] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 3C] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819559] [drm:intel_dump_pipe_config [i915]] [PLANE:54:plane 4C] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819607] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor C] disabled, scaler_id = -1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819665] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819725] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819776] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819827] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819878] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819928] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.819981] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 0 -> 1, off 0, on 1, ms 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820053] [drm:bxt_get_dpll [i915]] [CRTC:36:pipe A] using pre-allocated PORT PLL A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820134] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820188] [drm:bxt_get_dpll [i915]] [CRTC:47:pipe B] using pre-allocated PORT PLL B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820239] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820291] [drm:skl_update_scaler [i915]] scaler_user index 1.31: Staged freeing scaler id 0 scaler_users = 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820347] [drm:bxt_get_dpll [i915]] [CRTC:58:pipe C] using pre-allocated PORT PLL C
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820397] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe C
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820447] [drm:skl_update_scaler [i915]] scaler_user index 2.31: Staged freeing scaler id 0 scaler_users = 0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820539] [drm:skl_compute_wm [i915]] [PLANE:26:plane 1A] ddb (0 - 510) -> (0 - 332)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820589] [drm:skl_compute_wm [i915]] [PLANE:34:cursor A] ddb (0 - 0) -> (332 - 340)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820640] [drm:skl_compute_wm [i915]] [PLANE:37:plane 1B] ddb (510 - 1020) -> (340 - 672)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820689] [drm:skl_compute_wm [i915]] [PLANE:45:cursor B] ddb (0 - 0) -> (672 - 680)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820738] [drm:skl_compute_wm [i915]] [PLANE:48:plane 1C] ddb (0 - 0) -> (680 - 1012)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820787] [drm:skl_compute_wm [i915]] [PLANE:56:cursor C] ddb (0 - 0) -> (1012 - 1020)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.820790] [drm:drm_atomic_commit] committing ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.821378] [drm:intel_disable_pipe [i915]] disabling pipe A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.823708] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.823773] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.824330] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.824384] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.824450] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.824507] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.824682] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 1, on? 1) for crtc 36
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.824895] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.824969] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.825370] [drm:intel_set_cdclk [i915]] Changing CDCLK to 79200 kHz, VCO 633600 kHz, ref 19200 kHz
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.825467] [drm:intel_update_cdclk [i915]] Current CD clock rate: 79200 kHz, VCO: 633600 kHz, ref: 19200 kHz
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.825527] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DDI A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.825585] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:DDI B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.825642] [drm:intel_atomic_commit_tail [i915]] [ENCODER:69:DP-MST A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.825698] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.825754] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.825809] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DDI C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.825866] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.825921] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.825976] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.826141] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 36
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.826195] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.826586] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   10.826649] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.225535] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 0000006a
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.225649] [drm:wait_panel_status [i915]] Wait complete
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.225754] [drm:edp_panel_on [i915]] Wait for panel power on
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.225860] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 0000006b
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.428066] [drm:wait_panel_status [i915]] Wait complete
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.428244] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.428351] [drm:skl_set_power_well [i915]] Enabling DDI A IO power well
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.429802] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.429909] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.430017] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.430907] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.431007] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.432198] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.432300] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.434231] [drm:intel_enable_pipe [i915]] enabling pipe A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.434394] [drm:intel_edp_backlight_on [i915]] 
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.434499] [drm:intel_panel_enable_backlight [i915]] pipe A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.435346] [drm:intel_dp_aux_enable_backlight [i915]] VBT defined backlight frequency 200 Hz
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.436849] [drm:intel_dp_aux_enable_backlight [i915]] Enable dynamic brightness.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.437375] [drm:intel_psr_enable [i915]] PSR not supported on this platform
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.437474] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.437632] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.437742] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.451445] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 47
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.451551] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.451825] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.451928] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.452030] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.452168] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.452744] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.452847] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.453595] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.453707] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.454287] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.454423] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.455388] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.455501] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.456153] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.456251] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.457236] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.457349] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.457985] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.458082] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.458231] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.458324] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.458893] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.458998] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.459172] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.459277] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.459387] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.459488] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.459583] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.460209] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.460304] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.460540] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.460632] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.461194] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.461289] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.462268] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.462330] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.462867] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.462920] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.462981] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.463030] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.463610] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.463693] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.463757] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.463821] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.463874] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.463925] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.464449] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.464517] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.464970] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.465019] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.465588] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.465638] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.466630] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.466695] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.467220] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.467285] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.467342] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.467393] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.467926] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.467979] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.468049] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.470448] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 162000, Lane count = 4
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.470524] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.470583] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.471108] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.471163] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.472213] [drm:intel_enable_pipe [i915]] enabling pipe B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.472449] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 4, on? 0) for crtc 58
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.472509] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.472705] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.472779] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.473972] [drm:intel_enable_pipe [i915]] enabling pipe C
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.491951] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.492148] [drm:intel_atomic_commit_tail [i915]] [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.492375] [drm:intel_ddi_get_config [i915]] pipe has 24 bpp for eDP panel, overriding BIOS-provided max 18 bpp
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.492554] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.492818] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.492946] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.493191] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.493506] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.493610] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.493851] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.493942] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494144] [drm:__drm_atomic_state_free] Freeing atomic state ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494236] Console: switching to colour frame buffer device 240x67
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494824] [drm:drm_atomic_state_init] Allocated atomic state ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494842] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880175b312a8 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494860] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880174ca84a8 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494879] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880175b312a8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494884] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174ca84a8 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494890] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880174ca84a8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494897] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494921] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880179f16918 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494930] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16918 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494937] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16918 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494952] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880175b30008 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494966] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880174cab9d8 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494982] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880175b30008
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494987] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174cab9d8 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494992] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880174cab9d8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.494998] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495042] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880179f16008 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495050] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16008 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495056] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16008 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495071] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880175b30958 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495085] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880174ca86f8 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495101] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880175b30958
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495106] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174ca86f8 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495110] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880174ca86f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495117] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495134] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880179f16ae8 state to ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495140] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16ae8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495146] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880179f16ae8 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495151] [drm:drm_atomic_check_only] checking ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495172] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495179] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495184] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495190] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495195] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495201] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495313] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495415] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495517] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495615] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495714] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495812] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.495839] [drm:drm_atomic_commit] committing ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.508370] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.508524] [drm:__drm_atomic_state_free] Freeing atomic state ffff8801766ac518
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.523118] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.621943] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: (null)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   11.778261] [drm] RC6 on
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   12.333332] EXT4-fs (sda2): re-mounted. Opts: (null)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.423628] snd_hda_intel 0000:00:0e.0: bound 0000:00:02.0 (ops i915_audio_component_bind_ops [i915])
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.425277] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.473583] snd_hda_codec_realtek hdaudioC0D0: autoconfig for ALC298: line_outs=1 (0x14/0x0/0x0/0x0/0x0) type:speaker
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.473588] snd_hda_codec_realtek hdaudioC0D0:    speaker_outs=0 (0x0/0x0/0x0/0x0/0x0)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.473592] snd_hda_codec_realtek hdaudioC0D0:    hp_outs=1 (0x21/0x0/0x0/0x0/0x0)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.473594] snd_hda_codec_realtek hdaudioC0D0:    mono: mono_out=0x0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.473597] snd_hda_codec_realtek hdaudioC0D0:    inputs:
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.473600] snd_hda_codec_realtek hdaudioC0D0:      Mic=0x18
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.473603] snd_hda_codec_realtek hdaudioC0D0:      Internal Mic=0x12
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.477521] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.510999] [drm:intel_backlight_device_update_status [i915]] updating intel_backlight, brightness=65472/65535
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.511094] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 65472
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.523249] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.532845] input: HDA Intel PCH Mic as /devices/pci0000:00/0000:00:0e.0/sound/card0/input4
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.533932] input: HDA Intel PCH Headphone as /devices/pci0000:00/0000:00:0e.0/sound/card0/input5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.576254] sdhci-pci 0000:00:1b.0: SDHCI controller found [8086:31ca] (rev 1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624156] [drm:drm_atomic_state_init] Allocated atomic state ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624176] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88017807dd28 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624185] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880175281bc8 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624206] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88017807dd28
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624209] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175281bc8 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624212] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175281bc8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624216] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624243] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880178362748 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6699] init!
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6710] guessed connection type (enp1s0) = 802-3-ethernet
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6713] update_connection_setting_from_if_block: name:enp1s0, type:802-3-ethernet, id:Ifupdown (enp1s0), uuid: d4f520cc-fe82-d7ba-f35b-8e9bb7ffe98b
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6715] addresses count: 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624253] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880178362748 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6716] adding enp1s0 to connections
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624256] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880178362748 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624266] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff88017807d3d8 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624273] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880175281288 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624282] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88017807d3d8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624284] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175281288 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624287] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175281288
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624290] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624299] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880178363058 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624303] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880178363058 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624305] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880178363058 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6717] adding iface enp1s0 to eni_ifaces
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624314] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff8801780792a8 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624321] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff8801752814d8 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624330] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff8801780792a8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624332] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801752814d8 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624335] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff8801752814d8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624338] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6717] autoconnect
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624347] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880178362918 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624350] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880178362918 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624353] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880178362918 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624355] [drm:drm_atomic_check_only] checking ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624368] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624372] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624374] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624378] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624380] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6718] management mode: unmanaged
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624383] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624457] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624505] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624553] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624598] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624644] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624689] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.624711] [drm:drm_atomic_commit] committing ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.641451] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.641536] [drm:__drm_atomic_state_free] Freeing atomic state ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695622] [drm:drm_atomic_state_init] Allocated atomic state ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695638] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177ee12a8 state to ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695647] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880174c9dbc8 state to ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695659] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177ee12a8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695662] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174c9dbc8 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695665] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880174c9dbc8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6737] devices added (path: /sys/devices/pci0000:00/0000:00:13.0/0000:01:00.0/net/enp1s0, iface: enp1s0)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695669] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695687] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880177db95c8 state to ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695692] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db95c8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695696] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db95c8 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695705] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177ee5d28 state to ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695740] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880177d38008 state to ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695749] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177ee5d28
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695751] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177d38008 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695754] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177d38008
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695757] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6739] locking wired connection setting
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695767] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff8801753a5b38 state to ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695771] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801753a5b38 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695774] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801753a5b38 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695783] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177ee1bf8 state to ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695791] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880177d3bc28 state to ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695799] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177ee1bf8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695802] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177d3bc28 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695804] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177d3bc28
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6740] devices added (path: /sys/devices/virtual/net/lo, iface: lo)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695807] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695819] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff8801753a5d08 state to ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695823] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801753a5d08 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695825] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801753a5d08 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695828] [drm:drm_atomic_check_only] checking ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695841] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695845] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6741] device added (path: /sys/devices/virtual/net/lo, iface: lo): no ifupdown configuration found.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695848] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695851] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695853] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695856] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695929] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6742] end _init.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6742] settings: loaded plugin ifupdown: (C) 2008 Canonical Ltd.  To report bugs please use the NetworkManager mailing list. (/usr/lib/x86_64-linux-gnu/NetworkManager/libnm-settings-plugin-ifupdown.so)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6743] settings: loaded plugin keyfile: (c) 2007 - 2015 Red Hat, Inc.  To report bugs please use the NetworkManager mailing list.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6748] SettingsPlugin-Ofono: init!
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.695978] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.696025] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <warn>  [1498683996.6750] SettingsPlugin-Ofono: file doesn't exist: /var/lib/ofono
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.696088] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.696134] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.696178] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.696195] [drm:drm_atomic_commit] committing ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.708122] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.708205] [drm:__drm_atomic_state_free] Freeing atomic state ffff880178606f98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.789204] Adding 16642044k swap on /dev/sda3.  Priority:-1 extents:1 across:16642044k SSFS
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.802497] FAT-fs (sda1): Volume was not properly unmounted. Some data may be corrupt. Please run fsck.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820145] [drm:drm_atomic_state_init] Allocated atomic state ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820157] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177ee53d8 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820166] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880177d3a758 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820180] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177ee53d8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820182] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177d3a758 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820185] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177d3a758
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820189] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820205] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880177e86918 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820210] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177e86918 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820213] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177e86918 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820222] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177ee0958 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6750] SettingsPlugin-Ofono: end _init.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820229] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880177d3a2b8 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820238] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177ee0958
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820240] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177d3a2b8 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820243] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177d3a2b8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820246] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820255] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880177e873f8 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820259] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177e873f8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820261] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177e873f8 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820271] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177ee6678 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820278] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880177d38b98 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6751] settings: loaded plugin ofono: (C) 2013-2016 Canonical Ltd.  To report bugs please use the NetworkManager mailing list. (/usr/lib/x86_64-linux-gnu/NetworkManager/libnm-settings-plugin-ofono.so)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820286] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177ee6678
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820288] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177d38b98 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820291] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177d38b98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820294] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820304] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880177e863a8 state to ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820307] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177e863a8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820309] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177e863a8 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6752] (-669230736) ... get_connections.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820312] [drm:drm_atomic_check_only] checking ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820324] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820328] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820331] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820334] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820336] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820339] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820414] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820462] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820509] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820555] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820601] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820646] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.820663] [drm:drm_atomic_commit] committing ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.832473] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.832561] [drm:__drm_atomic_state_free] Freeing atomic state ffff8801786064f8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845212] [drm:drm_atomic_state_init] Allocated atomic state ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845229] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177d00008 state to ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845240] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880177d3bc28 state to ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6752] (-669230736) ... get_connections (managed=false): return empty list.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845254] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177d00008
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845258] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177d3bc28 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845261] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177d3bc28
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845265] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845282] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880177db8008 state to ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845287] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db8008 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845290] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db8008 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845300] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177d06fc8 state to ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845308] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880177d38008 state to ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845317] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177d06fc8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6845] SettingsPlugin-Ofono: (939540928) ... get_connections.
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845320] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177d38008 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845323] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177d38008
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845326] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845335] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880177db9968 state to ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845339] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db9968 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845342] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db9968 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6845] SettingsPlugin-Ofono: (939540928) connections count: 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683996.6847] get unmanaged devices count: 1
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845351] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177d00958 state to ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845359] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880177d3b098 state to ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845367] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177d00958
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845369] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177d3b098 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845372] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177d3b098
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845375] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845385] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880177db81d8 state to ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845388] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db81d8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845391] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db81d8 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845393] [drm:drm_atomic_check_only] checking ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845407] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845410] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845413] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845416] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845418] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845421] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845497] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845546] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845594] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845640] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845687] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845732] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.845748] [drm:drm_atomic_commit] committing ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.858137] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.858225] [drm:__drm_atomic_state_free] Freeing atomic state ffff880178600aa8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905852] [drm:drm_atomic_state_init] Allocated atomic state ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905865] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177d05d28 state to ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905877] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880177d31728 state to ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905889] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177d05d28
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905892] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177d31728 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905895] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177d31728
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905899] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905915] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880177db9058 state to ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905921] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db9058 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905924] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db9058 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905933] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177d04a88 state to ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905941] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880177d31e18 state to ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905949] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177d04a88
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905951] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177d31e18 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905954] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177d31e18
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905957] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905966] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880177db8cb8 state to ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905970] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db8cb8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905973] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db8cb8 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905982] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177d01bf8 state to ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.905990] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880177d31bc8 state to ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906014] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177d01bf8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906017] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177d31bc8 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906019] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177d31bc8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906023] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906033] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880177db9798 state to ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906036] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db9798 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906039] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db9798 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906041] [drm:drm_atomic_check_only] checking ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906054] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906058] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906061] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906064] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906066] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906069] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906143] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906192] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906240] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906286] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906332] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906377] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.906394] [drm:drm_atomic_commit] committing ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.922883] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.922966] [drm:__drm_atomic_state_free] Freeing atomic state ffff880177fc0558
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961093] [drm:drm_atomic_state_init] Allocated atomic state ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961107] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177d04138 state to ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961116] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880177d38b98 state to ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961128] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177d04138
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0265] settings: hostname: using hostnamed
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961131] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177d38b98 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961134] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177d38b98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0266] settings: hostname changed from (none) to "GLK-2-GLKRVP1DDR405"
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961138] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961153] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880177547968 state to ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961159] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177547968 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961162] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177547968 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961172] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177d00008 state to ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961179] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880177d38008 state to ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961188] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177d00008
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0269] Using DHCP client 'dhclient'
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961190] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177d38008 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961192] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177d38008
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961196] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961204] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff8801775475c8 state to ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961208] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801775475c8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961211] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801775475c8 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961219] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177d02548 state to ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961226] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880177d3bc28 state to ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961233] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177d02548
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961236] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177d3bc28 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961238] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177d3bc28
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961241] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961251] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880177546e88 state to ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0270] manager: WiFi enabled by radio killswitch; enabled by state file
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961253] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177546e88 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961257] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177546e88 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961259] [drm:drm_atomic_check_only] checking ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961273] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961277] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961280] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0271] manager: WWAN enabled by radio killswitch; enabled by state file
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961283] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961285] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961289] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961362] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961408] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961454] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961498] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961541] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961583] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.961599] [drm:drm_atomic_commit] committing ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.965522] r8169 0000:01:00.0 enp1s0: link down
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.965724] r8169 0000:01:00.0 enp1s0: link down
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.965821] IPv6: ADDRCONF(NETDEV_UP): enp1s0: link is not ready
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.974850] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   13.974933] [drm:__drm_atomic_state_free] Freeing atomic state ffff880177fc1fe8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   14.168677] random: crng init done
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   14.757694] new mount options do not match the existing superblock, will be ignored
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   16.513638] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   16.513697] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   16.513753] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0272] manager: Networking is enabled by state file
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   16.513812] [drm:skl_set_power_well [i915]] Disabling AUX A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   17.891664] r8169 0000:01:00.0 enp1s0: link up
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   17.891729] IPv6: ADDRCONF(NETDEV_CHANGE): enp1s0: link becomes ready
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586166] [drm:drm_atomic_state_init] Allocated atomic state ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586208] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88017803ca88 state to ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586234] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff88015deb4de8 state to ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586283] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88017803ca88
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586290] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015deb4de8 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586298] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff88015deb4de8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586307] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586373] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff88015df31228 state to ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586398] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015df31228 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586406] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015df31228 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586427] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880178038008 state to ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586447] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff88015deb5038 state to ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586467] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880178038008
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586474] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015deb5038 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586480] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff88015deb5038
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586488] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586511] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880177db95c8 state to ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586522] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db95c8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586529] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177db95c8 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0273] Loaded device plugin: NMVxlanFactory (internal)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586550] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880178038958 state to ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586569] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff88015deb4258 state to ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586589] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880178038958
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586595] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015deb4258 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586601] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff88015deb4258
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0274] Loaded device plugin: NMVlanFactory (internal)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586609] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0274] Loaded device plugin: NMVethFactory (internal)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0275] Loaded device plugin: NMTunFactory (internal)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0276] Loaded device plugin: NMMacvlanFactory (internal)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0276] Loaded device plugin: NMIPTunnelFactory (internal)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0277] Loaded device plugin: NMInfinibandFactory (internal)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586635] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880160e91b38 state to ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586643] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160e91b38 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586650] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880160e91b38 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586656] [drm:drm_atomic_check_only] checking ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0278] Loaded device plugin: NMEthernetFactory (internal)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586684] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586693] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586699] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586707] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586713] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586721] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586869] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.586986] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.587100] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.587309] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0279] Loaded device plugin: NMBridgeFactory (internal)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.587420] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.587530] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.587580] [drm:drm_atomic_commit] committing ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.594378] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   19.594471] [drm:__drm_atomic_state_free] Freeing atomic state ffff880177fc74e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.993464] [drm:drm_fb_helper_hotplug_event] 
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.993483] [drm:drm_setup_crtcs] 
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.993511] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.993620] [drm:intel_dp_detect [i915]] [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0279] Loaded device plugin: NMBondFactory (internal)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.993707] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.993785] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.993864] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.993920] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.993974] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.994026] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.994185] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.994261] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006f
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.994832] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.995754] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.995770] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1] probed modes :
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.995777] [drm:drm_mode_debug_printmodeline] Modeline 61:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.995783] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.995845] [drm:intel_dp_detect [i915]] [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0308] Loaded device plugin: NMWwanFactory (/usr/lib/x86_64-linux-gnu/NetworkManager/libnm-device-plugin-wwan.so)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.995896] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.995948] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.997021] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.997977] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.998032] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0318] Loaded device plugin: NMAtmManager (/usr/lib/x86_64-linux-gnu/NetworkManager/libnm-device-plugin-adsl.so)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.998109] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.998160] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.999183] [drm:drm_dp_read_desc] DP sink: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   20.999237] [drm:intel_dp_detect [i915]] Sink is not MST capable
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009437] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009514] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009635] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009720] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1] probed modes :
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009729] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009736] [drm:drm_mode_debug_printmodeline] Modeline 81:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009742] [drm:drm_mode_debug_printmodeline] Modeline 86:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0325] Loaded device plugin: NMWifiFactory (/usr/lib/x86_64-linux-gnu/NetworkManager/libnm-device-plugin-wifi.so)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009748] [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009754] [drm:drm_mode_debug_printmodeline] Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009760] [drm:drm_mode_debug_printmodeline] Modeline 87:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009766] [drm:drm_mode_debug_printmodeline] Modeline 88:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009772] [drm:drm_mode_debug_printmodeline] Modeline 89:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0362] Loaded device plugin: NMBluezManager (/usr/lib/x86_64-linux-gnu/NetworkManager/libnm-device-plugin-bluetooth.so)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009778] [drm:drm_mode_debug_printmodeline] Modeline 82:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009784] [drm:drm_mode_debug_printmodeline] Modeline 83:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009790] [drm:drm_mode_debug_printmodeline] Modeline 84:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009797] [drm:drm_mode_debug_printmodeline] Modeline 85:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009804] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.009868] [drm:intel_hdmi_detect [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.012032] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.012113] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.014217] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.014225] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.016332] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: nm_device_get_device_type: assertion 'NM_IS_DEVICE (self)' failed
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.016379] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.018563] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.018572] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.018578] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] disconnected
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.018585] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.018636] [drm:intel_hdmi_detect [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.102514] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.102562] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105042] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105085] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105093] [drm:drm_rgb_quant_range_selectable] CEA VCDB 0x2b
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0388] device (lo): link connected
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105348] [drm:drm_add_edid_modes] HDMI: DVI dual 0, max TMDS clock 170000 kHz
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105353] [drm:drm_edid_to_eld] ELD monitor HP E232
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105358] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105361] [drm:drm_edid_to_eld] ELD size 28, SAD count 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0398] manager: (lo): new Generic device (/org/freedesktop/NetworkManager/Devices/0)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0425] manager: (enp1s0): new Ethernet device (/org/freedesktop/NetworkManager/Devices/1)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0437] manager: startup complete
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0439] manager: NetworkManager state is now CONNECTED_GLOBAL
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0507] urfkill disappeared from the bus
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0538] ofono is now available
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105853] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2] probed modes :
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105860] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105864] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105869] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105873] [drm:drm_mode_debug_printmodeline] Modeline 98:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105877] [drm:drm_mode_debug_printmodeline] Modeline 97:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105881] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <warn>  [1498683997.0557] failed to enumerate oFono devices: GDBus.Error:org.freedesktop.DBus.Error.ServiceUnknown: The name org.ofono was not provided by any .service files
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105886] [drm:drm_mode_debug_printmodeline] Modeline 99:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105890] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105894] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105898] [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105902] [drm:drm_mode_debug_printmodeline] Modeline 95:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105907] [drm:drm_mode_debug_printmodeline] Modeline 104:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105911] [drm:drm_mode_debug_printmodeline] Modeline 102:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105915] [drm:drm_mode_debug_printmodeline] Modeline 111:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105919] [drm:drm_mode_debug_printmodeline] Modeline 116:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105923] [drm:drm_mode_debug_printmodeline] Modeline 96:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105928] [drm:drm_mode_debug_printmodeline] Modeline 117:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683997.0565] ModemManager available in the bus
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105932] [drm:drm_mode_debug_printmodeline] Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105956] [drm:drm_setup_crtcs] connector 60 enabled? yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105960] [drm:drm_setup_crtcs] connector 68 enabled? yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105964] [drm:drm_setup_crtcs] connector 72 enabled? no
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.105967] [drm:drm_setup_crtcs] connector 75 enabled? yes
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106020] [drm:intel_fb_initial_config [i915]] Not using firmware configuration
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106091] [drm:drm_setup_crtcs] looking for cmdline mode on connector 60
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106095] [drm:drm_setup_crtcs] looking for preferred mode on connector 60 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106099] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106102] [drm:drm_setup_crtcs] looking for cmdline mode on connector 68
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106105] [drm:drm_setup_crtcs] looking for preferred mode on connector 68 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106109] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106112] [drm:drm_setup_crtcs] looking for cmdline mode on connector 75
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106115] [drm:drm_setup_crtcs] looking for preferred mode on connector 75 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106118] [drm:drm_setup_crtcs] found mode 1920x1080
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106122] [drm:drm_setup_crtcs] picking CRTCs for 1920x1080 config
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106281] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 36 (0,0)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106290] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 47 (0,0)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106299] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 58 (0,0)
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106376] [drm:drm_atomic_state_init] Allocated atomic state ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106387] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff8801786b5728 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106401] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177d00008 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106410] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff8801786b6068 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106414] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801786b6068 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106418] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801786b6068
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106427] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff8801786b7788 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106431] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801786b7788 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106435] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801786b7788
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106444] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff8801786b6bf8 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106447] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801786b6bf8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106450] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801786b6bf8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106459] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff8801786b4de8 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106462] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801786b4de8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106465] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801786b4de8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106474] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff8801786b69a8 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106485] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177d04138 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106493] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff8801786b7098 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106497] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801786b7098 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106500] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801786b7098
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106508] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff8801786b5288 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106512] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801786b5288 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106515] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801786b5288
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106524] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff8801786b5e18 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106527] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801786b5e18 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106530] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801786b5e18
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106540] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff8801786b62b8 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106543] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801786b62b8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106546] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801786b62b8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106555] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff8801786b6758 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106566] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177d02548 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106575] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff8801786b4b98 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106578] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801786b4b98 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106583] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8801786b4b98
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106591] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff880175392e48 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106595] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175392e48 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106598] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175392e48
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106607] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff880175391bc8 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106610] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175391bc8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106613] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175391bc8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106621] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff880175392508 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106625] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175392508 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106629] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880175392508
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106655] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177d00008
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106659] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801786b5728 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106662] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff8801786b5728
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106667] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106698] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff88015adfe1d8 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106717] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015adfe1d8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106721] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015adfe1d8 to [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106732] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177d04138
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106736] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801786b69a8 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106739] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff8801786b69a8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106744] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106755] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff88015adfee88 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106760] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015adfee88 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106765] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015adfee88 to [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106775] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880177d02548
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106778] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff8801786b6758 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106782] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff8801786b6758
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106786] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106797] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff88015adff5c8 state to ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106801] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015adff5c8 to [NOCRTC]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106806] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015adff5c8 to [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106809] [drm:drm_atomic_check_only] checking ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106821] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106826] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106830] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106835] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106838] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106842] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106901] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106948] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.106996] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.107062] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.107108] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.107175] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.107212] [drm:drm_atomic_commit] committing ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.122439] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   21.122654] [drm:__drm_atomic_state_free] Freeing atomic state ffff88015ae5f4e8
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   24.001661] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   24.001835] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   24.001942] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 kernel: [   24.002076] [drm:skl_set_power_well [i915]] Disabling AUX A
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 NetworkManager[728]: <info>  [1498683998.7684] device (enp1s0): link connected
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 content-hub-pee[1157]: Error parsing manifest for package 'com.ubuntu.gallery': com.ubuntu.gallery does not exist in any database for user gfx
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 content-hub-pee[1157]: Unable to get snap information for 'com.ubuntu.gallery': Status code is: 404
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 content-hub-pee[1157]: Error parsing manifest for package 'com.ubuntu.gallery': com.ubuntu.gallery does not exist in any database for user gfx
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 content-hub-pee[1157]: Unable to get snap information for 'com.ubuntu.gallery': Status code is: 404
>Jun 28 16:06:58 GLK-2-GLKRVP1DDR405 click[1133]: hooks.vala:1216: User-level hook push-helper failed: Hook command '/usr/lib/ubuntu-push-client/click-hook-wrapper' failed: Child process exited with code 1
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.540543] Console: switching to colour dummy device 80x25
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.579757] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1]
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.579843] [drm:intel_dp_detect [i915]] [CONNECTOR:60:eDP-1]
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.579921] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.580012] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.580126] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.580177] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.580229] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.580276] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.580413] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.580484] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006f
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.581244] [drm:drm_dp_read_desc] DP sink: OUI 00-1c-f8 dev-ID q\006UA\022\001 HW-rev 10.0 SW-rev 1.41 quirks 0x0000
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582127] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582147] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:60:eDP-1] probed modes :
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582166] [drm:drm_mode_debug_printmodeline] Modeline 61:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582525] [drm:drm_atomic_state_init] Allocated atomic state ffff880160e68aa8
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582540] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff8801781f61d8 state to ffff880160e68aa8
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582550] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88015dc61bf8 state to ffff880160e68aa8
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582555] [drm:drm_atomic_check_only] checking ffff880160e68aa8
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582572] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582577] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582581] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] needs all connectors, enable: y, active: y
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582585] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880160e68aa8
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582597] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff88015deb44a8 state to ffff880160e68aa8
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582603] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880160e68aa8
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582656] [drm:intel_atomic_check [i915]] [CONNECTOR:60:eDP-1] checking for sink bpp constrains
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582743] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582819] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582886] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582929] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.582977] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583040] [drm:intel_dump_pipe_config [i915]] [CRTC:36:pipe A][modeset]
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583119] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583169] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583217] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583267] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583275] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583324] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583331] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583379] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583425] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583473] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583522] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583568] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583618] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583666] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583714] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] FB:107, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583760] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583807] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583852] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 3A] disabled, scaler_id = -1
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583897] [drm:intel_dump_pipe_config [i915]] [PLANE:32:plane 4A] disabled, scaler_id = -1
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583941] [drm:intel_dump_pipe_config [i915]] [PLANE:34:cursor A] disabled, scaler_id = -1
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.583992] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.584065] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.584113] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 1, on 1, ms 1
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.584164] [drm:bxt_get_dpll [i915]] [CRTC:36:pipe A] using pre-allocated PORT PLL A
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.584211] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.584233] [drm:drm_atomic_commit] committing ffff880160e68aa8
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.584791] [drm:intel_edp_backlight_off [i915]] 
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.793665] [drm:intel_disable_pipe [i915]] disabling pipe A
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.801314] [drm:intel_edp_panel_off.part.26 [i915]] Turn eDP port A panel power off
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.801481] [drm:intel_edp_panel_off.part.26 [i915]] Wait for panel power off time
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.801565] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000060
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.853822] [drm:wait_panel_status [i915]] Wait complete
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.853939] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.854136] [drm:skl_set_power_well [i915]] Disabling AUX A
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.854216] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.854289] [drm:skl_set_power_well [i915]] Disabling DDI A IO power well
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.854393] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.854472] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.854565] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.854665] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.854859] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 36
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.855205] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.855430] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.855532] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DDI A]
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.855606] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:DDI B]
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.855679] [drm:intel_atomic_commit_tail [i915]] [ENCODER:69:DP-MST A]
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.855751] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST B]
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.855822] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST C]
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.855891] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DDI C]
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.855961] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.856036] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.856231] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.856445] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 36
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.856534] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.857971] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.858071] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.858204] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>Jun 28 16:08:36 GLK-2-GLKRVP1DDR405 kernel: [  135.858296] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.449510] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000060
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.449617] [drm:wait_panel_status [i915]] Wait complete
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.449713] [drm:edp_panel_on [i915]] Wait for panel power on
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.449852] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.551956] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.552061] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.552154] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.552365] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.651862] [drm:wait_panel_status [i915]] Wait complete
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.651981] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.652093] [drm:skl_set_power_well [i915]] Disabling AUX A
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.652305] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.652488] [drm:skl_set_power_well [i915]] Enabling DDI A IO power well
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.652639] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.652882] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.653013] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.653297] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.654946] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.655063] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.655255] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.656312] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.656423] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.657720] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.657838] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.659778] [drm:intel_enable_pipe [i915]] enabling pipe A
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.660010] [drm:intel_edp_backlight_on [i915]] 
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.660164] [drm:intel_panel_enable_backlight [i915]] pipe A
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.661537] [drm:intel_dp_aux_enable_backlight [i915]] VBT defined backlight frequency 200 Hz
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.663266] [drm:intel_dp_aux_enable_backlight [i915]] Enable dynamic brightness.
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.663843] [drm:intel_psr_enable [i915]] PSR not supported on this platform
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.663943] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.664208] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.664306] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.664694] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:60:eDP-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.664803] [drm:intel_atomic_commit_tail [i915]] [CRTC:36:pipe A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.665034] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.676676] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.676720] [drm:__drm_atomic_state_free] Freeing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.676823] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.676904] [drm:intel_dp_detect [i915]] [CONNECTOR:68:DP-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.676973] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.677058] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.678234] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 01 00 01 80 02 00 00 00 00 00 00
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.679329] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.679403] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.679472] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.679541] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.680618] [drm:drm_dp_read_desc] DP sink: OUI 00-e0-4c dev-ID  HW-rev 0.0 SW-rev 0.0 quirks 0x0000
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.680689] [drm:intel_dp_detect [i915]] Sink is not MST capable
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690700] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690744] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690861] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690919] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:68:DP-1] probed modes :
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690925] [drm:drm_mode_debug_printmodeline] Modeline 78:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690930] [drm:drm_mode_debug_printmodeline] Modeline 81:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690934] [drm:drm_mode_debug_printmodeline] Modeline 86:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690938] [drm:drm_mode_debug_printmodeline] Modeline 80:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690942] [drm:drm_mode_debug_printmodeline] Modeline 79:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690947] [drm:drm_mode_debug_printmodeline] Modeline 87:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690951] [drm:drm_mode_debug_printmodeline] Modeline 88:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690955] [drm:drm_mode_debug_printmodeline] Modeline 89:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690959] [drm:drm_mode_debug_printmodeline] Modeline 82:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690963] [drm:drm_mode_debug_printmodeline] Modeline 83:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690967] [drm:drm_mode_debug_printmodeline] Modeline 84:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.690971] [drm:drm_mode_debug_printmodeline] Modeline 85:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691347] [drm:drm_atomic_state_init] Allocated atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691362] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff8801781f7798 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691376] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff88015dc60958 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691380] [drm:drm_atomic_check_only] checking ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691389] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691395] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691399] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] needs all connectors, enable: y, active: y
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691403] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691416] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880177d3a068 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691422] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691473] [drm:intel_atomic_check [i915]] [CONNECTOR:68:DP-1] checking for sink bpp constrains
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691519] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691568] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691614] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691659] [drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691706] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691753] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][modeset]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691799] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691845] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691890] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691933] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691939] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691982] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.691988] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692033] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692100] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 148500
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692150] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692197] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692243] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692296] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692342] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692392] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 1B] FB:107, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692439] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692490] [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2B] disabled, scaler_id = -1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692536] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 3B] disabled, scaler_id = -1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692583] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4B] disabled, scaler_id = -1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692632] [drm:intel_dump_pipe_config [i915]] [PLANE:45:cursor B] disabled, scaler_id = -1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692687] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692741] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692787] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 1, on 1, ms 1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692837] [drm:bxt_get_dpll [i915]] [CRTC:47:pipe B] using pre-allocated PORT PLL B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692882] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.692893] [drm:drm_atomic_commit] committing ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.693018] [drm:intel_disable_pipe [i915]] disabling pipe B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.707017] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.707147] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.707673] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.707731] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.707798] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.707910] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.707984] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 47
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.708243] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.708316] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DDI A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.708373] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:DDI B]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.708431] [drm:intel_atomic_commit_tail [i915]] [ENCODER:69:DP-MST A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.708488] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST B]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.708542] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST C]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.708596] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DDI C]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.708654] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.708735] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.708792] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.708926] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 47
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.708980] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.709267] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.709355] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.709426] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.709497] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.710020] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.710135] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.710831] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.710903] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.711474] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.711544] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.711619] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.711687] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.712259] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.712333] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.712432] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.712504] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.712581] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.712687] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.712757] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.713351] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.713422] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.713598] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.713666] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.714214] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.714313] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.715352] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.715419] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.715964] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.716030] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.716144] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.716232] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.716821] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.716886] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.716962] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.717034] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.717173] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.717238] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.717789] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.717885] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.718360] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.718425] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.718965] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.719030] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.719965] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.720198] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.720742] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.720857] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.720926] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.720990] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.721652] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.721717] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.721798] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.724180] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 162000, Lane count = 4
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.724266] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.724335] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.724906] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.724971] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.726226] [drm:intel_enable_pipe [i915]] enabling pipe B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.726409] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:68:DP-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.726531] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.726654] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.743251] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.743286] [drm:__drm_atomic_state_free] Freeing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.743378] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.743453] [drm:intel_hdmi_detect [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.746009] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.746179] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.748571] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0050 w(1)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.748593] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.751040] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.751179] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.753573] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.753595] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.753607] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:72:HDMI-A-1] disconnected
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.754298] [drm:drm_atomic_state_init] Allocated atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.754321] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:72:HDMI-A-1] ffff880175039968 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.754328] [drm:drm_atomic_check_only] checking ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.754337] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:72:HDMI-A-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.754343] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:72:HDMI-A-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.754352] [drm:drm_atomic_commit] committing ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.754457] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.754473] [drm:__drm_atomic_state_free] Freeing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.754545] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.754627] [drm:intel_hdmi_detect [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.841271] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.841370] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.843786] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.843815] [drm:drm_dp_dual_mode_detect] DP dual mode HDMI ID:  (err -6)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.843831] [drm:drm_rgb_quant_range_selectable] CEA VCDB 0x2b
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.844385] [drm:drm_add_edid_modes] HDMI: DVI dual 0, max TMDS clock 170000 kHz
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.844394] [drm:drm_edid_to_eld] ELD monitor HP E232
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.844403] [drm:drm_edid_to_eld] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.844410] [drm:drm_edid_to_eld] ELD size 28, SAD count 0
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845311] [drm:drm_helper_probe_single_connector_modes] [CONNECTOR:75:HDMI-A-2] probed modes :
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845331] [drm:drm_mode_debug_printmodeline] Modeline 91:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845350] [drm:drm_mode_debug_printmodeline] Modeline 113:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845363] [drm:drm_mode_debug_printmodeline] Modeline 93:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845372] [drm:drm_mode_debug_printmodeline] Modeline 98:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845382] [drm:drm_mode_debug_printmodeline] Modeline 97:"1600x900" 60 108000 1600 1624 1704 1800 900 901 904 1000 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845391] [drm:drm_mode_debug_printmodeline] Modeline 101:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845401] [drm:drm_mode_debug_printmodeline] Modeline 99:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845414] [drm:drm_mode_debug_printmodeline] Modeline 100:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845423] [drm:drm_mode_debug_printmodeline] Modeline 94:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845437] [drm:drm_mode_debug_printmodeline] Modeline 115:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845451] [drm:drm_mode_debug_printmodeline] Modeline 95:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845467] [drm:drm_mode_debug_printmodeline] Modeline 104:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845480] [drm:drm_mode_debug_printmodeline] Modeline 102:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845493] [drm:drm_mode_debug_printmodeline] Modeline 111:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845506] [drm:drm_mode_debug_printmodeline] Modeline 116:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845520] [drm:drm_mode_debug_printmodeline] Modeline 96:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845529] [drm:drm_mode_debug_printmodeline] Modeline 117:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.845539] [drm:drm_mode_debug_printmodeline] Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.846352] [drm:drm_atomic_state_init] Allocated atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.846383] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880175038748 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.846408] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff88015dc62548 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.846416] [drm:drm_atomic_check_only] checking ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.846436] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.846446] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.846454] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] needs all connectors, enable: y, active: y
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.846463] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.846492] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff88015dfc5288 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.846503] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.846622] [drm:intel_atomic_check [i915]] [CONNECTOR:75:HDMI-A-2] checking for sink bpp constrains
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.846727] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.846836] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.846938] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.847040] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.847195] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe C][modeset]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.847303] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 24, dithering: 0
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.847405] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.847506] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.847525] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.847624] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.847645] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.847750] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.847851] [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.847955] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.848054] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.848189] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.848294] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6300, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.848399] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.848503] [drm:intel_dump_pipe_config [i915]] [PLANE:48:plane 1C] FB:107, fb = 1920x1080 format = XR24 little-endian (0x34325258)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.848603] [drm:intel_dump_pipe_config [i915]] 	scaler:-1 src 0x0+1920+1080 dst 0x0+1920+1080
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.848700] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 2C] disabled, scaler_id = -1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.848801] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 3C] disabled, scaler_id = -1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.848901] [drm:intel_dump_pipe_config [i915]] [PLANE:54:plane 4C] disabled, scaler_id = -1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.849000] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor C] disabled, scaler_id = -1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.849152] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.849265] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.849371] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 1, on 1, ms 1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.849487] [drm:bxt_get_dpll [i915]] [CRTC:58:pipe C] using pre-allocated PORT PLL C
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.849586] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe C
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.849612] [drm:drm_atomic_commit] committing ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.849876] [drm:intel_disable_pipe [i915]] disabling pipe C
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.860056] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.860189] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.860273] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 4, on? 1) for crtc 58
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.860472] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.860549] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DDI A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.860607] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:DDI B]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.860666] [drm:intel_atomic_commit_tail [i915]] [ENCODER:69:DP-MST A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.860726] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST B]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.860784] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST C]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.860842] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DDI C]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.860900] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.860983] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.861113] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.861231] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 4, on? 0) for crtc 58
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.861289] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.861496] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.861555] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.862686] [drm:intel_enable_pipe [i915]] enabling pipe C
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.862938] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.863008] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe C]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.863206] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.879865] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.879925] [drm:__drm_atomic_state_free] Freeing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.881220] [drm:drm_atomic_state_init] Allocated atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.881245] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880175038e88 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.881266] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff8801764537e8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.881273] [drm:drm_atomic_check_only] checking ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.881292] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.881300] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.881323] [drm:drm_atomic_commit] committing ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.893278] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.893326] [drm:__drm_atomic_state_free] Freeing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.909887] [drm:drm_mode_addfb2] [FB:62]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926267] [drm:drm_atomic_state_init] Allocated atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926441] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff88015dfc5038 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926476] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88017ab1a548 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926490] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc5038 to [CRTC:36:pipe A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926519] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff88015dfc5038
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926545] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff88015dfc7788 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926550] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc7788 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926555] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc7788
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926570] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff88015dfc6e48 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926574] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc6e48 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926580] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc6e48
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926594] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff88015dfc6508 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926598] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc6508 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926604] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc6508
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926618] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff88015dfc4de8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926622] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc4de8 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926627] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc4de8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926638] [drm:drm_atomic_set_mode_prop_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88017ab1a548
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926654] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff88015dfc44a8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926667] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff88017ab1ae98 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926672] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc44a8 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926677] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc44a8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926692] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff88015dfc7098 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926696] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc7098 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926702] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc7098
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926715] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff88015dfc6758 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926719] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc6758 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926724] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc6758
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926736] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff88015dfc4b98 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926741] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc4b98 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926746] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc4b98
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926759] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff88015dfc7c28 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926763] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc7c28 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926768] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc7c28
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926776] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state ffff88017ab1ae98
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926786] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926862] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff88015dfc7c28 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926876] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177ee1bf8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926881] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc7c28 to [CRTC:36:pipe A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926887] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff88015dfc7c28
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926908] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff88015dfc54d8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926912] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc54d8 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926917] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc54d8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926925] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926955] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff88015dfc54d8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926967] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88017ab8d3d8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926972] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc54d8 to [CRTC:36:pipe A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926979] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff88015dfc54d8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.926998] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff88015dfc79d8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927047] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc79d8 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927053] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc79d8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927067] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff88015dfc7c28 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927071] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc7c28 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927080] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc7c28
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927097] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff88015dfc69a8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927105] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc69a8 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927113] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc69a8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927133] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff88015dfc4b98 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927140] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc4b98 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927149] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc4b98
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927160] [drm:drm_atomic_set_mode_prop_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88017ab8d3d8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927177] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff88015dfc4258 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927190] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff88017ab8efc8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927198] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc4258 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927205] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc4258
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927220] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff88015dfc6758 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927228] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc6758 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927234] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc6758
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927247] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff88015dfc5e18 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927252] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc5e18 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927257] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc5e18
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927270] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff88015dfc7098 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927274] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc7098 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927280] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc7098
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927287] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927352] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff88015dfc7098 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927364] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88017ab8efc8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927369] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc7098 to [CRTC:36:pipe A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927375] [drm:drm_atomic_set_fb_for_plane] Set [FB:62] for plane state ffff88015dfc7098
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927396] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff88015dfc44a8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927402] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc44a8 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927411] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc44a8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927428] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff88015dfc5e18 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927435] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc5e18 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927444] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc5e18
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927457] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff88015dfc4de8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927461] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc4de8 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927467] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc4de8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927481] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff88015dfc6758 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927488] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc6758 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927493] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc6758
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927502] [drm:drm_atomic_set_mode_prop_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88017ab8efc8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927519] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff88015dfc6508 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927531] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff88017ab89bf8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927537] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc6508 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927544] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc6508
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927560] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff88015dfc4258 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927565] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc4258 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927571] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc4258
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927583] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff88015dfc6e48 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927588] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc6e48 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927595] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc6e48
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927607] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff88015dfc4b98 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927612] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc4b98 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927617] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc4b98
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927631] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff88015dfc7788 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927636] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc7788 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927641] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc7788
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927648] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state ffff88017ab89bf8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927662] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff88015dfc69a8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927674] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff88017ab8d3d8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927679] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc69a8 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927686] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc69a8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927699] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff88015dfc5038 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927704] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc5038 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927709] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc5038
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927723] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff88015dfc7c28 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927727] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc7c28 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927733] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc7c28
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927746] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff88015dfc72e8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927751] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc72e8 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927756] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc72e8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927769] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff88015dfc79d8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927775] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc79d8 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927780] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc79d8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927787] [drm:drm_atomic_set_mode_prop_for_crtc] Set [NOMODE] for CRTC state ffff88017ab8d3d8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927808] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880175038ae8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927822] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880175038008 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927828] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880175038008 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927841] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:72:HDMI-A-1] ffff880175039d08 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927854] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff8801750393f8 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927859] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff8801750393f8 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927864] [drm:drm_atomic_check_only] checking ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927872] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] mode changed
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927876] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] enable changed
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927880] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] active changed
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927884] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] mode changed
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927888] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] enable changed
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927892] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] active changed
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927910] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927916] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927921] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927925] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:68:DP-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927930] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:72:HDMI-A-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927934] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:72:HDMI-A-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927937] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927942] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927946] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] needs all connectors, enable: n, active: n
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927952] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927959] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] needs all connectors, enable: n, active: n
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.927964] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.928053] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.928200] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 62
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.928252] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.928302] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb -1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.928351] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 0, off 1, on 0, ms 1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.928399] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb -1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.928447] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 0, off 1, on 0, ms 1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.928509] [drm:skl_compute_wm [i915]] [PLANE:26:plane 1A] ddb (0 - 332) -> (0 - 988)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.928553] [drm:skl_compute_wm [i915]] [PLANE:34:cursor A] ddb (332 - 340) -> (988 - 1020)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.928599] [drm:skl_compute_wm [i915]] [PLANE:37:plane 1B] ddb (340 - 672) -> (0 - 0)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.928643] [drm:skl_compute_wm [i915]] [PLANE:45:cursor B] ddb (672 - 680) -> (0 - 0)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.928688] [drm:skl_compute_wm [i915]] [PLANE:48:plane 1C] ddb (680 - 1012) -> (0 - 0)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.928731] [drm:skl_compute_wm [i915]] [PLANE:56:cursor C] ddb (1012 - 1020) -> (0 - 0)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.928743] [drm:drm_atomic_commit] committing ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.930472] [drm:intel_disable_pipe [i915]] disabling pipe B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.944528] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.944644] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.945533] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.945680] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.945772] [drm:intel_power_well_disable [i915]] disabling DDI B IO power well
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.945879] [drm:skl_set_power_well [i915]] Disabling DDI B IO power well
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.946001] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL B (active 2, on? 1) for crtc 47
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.946337] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.946541] [drm:intel_disable_pipe [i915]] disabling pipe C
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.964672] [drm:intel_power_well_disable [i915]] disabling DDI C IO power well
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.964758] [drm:skl_set_power_well [i915]] Disabling DDI C IO power well
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.964860] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL C (active 4, on? 1) for crtc 58
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.965192] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL C
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.965389] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DDI A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.965467] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:DDI B]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.965548] [drm:intel_atomic_commit_tail [i915]] [ENCODER:69:DP-MST A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.965625] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST B]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.965700] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST C]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.965776] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DDI C]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.965858] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:68:DP-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.965940] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:72:HDMI-A-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.966028] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.966175] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.966310] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.966410] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.994961] [drm:intel_power_well_disable [i915]] disabling dpio-common-b
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.995213] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.995353] [drm:intel_power_well_disable [i915]] disabling dpio-common-c
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.995468] [drm:intel_power_well_disable [i915]] disabling power well 2
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.995800] [drm:skl_set_power_well [i915]] Disabling power well 2
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.995944] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe C]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.996076] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  136.996340] [drm:__drm_atomic_state_free] Freeing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.003975] [drm:drm_atomic_state_init] Allocated atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.004100] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff88015cec0008 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.004130] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88017803c138 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.004144] [drm:drm_atomic_check_only] checking ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.004172] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.004183] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.004210] [drm:drm_atomic_commit] committing ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.009828] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.009865] [drm:__drm_atomic_state_free] Freeing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.010429] [drm:drm_atomic_state_init] Allocated atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.010445] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880163363798 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.010456] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880178038008 state to ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.010458] [drm:drm_atomic_state_init] Allocated atomic state ffff880160e6fa38
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.010462] [drm:drm_atomic_check_only] checking ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.010474] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.010479] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.010492] [drm:drm_atomic_commit] committing ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.026489] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.026539] [drm:__drm_atomic_state_free] Freeing atomic state ffff880160e68aa8
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.026989] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177d00008 state to ffff880160e6fa38
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.026999] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e6fa38
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.027082] [drm:__drm_atomic_state_free] Freeing atomic state ffff880160e6fa38
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.027991] [drm:drm_mode_addfb2] [FB:110]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.028984] [drm:drm_mode_addfb2] [FB:112]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.030124] [drm:drm_mode_addfb2] [FB:114]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.030509] [drm:drm_mode_addfb2] [FB:118]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047180] [drm:drm_atomic_state_init] Allocated atomic state ffff880160e6fa38
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047300] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff88015dfc5288 state to ffff880160e6fa38
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047330] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880177d02548 state to ffff880160e6fa38
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047335] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880160e6fa38
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047369] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff88015f6d6cb8 state to ffff880160e6fa38
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047392] [drm:drm_atomic_set_mode_for_crtc] Set [NOMODE] for CRTC state ffff880177d02548
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047396] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc5288
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047399] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc5288 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047404] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff88015f6d6cb8 to [NOCRTC]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047408] [drm:drm_atomic_check_only] checking ffff880160e6fa38
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047415] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] mode changed
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047418] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] enable changed
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047421] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] active changed
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047425] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047428] [drm:drm_atomic_helper_check_modeset] Disabling [CONNECTOR:60:eDP-1]
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047433] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] needs all connectors, enable: n, active: n
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047437] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880160e6fa38
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047516] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047571] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb -1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047619] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 0, off 1, on 0, ms 1
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047643] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880177d00008 state to ffff880160e6fa38
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047654] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff880177d04138 state to ffff880160e6fa38
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047701] [drm:skl_compute_wm [i915]] [PLANE:26:plane 1A] ddb (0 - 988) -> (0 - 0)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047746] [drm:skl_compute_wm [i915]] [PLANE:34:cursor A] ddb (988 - 1020) -> (0 - 0)
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.047750] [drm:drm_atomic_commit] committing ffff880160e6fa38
>Jun 28 16:08:37 GLK-2-GLKRVP1DDR405 kernel: [  137.048127] [drm:intel_edp_backlight_off [i915]] 
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.257725] [drm:intel_disable_pipe [i915]] disabling pipe A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.261136] [drm:intel_edp_panel_off.part.26 [i915]] Turn eDP port A panel power off
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.261260] [drm:intel_edp_panel_off.part.26 [i915]] Wait for panel power off time
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.261346] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000060
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.313204] [drm:wait_panel_status [i915]] Wait complete
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.313370] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.313513] [drm:skl_set_power_well [i915]] Disabling AUX A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.313604] [drm:intel_power_well_disable [i915]] disabling DDI A IO power well
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.313692] [drm:skl_set_power_well [i915]] Disabling DDI A IO power well
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.313863] [drm:__intel_fbc_disable [i915]] Disabling FBC on pipe A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.314145] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.314247] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.314341] [drm:intel_disable_shared_dpll [i915]] disable PORT PLL A (active 1, on? 1) for crtc 36
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.314437] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.314617] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.314712] [drm:intel_disable_shared_dpll [i915]] disabling PORT PLL A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.314935] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DDI A]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.315035] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:DDI B]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.315159] [drm:intel_atomic_commit_tail [i915]] [ENCODER:69:DP-MST A]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.315258] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST B]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.315367] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST C]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.315466] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DDI C]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.315566] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:60:eDP-1]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.315674] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.315778] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.315878] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.316041] [drm:intel_power_well_disable [i915]] disabling dpio-common-a
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.316203] [drm:intel_atomic_commit_tail [i915]] [CRTC:36:pipe A]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.316324] [drm:intel_power_well_disable [i915]] disabling DC off
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.316425] [drm:gen9_enable_dc5 [i915]] Enabling DC5
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.316522] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 01
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.316626] [drm:intel_power_well_disable [i915]] disabling always-on
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.316668] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e6fa38
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.316768] [drm:__drm_atomic_state_free] Freeing atomic state ffff880160e6fa38
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343725] [drm:drm_atomic_state_init] Allocated atomic state ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343755] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff88015dfc7538 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343765] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff88015dfc5bc8 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343769] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc5bc8 to [NOCRTC]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343773] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc5bc8
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343782] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff88015dfc7098 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343785] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc7098 to [NOCRTC]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343788] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc7098
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343797] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff88015dfc62b8 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343801] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc62b8 to [NOCRTC]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343804] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc62b8
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343812] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff88015dfc6bf8 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343815] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc6bf8 to [NOCRTC]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343818] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc6bf8
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343827] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff88015dfc5728 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343836] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff88015dfc4948 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343839] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc4948 to [NOCRTC]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343842] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc4948
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343849] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff88015dfc6068 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343853] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc6068 to [NOCRTC]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343856] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc6068
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343864] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff88015dfc54d8 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343868] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc54d8 to [NOCRTC]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343871] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc54d8
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343878] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff88015dfc46f8 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343882] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc46f8 to [NOCRTC]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343885] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88015dfc46f8
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343893] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff88015dfc4008 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343903] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff880174c9e9a8 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343906] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174c9e9a8 to [NOCRTC]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343909] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174c9e9a8
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343918] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff880174c9dbc8 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343921] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174c9dbc8 to [NOCRTC]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343924] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174c9dbc8
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343932] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff880174c9ebf8 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343935] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174c9ebf8 to [NOCRTC]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343939] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174c9ebf8
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343946] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff880174c9de18 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343949] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880174c9de18 to [NOCRTC]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343953] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880174c9de18
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343966] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88015dc62548 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343992] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88015dc62548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.343996] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc7538 to [CRTC:36:pipe A]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344001] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff88015dfc7538
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344048] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344075] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880177cb8e88 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344081] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177cb8e88 to [CRTC:36:pipe A]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344093] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff88015dc66fc8 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344105] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88015dc66fc8
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344111] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc5728 to [CRTC:47:pipe B]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344119] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff88015dfc5728
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344126] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344140] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880177cb8008 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344147] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177cb8008 to [CRTC:47:pipe B]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344159] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff88015dc60958 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344171] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88015dc60958
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344177] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff88015dfc4008 to [CRTC:58:pipe C]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344182] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff88015dfc4008
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344187] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344199] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880177cb9228 state to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344203] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177cb9228 to [CRTC:58:pipe C]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344206] [drm:drm_atomic_check_only] checking ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344214] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] mode changed
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344218] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] enable changed
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344221] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] active changed
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344224] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] mode changed
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344227] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] enable changed
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344231] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] active changed
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344234] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] mode changed
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344237] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] enable changed
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344240] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] active changed
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344251] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344255] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] using [ENCODER:59:DDI A] on [CRTC:36:pipe A]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344259] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344263] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] using [ENCODER:67:DDI B] on [CRTC:47:pipe B]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344268] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344272] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] using [ENCODER:74:DDI C] on [CRTC:58:pipe C]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344275] [drm:drm_atomic_helper_check_modeset] [CRTC:36:pipe A] needs all connectors, enable: y, active: y
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344279] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344286] [drm:drm_atomic_helper_check_modeset] [CRTC:47:pipe B] needs all connectors, enable: y, active: y
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344291] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344297] [drm:drm_atomic_helper_check_modeset] [CRTC:58:pipe C] needs all connectors, enable: y, active: y
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344301] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344310] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344382] [drm:intel_atomic_check [i915]] [CONNECTOR:60:eDP-1] checking for sink bpp constrains
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344432] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344488] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max bw 270000 pixel clock 141000KHz
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344538] [drm:intel_dp_compute_config [i915]] DP link bw 0a rate select 00 lane count 2 clock 270000 bpp 24
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344586] [drm:intel_dp_compute_config [i915]] DP link bw required 423000 available 540000
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344638] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344688] [drm:intel_dump_pipe_config [i915]] [CRTC:36:pipe A][modeset]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344736] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344785] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6571076, gmch_n: 8388608, link_m: 273794, link_n: 524288, tu: 64
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344832] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344878] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344887] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344933] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344940] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 141000 1920 1936 1952 2104 1080 1083 1097 1116 0x48 0xa
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.344987] [drm:intel_dump_pipe_config [i915]] crtc timings: 141000 1920 1936 1952 2104 1080 1083 1097 1116, type: 0x48 flags: 0xa
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345035] [drm:intel_dump_pipe_config [i915]] port clock: 270000, pipe src size: 1920x1080, pixel rate 141000
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345163] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345225] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345290] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345357] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8100, ebb4: 0x2000,pll0: 0x1b, pll1: 0x100, pll2: 0x0, pll3: 0x0, pll6: 0x10803, pll8: 0x9, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345419] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345480] [drm:intel_dump_pipe_config [i915]] [PLANE:26:plane 1A] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345542] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 2A] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345602] [drm:intel_dump_pipe_config [i915]] [PLANE:30:plane 3A] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345663] [drm:intel_dump_pipe_config [i915]] [PLANE:32:plane 4A] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345723] [drm:intel_dump_pipe_config [i915]] [PLANE:34:cursor A] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345730] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345796] [drm:intel_atomic_check [i915]] [CONNECTOR:68:DP-1] checking for sink bpp constrains
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345857] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345922] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 148500KHz
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.345987] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346049] [drm:intel_dp_compute_config [i915]] DP link bw required 445500 available 648000
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346151] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346220] [drm:intel_dump_pipe_config [i915]] [CRTC:47:pipe B][modeset]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346283] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B, pipe bpp: 24, dithering: 0
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346347] [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 4; gmch_m: 5767168, gmch_n: 8388608, link_m: 240298, link_n: 262144, tu: 64
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346409] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346474] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346483] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346546] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346556] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346620] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346680] [drm:intel_dump_pipe_config [i915]] port clock: 162000, pipe src size: 1920x1080, pixel rate 148500
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346741] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346801] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346865] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346930] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x8200, ebb4: 0x2000,pll0: 0x20, pll1: 0x100, pll2: 0x19999a, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.346990] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.347050] [drm:intel_dump_pipe_config [i915]] [PLANE:37:plane 1B] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.347318] [drm:intel_dump_pipe_config [i915]] [PLANE:39:plane 2B] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.347382] [drm:intel_dump_pipe_config [i915]] [PLANE:41:plane 3B] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.347442] [drm:intel_dump_pipe_config [i915]] [PLANE:43:plane 4B] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.347501] [drm:intel_dump_pipe_config [i915]] [PLANE:45:cursor B] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.347508] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.347574] [drm:intel_atomic_check [i915]] [CONNECTOR:75:HDMI-A-2] checking for sink bpp constrains
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.347634] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.347700] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.347762] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpp to 24 for HDMI
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.347823] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.347886] [drm:intel_dump_pipe_config [i915]] [CRTC:58:pipe C][modeset]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.347946] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C, pipe bpp: 24, dithering: 0
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348008] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348101] [drm:intel_dump_pipe_config [i915]] requested mode:
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348112] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348174] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348186] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348250] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348312] [drm:intel_dump_pipe_config [i915]] port clock: 148500, pipe src size: 1920x1080, pixel rate 148500
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348375] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348435] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348497] [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348564] [drm:bxt_dump_hw_state [i915]] dpll_hw_state: ebb0: 0x6300, ebb4: 0x2000,pll0: 0x21, pll1: 0x100, pll2: 0x1a6666, pll3: 0x10000, pll6: 0x30904, pll8: 0x8, pll9: 0xa, pll10: 0x8003c00, pcsdw12: 0x4d
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348626] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348687] [drm:intel_dump_pipe_config [i915]] [PLANE:48:plane 1C] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348746] [drm:intel_dump_pipe_config [i915]] [PLANE:50:plane 2C] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348810] [drm:intel_dump_pipe_config [i915]] [PLANE:52:plane 3C] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348869] [drm:intel_dump_pipe_config [i915]] [PLANE:54:plane 4C] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348929] [drm:intel_dump_pipe_config [i915]] [PLANE:56:cursor C] disabled, scaler_id = -1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.348995] [drm:intel_atomic_check [i915]] New cdclk calculated to be logical 79200 kHz, actual 79200 kHz
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.349097] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.349162] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 0 -> 1, off 0, on 1, ms 1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.349227] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.349292] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 0 -> 1, off 0, on 1, ms 1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.349359] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.349423] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 0 -> 1, off 0, on 1, ms 1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.349489] [drm:bxt_get_dpll [i915]] [CRTC:36:pipe A] using pre-allocated PORT PLL A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.349551] [drm:intel_reference_shared_dpll [i915]] using PORT PLL A for pipe A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.349614] [drm:bxt_get_dpll [i915]] [CRTC:47:pipe B] using pre-allocated PORT PLL B
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.349676] [drm:intel_reference_shared_dpll [i915]] using PORT PLL B for pipe B
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.349743] [drm:bxt_get_dpll [i915]] [CRTC:58:pipe C] using pre-allocated PORT PLL C
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.349807] [drm:intel_reference_shared_dpll [i915]] using PORT PLL C for pipe C
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.349890] [drm:skl_compute_wm [i915]] [PLANE:26:plane 1A] ddb (0 - 0) -> (0 - 332)
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.349946] [drm:skl_compute_wm [i915]] [PLANE:34:cursor A] ddb (0 - 0) -> (332 - 340)
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.350005] [drm:skl_compute_wm [i915]] [PLANE:37:plane 1B] ddb (0 - 0) -> (340 - 672)
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.350090] [drm:skl_compute_wm [i915]] [PLANE:45:cursor B] ddb (0 - 0) -> (672 - 680)
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.350150] [drm:skl_compute_wm [i915]] [PLANE:48:plane 1C] ddb (0 - 0) -> (680 - 1012)
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.350212] [drm:skl_compute_wm [i915]] [PLANE:56:cursor C] ddb (0 - 0) -> (1012 - 1020)
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.350220] [drm:drm_atomic_commit] committing ffff880160e69548
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.351249] [drm:intel_power_well_enable [i915]] enabling always-on
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.351334] [drm:intel_power_well_enable [i915]] enabling DC off
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.351409] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.351489] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.352175] [drm:intel_power_well_enable [i915]] enabling power well 2
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.352239] [drm:skl_set_power_well [i915]] Enabling power well 2
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.352389] [drm:intel_power_well_enable [i915]] enabling dpio-common-b
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.352613] [drm:intel_power_well_enable [i915]] enabling dpio-common-c
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.352849] [drm:intel_atomic_commit_tail [i915]] [ENCODER:59:DDI A]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.352914] [drm:intel_atomic_commit_tail [i915]] [ENCODER:67:DDI B]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.352981] [drm:intel_atomic_commit_tail [i915]] [ENCODER:69:DP-MST A]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.353047] [drm:intel_atomic_commit_tail [i915]] [ENCODER:70:DP-MST B]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.353152] [drm:intel_atomic_commit_tail [i915]] [ENCODER:71:DP-MST C]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.353217] [drm:intel_atomic_commit_tail [i915]] [ENCODER:74:DDI C]
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.353287] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.353366] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.353431] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.353573] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL A (active 1, on? 0) for crtc 36
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.353660] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.354518] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.354581] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.354674] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.354775] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.921576] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000060
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.921683] [drm:wait_panel_status [i915]] Wait complete
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.921779] [drm:edp_panel_on [i915]] Wait for panel power on
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  137.921876] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000063
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  138.024071] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x00000008, dig 0x1a001818, pins 0x00000010
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  138.024178] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  138.024275] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  138.024482] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  138.123655] [drm:wait_panel_status [i915]] Wait complete
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  138.123756] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  138.123849] [drm:skl_set_power_well [i915]] Disabling AUX A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  138.123947] [drm:intel_power_well_enable [i915]] enabling DDI A IO power well
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  138.124034] [drm:skl_set_power_well [i915]] Enabling DDI A IO power well
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  138.124333] [drm:intel_power_well_enable [i915]] enabling AUX A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  138.124473] [drm:skl_set_power_well [i915]] Enabling AUX A
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  138.124668] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>Jun 28 16:08:38 GLK-2-GLKRVP1DDR405 kernel: [  138.124811] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000006b
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.127081] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.127245] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.127361] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.128311] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.128431] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.129777] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.129901] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 270000, Lane count = 2
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.131854] [drm:intel_enable_pipe [i915]] enabling pipe A
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.132289] [drm:intel_edp_backlight_on [i915]] 
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.132413] [drm:intel_panel_enable_backlight [i915]] pipe A
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.133647] [drm:intel_dp_aux_enable_backlight [i915]] VBT defined backlight frequency 200 Hz
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.135388] [drm:intel_dp_aux_enable_backlight [i915]] Enable dynamic brightness.
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.135942] [drm:intel_psr_enable [i915]] PSR not supported on this platform
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.136056] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.136458] [drm:intel_fbc_enable [i915]] reserved 16588800 bytes of contiguous stolen space for FBC, threshold: 1
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.136656] [drm:intel_fbc_enable [i915]] Enabling FBC on pipe A
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.136951] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL B (active 2, on? 0) for crtc 47
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.137025] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.137257] [drm:intel_power_well_enable [i915]] enabling DDI B IO power well
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.137314] [drm:skl_set_power_well [i915]] Enabling DDI B IO power well
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.137370] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.137425] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.137918] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.137974] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.138648] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.138703] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.139214] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.139270] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.139328] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.139381] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.139881] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.139935] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.140012] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.140109] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.140169] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.140230] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.140284] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.140814] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.140869] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.141028] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.141118] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.141607] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.141662] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.142359] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.142417] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.142912] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.142967] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.143024] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.143118] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.143659] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.143713] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.143776] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.143832] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.143888] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.143941] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.144471] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.144526] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.144989] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.145043] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.145558] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.145613] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.146337] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.146400] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.146930] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.146985] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.147044] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.147137] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.147675] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.147729] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.147797] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.150181] [drm:intel_dp_start_link_train [i915]] Link Training Passed at Link Rate = 162000, Lane count = 4
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.150251] [drm:intel_power_well_enable [i915]] enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.150300] [drm:skl_set_power_well [i915]] Enabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.150809] [drm:intel_power_well_disable [i915]] disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.150855] [drm:skl_set_power_well [i915]] Disabling AUX B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.151747] [drm:intel_enable_pipe [i915]] enabling pipe B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.151969] [drm:intel_enable_shared_dpll [i915]] enable PORT PLL C (active 4, on? 0) for crtc 58
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.152017] [drm:intel_enable_shared_dpll [i915]] enabling PORT PLL C
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.152256] [drm:intel_power_well_enable [i915]] enabling DDI C IO power well
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.152301] [drm:skl_set_power_well [i915]] Enabling DDI C IO power well
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.153199] [drm:intel_enable_pipe [i915]] enabling pipe C
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.171232] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:60:eDP-1]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.171344] [drm:intel_atomic_commit_tail [i915]] [CRTC:36:pipe A]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.171766] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL A
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.172260] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:68:DP-1]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.172345] [drm:intel_atomic_commit_tail [i915]] [CRTC:47:pipe B]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.172610] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL B
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.172801] [drm:verify_connector_state.isra.51 [i915]] [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.172902] [drm:intel_atomic_commit_tail [i915]] [CRTC:58:pipe C]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.173050] [drm:verify_single_dpll_state.isra.77 [i915]] PORT PLL C
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.173173] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e69548
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.173332] [drm:__drm_atomic_state_free] Freeing atomic state ffff880160e69548
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.174952] [drm:drm_atomic_state_init] Allocated atomic state ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.174977] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880177f61e18 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.174993] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff88015dc66678 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175032] [drm:drm_atomic_get_plane_state] Added [PLANE:28:plane 2A] ffff880177f632e8 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175037] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f632e8 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175041] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880177f632e8
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175053] [drm:drm_atomic_get_plane_state] Added [PLANE:30:plane 3A] ffff880177f62508 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175057] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f62508 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175060] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880177f62508
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175071] [drm:drm_atomic_get_plane_state] Added [PLANE:32:plane 4A] ffff880177f606f8 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175075] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f606f8 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175079] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880177f606f8
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175089] [drm:drm_atomic_get_plane_state] Added [PLANE:34:cursor A] ffff880177f604a8 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175093] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f604a8 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175096] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880177f604a8
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175107] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880177f61288 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175122] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff88015dc61bf8 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175133] [drm:drm_atomic_get_plane_state] Added [PLANE:39:plane 2B] ffff880177f60008 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175137] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f60008 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175140] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880177f60008
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175151] [drm:drm_atomic_get_plane_state] Added [PLANE:41:plane 3B] ffff880177f63098 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175155] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f63098 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175158] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880177f63098
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175169] [drm:drm_atomic_get_plane_state] Added [PLANE:43:plane 4B] ffff880177f61bc8 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175172] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f61bc8 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175176] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880177f61bc8
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175186] [drm:drm_atomic_get_plane_state] Added [PLANE:45:cursor B] ffff880177f60b98 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175189] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f60b98 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175193] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880177f60b98
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175203] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880177f60258 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175217] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff8801764537e8 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175228] [drm:drm_atomic_get_plane_state] Added [PLANE:50:plane 2C] ffff880177f62e48 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175231] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f62e48 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175235] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880177f62e48
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175245] [drm:drm_atomic_get_plane_state] Added [PLANE:52:plane 3C] ffff880177f62068 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175249] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f62068 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175252] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880177f62068
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175263] [drm:drm_atomic_get_plane_state] Added [PLANE:54:plane 4C] ffff880177f62758 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175266] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f62758 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175270] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880177f62758
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175280] [drm:drm_atomic_get_plane_state] Added [PLANE:56:cursor C] ffff880177f63c28 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175283] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f63c28 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175287] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff880177f63c28
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175322] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88015dc66678
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175327] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f61e18 to [CRTC:36:pipe A]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175331] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177f61e18
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175337] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175385] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880177fc9228 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175403] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177fc9228 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175408] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177fc9228 to [CRTC:36:pipe A]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175421] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88015dc61bf8
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175425] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f61288 to [CRTC:47:pipe B]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175429] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177f61288
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175434] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175447] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880177fc8e88 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175454] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177fc8e88 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175459] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177fc8e88 to [CRTC:47:pipe B]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175471] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff8801764537e8
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175475] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880177f60258 to [CRTC:58:pipe C]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175479] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880177f60258
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175484] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175499] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880177fc83a8 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175504] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177fc83a8 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175508] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177fc83a8 to [CRTC:58:pipe C]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175512] [drm:drm_atomic_check_only] checking ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175531] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175537] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175541] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175546] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175550] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175555] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175645] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175716] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175787] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175856] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175927] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.175995] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.176081] [drm:drm_atomic_commit] committing ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.187589] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.187795] [drm:__drm_atomic_state_free] Freeing atomic state ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.188296] Console: switching to colour frame buffer device 240x67
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.188954] [drm:drm_atomic_state_init] Allocated atomic state ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.188971] [drm:drm_atomic_get_crtc_state] Added [CRTC:36:pipe A] ffff880176454138 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.188984] [drm:drm_atomic_get_plane_state] Added [PLANE:26:plane 1A] ffff880175bf6758 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189001] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880176454138
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189033] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175bf6758 to [CRTC:36:pipe A]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189037] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175bf6758
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189044] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:36:pipe A] to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189069] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:60:eDP-1] ffff880177e875c8 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189078] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177e875c8 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189083] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177e875c8 to [CRTC:36:pipe A]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189098] [drm:drm_atomic_get_crtc_state] Added [CRTC:47:pipe B] ffff880176452e98 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189110] [drm:drm_atomic_get_plane_state] Added [PLANE:37:plane 1B] ffff880175bf5bc8 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189123] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff880176452e98
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189127] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175bf5bc8 to [CRTC:47:pipe B]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189131] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175bf5bc8
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189136] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:47:pipe B] to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189150] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:68:DP-1] ffff880177e87b38 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189157] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177e87b38 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189162] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177e87b38 to [CRTC:47:pipe B]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189177] [drm:drm_atomic_get_crtc_state] Added [CRTC:58:pipe C] ffff88017ab1ae98 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189188] [drm:drm_atomic_get_plane_state] Added [PLANE:48:plane 1C] ffff880175bf79d8 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189201] [drm:drm_atomic_set_mode_for_crtc] Set [MODE:1920x1080] for CRTC state ffff88017ab1ae98
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189205] [drm:drm_atomic_set_crtc_for_plane] Link plane state ffff880175bf79d8 to [CRTC:58:pipe C]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189208] [drm:drm_atomic_set_fb_for_plane] Set [FB:107] for plane state ffff880175bf79d8
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189213] [drm:drm_atomic_add_affected_connectors] Adding all current connectors for [CRTC:58:pipe C] to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189228] [drm:drm_atomic_get_connector_state] Added [CONNECTOR:75:HDMI-A-2] ffff880177e873f8 state to ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189233] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177e873f8 to [NOCRTC]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189237] [drm:drm_atomic_set_crtc_for_connector] Link connector state ffff880177e873f8 to [CRTC:58:pipe C]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189241] [drm:drm_atomic_check_only] checking ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189258] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:60:eDP-1]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189264] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:60:eDP-1] keeps [ENCODER:59:DDI A], now on [CRTC:36:pipe A]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189268] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:68:DP-1]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189274] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:68:DP-1] keeps [ENCODER:67:DDI B], now on [CRTC:47:pipe B]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189277] [drm:drm_atomic_helper_check_modeset] Updating routing for [CONNECTOR:75:HDMI-A-2]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189282] [drm:drm_atomic_helper_check_modeset] [CONNECTOR:75:HDMI-A-2] keeps [ENCODER:74:DDI C], now on [CRTC:58:pipe C]
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189384] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:36:pipe A] has [PLANE:26:plane 1A] with fb 107
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189459] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:26:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189532] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:47:pipe B] has [PLANE:37:plane 1B] with fb 107
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189603] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:37:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189673] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:58:pipe C] has [PLANE:48:plane 1C] with fb 107
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189742] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:48:plane 1C] visible 1 -> 1, off 0, on 0, ms 0
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.189764] [drm:drm_atomic_commit] committing ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.204252] [drm:drm_atomic_state_default_clear] Clearing atomic state ffff880160e6fa38
>Jun 28 16:08:39 GLK-2-GLKRVP1DDR405 kernel: [  138.204387] [drm:__drm_atomic_state_free] Freeing atomic state ffff880160e6fa38
>Jun 28 16:08:42 GLK-2-GLKRVP1DDR405 kernel: [  141.185506] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>Jun 28 16:08:42 GLK-2-GLKRVP1DDR405 kernel: [  141.185564] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000067
>Jun 28 16:08:42 GLK-2-GLKRVP1DDR405 kernel: [  141.185610] [drm:intel_power_well_disable [i915]] disabling AUX A
>Jun 28 16:08:42 GLK-2-GLKRVP1DDR405 kernel: [  141.185655] [drm:skl_set_power_well [i915]] Disabling AUX A

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Attachments on bug 101636: 132322 | 132323 | 132889 | 132890

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