Attachment 35909 Details for Bug 27220 – [Patch 2/2]: configure the pipeconf dithering flag correctly

[patch] [Patch 2/2]: configure the pipeconf dithering flag correctly

0002-drm-i915-Configure-the-PIPECONF-dither-correctly-fo.patch (text/plain), 1.29 KB, created by ykzhao on 2010-05-28 05:41:11 UTC

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Creator: ykzhao

Created: 2010-05-28 05:41:11 UTC

Size: 1.29 KB

patch

obsolete

>From 76539f1fe9262203c5fd325d884d63f3d153dc03 Mon Sep 17 00:00:00 2001
>From: Zhao Yakui <yakui.zhao@intel.com>
>Date: Fri, 28 May 2010 20:28:41 +0800
>Subject: [PATCH 2/2] drm/i915: Configure the PIPECONF dither correctly for eDP
>
>The non-8 BPC can be used for the eDP output device that is connected through
>DP-A or DP-D on PCH. In such case we should set the PIPECONF dither correctly.
>
>Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
>---
> drivers/gpu/drm/i915/intel_display.c |   11 +++++++++++
> 1 files changed, 11 insertions(+), 0 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>index ef85ea8..3072417 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -3625,6 +3625,17 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
> 	/* setup pipeconf */
> 	pipeconf = I915_READ(pipeconf_reg);
> 
>+	if (HAS_PCH_SPLIT(dev) && (is_edp || intel_edp_is_pch(crtc))) {
>+		/* configure the dither correctly for eDP */
>+		pipeconf &= ~PIPE_DITHER_TYPE_MASK;
>+		if ((pipeconf & PIPE_BPC_MASK) != PIPE_8BPC) {
>+			pipeconf |= PIPE_ENABLE_DITHER;
>+			pipeconf |= PIPE_DITHER_TYPE_ST01;
>+		} else {
>+			pipeconf &= ~PIPE_ENABLE_DITHER;
>+		}
>+	}
>+
> 	/* Set up the display plane register */
> 	dspcntr = DISPPLANE_GAMMA_ENABLE;
> 
>-- 
>1.5.4.5
>

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Attachments on bug 27220: 34274 | 34275 | 34276 | 34277 | 34278 | 34279 | 35846 | 35847 | 35888 | 35889 | 35908 | 35909 | 36377 | 37558 | 37559 | 38402

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