Attachment 71785 Details for Bug 58497 – I-G-T/testdisplay dmesg

I-G-T/testdisplay dmesg

a (text/plain), 127.96 KB, created by shui yangwei on 2012-12-19 04:24:08 UTC

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Description:

Filename:

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Creator: shui yangwei

Created: 2012-12-19 04:24:08 UTC

Size: 127.96 KB

patch

obsolete

><7>[  338.781027] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  338.781031] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  338.793818] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  338.810828] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 8, cursor: 6
><7>[  338.810838] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  338.810841] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  338.810844] [drm:intel_ddi_calculate_wrpll], WRPLL: 135000KHz refresh rate with p=6, n2=21 r2=14
><7>[  338.810868] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  338.810870] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  338.810872] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  338.810874] [drm:drm_mode_debug_printmodeline], Modeline 73:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
><7>[  338.815012] [drm:ironlake_update_plane], Writing base 04592000 00000000 0 0 5120
><7>[  338.866801] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  338.866807] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 8, cursor: 6
><7>[  338.866812] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:73:1280x1024]
><7>[  338.866815] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  338.866818] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  338.866820] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  338.866822] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  338.866825] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  338.866827] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  338.918784] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  338.918788] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  338.918791] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  338.918793] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  338.918795] [drm:haswell_write_eld], ELD on pipe A
><7>[  338.918812] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 8, cursor: 6
><7>[  338.970765] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  339.022747] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  339.036190] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  339.036731] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  339.036737] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  339.036740] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  339.036742] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  339.036744] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  339.036747] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  339.036749] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  344.099207] [drm:drm_mode_addfb], [FB:73]
><7>[  344.099269] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  344.099278] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  344.099281] [drm:intel_crtc_set_config], [CRTC:3] [FB:73] #connectors=1 (x y) (0 0)
><7>[  344.099285] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  344.099287] [drm:drm_mode_debug_printmodeline], Modeline 73:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
><7>[  344.099291] [drm:drm_mode_debug_printmodeline], Modeline 74:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
><7>[  344.099295] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  344.099297] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  344.099299] [drm:drm_mode_debug_printmodeline], Modeline 74:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
><7>[  344.099303] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  344.099307] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  344.112687] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  344.126905] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 8, cursor: 6
><7>[  344.126916] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  344.126919] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  344.126922] [drm:intel_ddi_calculate_wrpll], WRPLL: 108000KHz refresh rate with p=8, n2=24 r2=15
><7>[  344.126945] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  344.126947] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  344.126950] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  344.126952] [drm:drm_mode_debug_printmodeline], Modeline 74:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
><7>[  344.131140] [drm:ironlake_update_plane], Writing base 04A92000 00000000 0 0 5120
><7>[  344.182875] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  344.182881] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  344.182887] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:74:1280x1024]
><7>[  344.182889] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  344.182892] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  344.182894] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  344.182896] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  344.182899] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  344.182901] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  344.234859] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  344.234863] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  344.234866] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  344.234868] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  344.234871] [drm:haswell_write_eld], ELD on pipe A
><7>[  344.234889] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  344.286840] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  344.338822] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  344.355593] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  344.356783] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  344.356789] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  344.356791] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  344.356794] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  344.356796] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  344.356798] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  344.356800] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  349.418618] [drm:drm_mode_addfb], [FB:74]
><7>[  349.418689] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  349.418697] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  349.418700] [drm:intel_crtc_set_config], [CRTC:3] [FB:74] #connectors=1 (x y) (0 0)
><7>[  349.418704] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  349.418707] [drm:drm_mode_debug_printmodeline], Modeline 74:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
><7>[  349.418710] [drm:drm_mode_debug_printmodeline], Modeline 75:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
><7>[  349.418714] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  349.418717] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  349.418719] [drm:drm_mode_debug_printmodeline], Modeline 75:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
><7>[  349.418723] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  349.418727] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  349.435423] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  349.453977] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  349.453988] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  349.453991] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><6>[  349.453995] [drm] WRPLL: using settings for 137000KHz on 136750KHz mode
><7>[  349.453996] [drm:intel_ddi_calculate_wrpll], WRPLL: 136750KHz refresh rate with p=6, n2=35 r2=23
><7>[  349.454020] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  349.454022] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  349.454024] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  349.454026] [drm:drm_mode_debug_printmodeline], Modeline 75:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
><7>[  349.458080] [drm:ironlake_update_plane], Writing base 04F92000 00000000 0 0 5760
><7>[  349.509945] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  349.509951] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 8, cursor: 6
><7>[  349.509957] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:75:1440x900]
><7>[  349.509960] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  349.509962] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  349.509964] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  349.509967] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  349.509969] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  349.509971] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  349.561929] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  349.561933] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  349.561936] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  349.561938] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  349.561941] [drm:haswell_write_eld], ELD on pipe A
><7>[  349.561958] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 8, cursor: 6
><7>[  349.613913] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  349.665894] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  349.679324] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  349.679861] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  349.679866] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  349.679869] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  349.679872] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  349.679874] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  349.679876] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  349.679878] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  354.742077] [drm:drm_mode_addfb], [FB:75]
><7>[  354.742144] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  354.742153] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  354.742156] [drm:intel_crtc_set_config], [CRTC:3] [FB:75] #connectors=1 (x y) (0 0)
><7>[  354.742160] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  354.742162] [drm:drm_mode_debug_printmodeline], Modeline 75:"1440x900" 75 136750 1440 1536 1688 1936 900 903 909 942 0x40 0x6
><7>[  354.742166] [drm:drm_mode_debug_printmodeline], Modeline 76:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
><7>[  354.742170] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  354.742173] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  354.742174] [drm:drm_mode_debug_printmodeline], Modeline 76:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
><7>[  354.742180] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  354.742184] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  354.750852] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  354.766052] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 8, cursor: 6
><7>[  354.766063] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  354.766066] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><6>[  354.766069] [drm] WRPLL: using settings for 89000KHz on 88750KHz mode
><7>[  354.766071] [drm:intel_ddi_calculate_wrpll], WRPLL: 88750KHz refresh rate with p=10, n2=28 r2=17
><7>[  354.766094] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  354.766096] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  354.766098] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  354.766100] [drm:drm_mode_debug_printmodeline], Modeline 76:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
><7>[  354.770203] [drm:ironlake_update_plane], Writing base 05484000 00000000 0 0 5760
><7>[  354.822023] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  354.822029] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  354.822035] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:76:1440x900]
><7>[  354.822038] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  354.822040] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  354.822042] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  354.822045] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  354.822048] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  354.822050] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  354.874009] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  354.874013] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  354.874016] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  354.874018] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  354.874020] [drm:haswell_write_eld], ELD on pipe A
><7>[  354.874038] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  354.925991] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  354.977972] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  354.994741] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  354.995934] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  354.995940] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  354.995942] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  354.995945] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  354.995947] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  354.995950] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  354.995951] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  360.058092] [drm:drm_mode_addfb], [FB:76]
><7>[  360.058158] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  360.058166] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  360.058169] [drm:intel_crtc_set_config], [CRTC:3] [FB:76] #connectors=1 (x y) (0 0)
><7>[  360.058174] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  360.058176] [drm:drm_mode_debug_printmodeline], Modeline 76:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
><7>[  360.058180] [drm:drm_mode_debug_printmodeline], Modeline 77:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
><7>[  360.058184] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  360.058187] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  360.058188] [drm:drm_mode_debug_printmodeline], Modeline 77:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
><7>[  360.058192] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  360.058198] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  360.073663] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  360.092098] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  360.092108] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  360.092111] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  360.092114] [drm:intel_ddi_calculate_wrpll], WRPLL: 108000KHz refresh rate with p=8, n2=24 r2=15
><7>[  360.092138] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  360.092140] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  360.092142] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  360.092144] [drm:drm_mode_debug_printmodeline], Modeline 77:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
><7>[  360.095988] [drm:ironlake_update_plane], Writing base 05976000 00000000 0 0 5120
><7>[  360.147096] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  360.147102] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  360.147108] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:77:1280x960]
><7>[  360.147111] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  360.147113] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  360.147115] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  360.147118] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  360.147121] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  360.147123] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  360.199079] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  360.199083] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  360.199086] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  360.199088] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  360.199091] [drm:haswell_write_eld], ELD on pipe A
><7>[  360.199108] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  360.251063] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  360.303006] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  360.319785] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  360.321007] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  360.321012] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  360.321016] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  360.321018] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  360.321020] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  360.321023] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  360.321025] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  365.382229] [drm:drm_mode_addfb], [FB:77]
><7>[  365.382293] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  365.382302] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  365.382305] [drm:intel_crtc_set_config], [CRTC:3] [FB:77] #connectors=1 (x y) (0 0)
><7>[  365.382309] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  365.382311] [drm:drm_mode_debug_printmodeline], Modeline 77:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
><7>[  365.382315] [drm:drm_mode_debug_printmodeline], Modeline 78:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
><7>[  365.382319] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  365.382322] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  365.382324] [drm:drm_mode_debug_printmodeline], Modeline 78:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
><7>[  365.382327] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  365.382332] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  365.384620] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  365.402204] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  365.402214] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  365.402217] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><6>[  365.402221] [drm] WRPLL: using settings for 86000KHz on 85885KHz mode
><7>[  365.402222] [drm:intel_ddi_calculate_wrpll], WRPLL: 85885KHz refresh rate with p=10, n2=43 r2=27
><7>[  365.402246] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  365.402248] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  365.402250] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  365.402252] [drm:drm_mode_debug_printmodeline], Modeline 78:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
><7>[  365.405541] [drm:ironlake_update_plane], Writing base 05E26000 00000000 0 0 5504
><7>[  365.457177] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  365.457182] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  365.457188] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:78:1366x768]
><7>[  365.457191] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  365.457193] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  365.457195] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  365.457198] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  365.457201] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  365.457203] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  365.509159] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  365.509163] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  365.509166] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  365.509168] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  365.509171] [drm:haswell_write_eld], ELD on pipe A
><7>[  365.509188] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  365.561140] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  365.613123] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  365.629874] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  365.631084] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  365.631089] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  365.631092] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  365.631095] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  365.631097] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  365.631099] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  365.631101] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  370.691991] [drm:drm_mode_addfb], [FB:78]
><7>[  370.692059] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  370.692068] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  370.692071] [drm:intel_crtc_set_config], [CRTC:3] [FB:78] #connectors=1 (x y) (0 0)
><7>[  370.692075] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  370.692077] [drm:drm_mode_debug_printmodeline], Modeline 78:"1366x768" 60 85885 1366 1439 1583 1800 768 769 772 795 0x0 0x6
><7>[  370.692081] [drm:drm_mode_debug_printmodeline], Modeline 79:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
><7>[  370.692085] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  370.692088] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  370.692090] [drm:drm_mode_debug_printmodeline], Modeline 79:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
><7>[  370.692095] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  370.692099] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  370.703101] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  370.721282] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  370.721292] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  370.721295] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><6>[  370.721299] [drm] WRPLL: using settings for 85750KHz on 85500KHz mode
><7>[  370.721300] [drm:intel_ddi_calculate_wrpll], WRPLL: 85500KHz refresh rate with p=10, n2=27 r2=17
><7>[  370.721324] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  370.721326] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  370.721328] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  370.721330] [drm:drm_mode_debug_printmodeline], Modeline 79:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
><7>[  370.724488] [drm:ironlake_update_plane], Writing base 0622E000 00000000 0 0 5440
><7>[  370.776249] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  370.776255] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  370.776261] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:79:1360x768]
><7>[  370.776264] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  370.776266] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  370.776268] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  370.776271] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  370.776274] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  370.776276] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  370.828232] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  370.828236] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  370.828240] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  370.828242] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  370.828244] [drm:haswell_write_eld], ELD on pipe A
><7>[  370.828261] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  370.880216] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  370.932196] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  370.948880] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  370.950160] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  370.950165] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  370.950169] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  370.950172] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  370.950174] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  370.950176] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  370.950178] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  376.010997] [drm:drm_mode_addfb], [FB:79]
><7>[  376.011065] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  376.011073] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  376.011076] [drm:intel_crtc_set_config], [CRTC:3] [FB:79] #connectors=1 (x y) (0 0)
><7>[  376.011080] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  376.011083] [drm:drm_mode_debug_printmodeline], Modeline 79:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
><7>[  376.011086] [drm:drm_mode_debug_printmodeline], Modeline 80:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
><7>[  376.011090] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  376.011093] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  376.011095] [drm:drm_mode_debug_printmodeline], Modeline 80:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
><7>[  376.011099] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  376.011103] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  376.013456] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  376.030357] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  376.030368] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  376.030371] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><6>[  376.030374] [drm] WRPLL: using settings for 107000KHz on 106500KHz mode
><7>[  376.030376] [drm:intel_ddi_calculate_wrpll], WRPLL: 106500KHz refresh rate with p=8, n2=46 r2=29
><7>[  376.030400] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  376.030401] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  376.030404] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  376.030406] [drm:drm_mode_debug_printmodeline], Modeline 80:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
><7>[  376.033937] [drm:ironlake_update_plane], Writing base 0662A000 00000000 0 0 5120
><7>[  376.085330] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  376.085336] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  376.085342] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:80:1280x800]
><7>[  376.085345] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  376.085347] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  376.085349] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  376.085352] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  376.085355] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  376.085357] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  376.137313] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  376.137317] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  376.137320] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  376.137322] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  376.137325] [drm:haswell_write_eld], ELD on pipe A
><7>[  376.137342] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  376.189293] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  376.241275] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  376.254664] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  376.255233] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  376.255238] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  376.255243] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  376.255246] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  376.255248] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  376.255251] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  376.255256] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  381.316291] [drm:drm_mode_addfb], [FB:80]
><7>[  381.316380] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  381.316388] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  381.316391] [drm:intel_crtc_set_config], [CRTC:3] [FB:80] #connectors=1 (x y) (0 0)
><7>[  381.316396] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  381.316399] [drm:drm_mode_debug_printmodeline], Modeline 80:"1280x800" 75 106500 1280 1360 1488 1696 800 803 809 838 0x40 0x6
><7>[  381.316402] [drm:drm_mode_debug_printmodeline], Modeline 81:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
><7>[  381.316407] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  381.316409] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  381.316411] [drm:drm_mode_debug_printmodeline], Modeline 81:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
><7>[  381.316415] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  381.316421] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  381.323506] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  381.338436] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  381.338447] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  381.338450] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  381.338452] [drm:intel_ddi_calculate_wrpll], WRPLL: 71000KHz refresh rate with p=12, n2=30 r2=19
><7>[  381.338476] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  381.338478] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  381.338480] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  381.338482] [drm:drm_mode_debug_printmodeline], Modeline 81:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
><7>[  381.342018] [drm:ironlake_update_plane], Writing base 06A12000 00000000 0 0 5120
><7>[  381.393406] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  381.393412] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  381.393418] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:81:1280x800]
><7>[  381.393421] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  381.393423] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  381.393425] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  381.393428] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  381.393431] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  381.393433] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  381.445389] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  381.445393] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  381.445396] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  381.445398] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  381.445401] [drm:haswell_write_eld], ELD on pipe A
><7>[  381.445418] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  381.497373] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  381.549353] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  381.566144] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  381.567324] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  381.567329] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  381.567332] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  381.567334] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  381.567337] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  381.567339] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  381.567341] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  386.626986] [drm:drm_mode_addfb], [FB:81]
><7>[  386.627054] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  386.627062] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  386.627066] [drm:intel_crtc_set_config], [CRTC:3] [FB:81] #connectors=1 (x y) (0 0)
><7>[  386.627070] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  386.627073] [drm:drm_mode_debug_printmodeline], Modeline 81:"1280x800" 60 71000 1280 1328 1360 1440 800 803 809 823 0x40 0x9
><7>[  386.627077] [drm:drm_mode_debug_printmodeline], Modeline 82:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
><7>[  386.627082] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  386.627084] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  386.627087] [drm:drm_mode_debug_printmodeline], Modeline 82:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
><7>[  386.627091] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  386.627096] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  386.634843] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  386.652513] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  386.652523] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  386.652526] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  386.652529] [drm:intel_ddi_calculate_wrpll], WRPLL: 108000KHz refresh rate with p=8, n2=24 r2=15
><7>[  386.652553] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  386.652555] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  386.652557] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  386.652559] [drm:drm_mode_debug_printmodeline], Modeline 82:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
><7>[  386.655573] [drm:ironlake_update_plane], Writing base 06DFA000 00000000 0 0 4608
><7>[  386.707483] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  386.707489] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  386.707494] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:82:1152x864]
><7>[  386.707497] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  386.707499] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  386.707501] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  386.707504] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  386.707507] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  386.707509] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  386.759468] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  386.759472] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  386.759475] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  386.759477] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  386.759480] [drm:haswell_write_eld], ELD on pipe A
><7>[  386.759497] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  386.811453] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  386.863403] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  386.876849] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  386.877437] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  386.877443] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  386.877446] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  386.877448] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  386.877450] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  386.877453] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  386.877454] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  391.937956] [drm:drm_mode_addfb], [FB:82]
><7>[  391.938022] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  391.938032] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  391.938035] [drm:intel_crtc_set_config], [CRTC:3] [FB:82] #connectors=1 (x y) (0 0)
><7>[  391.938039] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  391.938041] [drm:drm_mode_debug_printmodeline], Modeline 82:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
><7>[  391.938044] [drm:drm_mode_debug_printmodeline], Modeline 83:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
><7>[  391.938049] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  391.938052] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  391.938054] [drm:drm_mode_debug_printmodeline], Modeline 83:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
><7>[  391.938058] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  391.938062] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  391.941598] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  391.955591] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  391.955601] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  391.955604] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  391.955607] [drm:intel_ddi_calculate_wrpll], WRPLL: 102250KHz refresh rate with p=6, n2=25 r2=22
><7>[  391.955631] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  391.955633] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  391.955635] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  391.955637] [drm:drm_mode_debug_printmodeline], Modeline 83:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
><7>[  391.958635] [drm:ironlake_update_plane], Writing base 071C6000 00000000 0 0 5120
><7>[  392.010565] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  392.010571] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  392.010577] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:83:1280x768]
><7>[  392.010579] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  392.010582] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  392.010584] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  392.010586] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  392.010589] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  392.010591] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  392.062548] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  392.062551] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  392.062554] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  392.062556] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  392.062559] [drm:haswell_write_eld], ELD on pipe A
><7>[  392.062576] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  392.114530] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  392.166510] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  392.179974] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  392.180511] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  392.180516] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  392.180520] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  392.180522] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  392.180524] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  392.180526] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  392.180528] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  397.241103] [drm:drm_mode_addfb], [FB:83]
><7>[  397.241169] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  397.241177] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  397.241180] [drm:intel_crtc_set_config], [CRTC:3] [FB:83] #connectors=1 (x y) (0 0)
><7>[  397.241184] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  397.241187] [drm:drm_mode_debug_printmodeline], Modeline 83:"1280x768" 75 102250 1280 1360 1488 1696 768 771 778 805 0x40 0x9
><7>[  397.241190] [drm:drm_mode_debug_printmodeline], Modeline 84:"1280x768" 60 68250 1280 1328 1360 1440 768 771 778 790 0x40 0x9
><7>[  397.241194] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  397.241198] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  397.241200] [drm:drm_mode_debug_printmodeline], Modeline 84:"1280x768" 60 68250 1280 1328 1360 1440 768 771 778 790 0x40 0x9
><7>[  397.241204] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  397.241208] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  397.250885] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  397.264674] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 7, cursor: 6
><7>[  397.264685] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  397.264688] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  397.264690] [drm:intel_ddi_calculate_wrpll], WRPLL: 68250KHz refresh rate with p=14, n2=46 r2=26
><7>[  397.264714] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  397.264716] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  397.264718] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  397.264720] [drm:drm_mode_debug_printmodeline], Modeline 84:"1280x768" 60 68250 1280 1328 1360 1440 768 771 778 790 0x40 0x9
><7>[  397.267680] [drm:ironlake_update_plane], Writing base 07586000 00000000 0 0 5120
><7>[  397.319644] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  397.319649] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
><7>[  397.319655] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:84:1280x768]
><7>[  397.319658] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  397.319660] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  397.319662] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  397.319665] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  397.319668] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  397.319670] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  397.371627] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  397.371631] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  397.371634] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  397.371636] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  397.371638] [drm:haswell_write_eld], ELD on pipe A
><7>[  397.371655] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
><7>[  397.423608] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  397.475590] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  397.492373] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  397.493573] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  397.493578] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  397.493582] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  397.493584] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  397.493586] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  397.493588] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  397.493591] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  402.553339] [drm:drm_mode_addfb], [FB:84]
><7>[  402.553408] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  402.553417] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  402.553420] [drm:intel_crtc_set_config], [CRTC:3] [FB:84] #connectors=1 (x y) (0 0)
><7>[  402.553423] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  402.553427] [drm:drm_mode_debug_printmodeline], Modeline 84:"1280x768" 60 68250 1280 1328 1360 1440 768 771 778 790 0x40 0x9
><7>[  402.553431] [drm:drm_mode_debug_printmodeline], Modeline 85:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
><7>[  402.553435] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  402.553437] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  402.553439] [drm:drm_mode_debug_printmodeline], Modeline 85:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
><7>[  402.553443] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  402.553447] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  402.558227] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  402.576745] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
><7>[  402.576756] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  402.576759] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  402.576761] [drm:intel_ddi_calculate_wrpll], WRPLL: 74250KHz refresh rate with p=10, n2=22 r2=16
><7>[  402.576785] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  402.576787] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  402.576790] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  402.576792] [drm:drm_mode_debug_printmodeline], Modeline 85:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
><7>[  402.579594] [drm:ironlake_update_plane], Writing base 07946000 00000000 0 0 5120
><7>[  402.630684] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  402.630690] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  402.630696] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:85:1280x720]
><7>[  402.630698] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  402.630701] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  402.630703] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  402.630706] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  402.630708] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  402.630710] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  402.682704] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  402.682708] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  402.682711] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  402.682713] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  402.682716] [drm:haswell_write_eld], ELD on pipe A
><7>[  402.682732] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  402.734649] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  402.786666] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  402.806784] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  402.808655] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  402.808661] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  402.808664] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  402.808666] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  402.808669] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  402.808671] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  402.808673] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  407.868912] [drm:drm_mode_addfb], [FB:85]
><7>[  407.868976] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  407.868985] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  407.868988] [drm:intel_crtc_set_config], [CRTC:3] [FB:85] #connectors=1 (x y) (0 0)
><7>[  407.868992] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  407.868995] [drm:drm_mode_debug_printmodeline], Modeline 85:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
><7>[  407.868999] [drm:drm_mode_debug_printmodeline], Modeline 86:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
><7>[  407.869004] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  407.869008] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  407.869010] [drm:drm_mode_debug_printmodeline], Modeline 86:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
><7>[  407.869014] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  407.869019] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  407.884949] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  407.906823] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  407.906833] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  407.906836] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  407.906839] [drm:intel_ddi_calculate_wrpll], WRPLL: 74250KHz refresh rate with p=10, n2=22 r2=16
><7>[  407.906863] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  407.906865] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  407.906867] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  407.906869] [drm:drm_mode_debug_printmodeline], Modeline 86:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
><7>[  407.909669] [drm:ironlake_update_plane], Writing base 07CCA000 00000000 0 0 5120
><7>[  407.960790] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  407.960796] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  407.960802] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:86:1280x720]
><7>[  407.960805] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  407.960807] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  407.960809] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  407.960812] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  407.960815] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  407.960816] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  408.012738] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  408.012742] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  408.012745] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  408.012747] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  408.012750] [drm:haswell_write_eld], ELD on pipe A
><7>[  408.012764] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  408.064757] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  408.116701] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  408.133478] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  408.134732] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  408.134737] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  408.134740] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  408.134742] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  408.134745] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  408.134747] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  408.134749] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  413.193452] [drm:drm_mode_addfb], [FB:86]
><7>[  413.193519] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  413.193528] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  413.193531] [drm:intel_crtc_set_config], [CRTC:3] [FB:86] #connectors=1 (x y) (0 0)
><7>[  413.193535] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  413.193538] [drm:drm_mode_debug_printmodeline], Modeline 86:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
><7>[  413.193541] [drm:drm_mode_debug_printmodeline], Modeline 87:"1440x576i" 50 27000 1440 1464 1590 1728 576 580 586 625 0x40 0x101a
><7>[  413.193546] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  413.193548] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  413.193550] [drm:drm_mode_debug_printmodeline], Modeline 87:"1440x576i" 50 27000 1440 1464 1590 1728 576 580 586 625 0x40 0x101a
><7>[  413.193554] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  413.193558] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  413.198321] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  413.214902] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  413.214913] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  413.214915] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  413.214918] [drm:intel_ddi_calculate_wrpll], WRPLL: 27000KHz refresh rate with p=30, n2=21 r2=14
><7>[  413.214942] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  413.214944] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  413.214946] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  413.214948] [drm:drm_mode_debug_printmodeline], Modeline 87:"1440x576i" 50 27000 1440 1464 1590 1728 576 580 586 625 0x40 0x101a
><7>[  413.217408] [drm:ironlake_update_plane], Writing base 0804E000 00000000 0 0 5760
><7>[  413.268867] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  413.268873] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 4, cursor: 6
><7>[  413.268879] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:87:1440x576i]
><7>[  413.268881] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  413.268884] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  413.268886] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  413.268888] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  413.268891] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  413.268893] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  413.320852] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  413.320856] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  413.320860] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  413.320862] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  413.320864] [drm:haswell_write_eld], ELD on pipe A
><7>[  413.320880] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 4, cursor: 6
><7>[  413.372834] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  413.424816] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  413.444962] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  413.446790] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  413.446795] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  413.446798] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  413.446800] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  413.446802] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  413.446805] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  413.446807] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  418.505551] [drm:drm_mode_addfb], [FB:87]
><7>[  418.505622] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  418.505631] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  418.505634] [drm:intel_crtc_set_config], [CRTC:3] [FB:87] #connectors=1 (x y) (0 0)
><7>[  418.505638] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  418.505641] [drm:drm_mode_debug_printmodeline], Modeline 87:"1440x576i" 50 27000 1440 1464 1590 1728 576 580 586 625 0x40 0x101a
><7>[  418.505645] [drm:drm_mode_debug_printmodeline], Modeline 88:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
><7>[  418.505650] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  418.505653] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  418.505655] [drm:drm_mode_debug_printmodeline], Modeline 88:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
><7>[  418.505659] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  418.505664] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  418.523124] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  418.544941] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 4, cursor: 6
><7>[  418.544951] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  418.544954] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><6>[  418.544957] [drm] WRPLL: using settings for 79000KHz on 78800KHz mode
><7>[  418.544959] [drm:intel_ddi_calculate_wrpll], WRPLL: 78800KHz refresh rate with p=10, n2=38 r2=26
><7>[  418.544983] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  418.544985] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  418.544987] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  418.544989] [drm:drm_mode_debug_printmodeline], Modeline 88:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
><7>[  418.547373] [drm:ironlake_update_plane], Writing base 08378000 00000000 0 0 4096
><7>[  418.598940] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  418.598946] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  418.598952] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:88:1024x768]
><7>[  418.598955] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  418.598957] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  418.598959] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  418.598962] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  418.598965] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  418.598967] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  418.650923] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  418.650927] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  418.650930] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  418.650932] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  418.650934] [drm:haswell_write_eld], ELD on pipe A
><7>[  418.650952] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  418.702908] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  418.754885] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  418.768299] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  418.768872] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  418.768878] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  418.768881] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  418.768883] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  418.768885] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  418.768887] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  418.768889] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  423.827530] [drm:drm_mode_addfb], [FB:88]
><7>[  423.827600] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  423.827609] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  423.827613] [drm:intel_crtc_set_config], [CRTC:3] [FB:88] #connectors=1 (x y) (0 0)
><7>[  423.827618] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  423.827620] [drm:drm_mode_debug_printmodeline], Modeline 88:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5
><7>[  423.827625] [drm:drm_mode_debug_printmodeline], Modeline 89:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
><7>[  423.827629] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  423.827632] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  423.827634] [drm:drm_mode_debug_printmodeline], Modeline 89:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
><7>[  423.827639] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  423.827645] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  423.833395] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  423.847016] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  423.847027] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  423.847030] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  423.847033] [drm:intel_ddi_calculate_wrpll], WRPLL: 75000KHz refresh rate with p=12, n2=25 r2=15
><7>[  423.847056] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  423.847058] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  423.847060] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  423.847062] [drm:drm_mode_debug_printmodeline], Modeline 89:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
><7>[  423.849424] [drm:ironlake_update_plane], Writing base 08678000 00000000 0 0 4096
><7>[  423.901021] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  423.901027] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  423.901033] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:89:1024x768]
><7>[  423.901036] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  423.901038] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  423.901040] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  423.901043] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  423.901045] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  423.901047] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  423.953002] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  423.953006] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  423.953010] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  423.953012] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  423.953014] [drm:haswell_write_eld], ELD on pipe A
><7>[  423.953031] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  424.004990] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  424.056966] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  424.071352] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  424.072968] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  424.072973] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  424.072976] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  424.072978] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  424.072980] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  424.072983] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  424.072984] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  429.131618] [drm:drm_mode_addfb], [FB:89]
><7>[  429.131682] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  429.131690] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  429.131693] [drm:intel_crtc_set_config], [CRTC:3] [FB:89] #connectors=1 (x y) (0 0)
><7>[  429.131697] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  429.131700] [drm:drm_mode_debug_printmodeline], Modeline 89:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
><7>[  429.131703] [drm:drm_mode_debug_printmodeline], Modeline 90:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
><7>[  429.131708] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  429.131710] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  429.131712] [drm:drm_mode_debug_printmodeline], Modeline 90:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
><7>[  429.131716] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  429.131720] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  429.135882] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  429.151131] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 6, cursor: 6
><7>[  429.151142] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  429.151145] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  429.151147] [drm:intel_ddi_calculate_wrpll], WRPLL: 65000KHz refresh rate with p=14, n2=32 r2=19
><7>[  429.151171] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  429.151173] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  429.151176] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  429.151178] [drm:drm_mode_debug_printmodeline], Modeline 90:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
><7>[  429.153558] [drm:ironlake_update_plane], Writing base 08978000 00000000 0 0 4096
><7>[  429.205066] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  429.205072] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
><7>[  429.205078] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:90:1024x768]
><7>[  429.205081] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  429.205083] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  429.205085] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  429.205088] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  429.205091] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  429.205092] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  429.257086] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  429.257090] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  429.257094] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  429.257096] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  429.257098] [drm:haswell_write_eld], ELD on pipe A
><7>[  429.257116] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
><7>[  429.309031] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  429.361049] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  429.377788] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  429.379047] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  429.379052] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  429.379055] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  429.379059] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  429.379061] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  429.379063] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  429.379065] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  434.436499] [drm:drm_mode_addfb], [FB:90]
><7>[  434.436566] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  434.436575] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  434.436579] [drm:intel_crtc_set_config], [CRTC:3] [FB:90] #connectors=1 (x y) (0 0)
><7>[  434.436583] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  434.436585] [drm:drm_mode_debug_printmodeline], Modeline 90:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
><7>[  434.436590] [drm:drm_mode_debug_printmodeline], Modeline 91:"1440x480i" 60 27000 1440 1478 1602 1716 480 488 494 525 0x40 0x101a
><7>[  434.436595] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  434.436598] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  434.436600] [drm:drm_mode_debug_printmodeline], Modeline 91:"1440x480i" 60 27000 1440 1478 1602 1716 480 488 494 525 0x40 0x101a
><7>[  434.436605] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  434.436610] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  434.445210] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  434.462212] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
><7>[  434.462222] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  434.462225] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  434.462228] [drm:intel_ddi_calculate_wrpll], WRPLL: 27000KHz refresh rate with p=30, n2=21 r2=14
><7>[  434.462252] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  434.462254] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  434.462256] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  434.462258] [drm:drm_mode_debug_printmodeline], Modeline 91:"1440x480i" 60 27000 1440 1478 1602 1716 480 488 494 525 0x40 0x101a
><7>[  434.464293] [drm:ironlake_update_plane], Writing base 08C78000 00000000 0 0 5760
><7>[  434.516178] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  434.516184] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 4, cursor: 6
><7>[  434.516189] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:91:1440x480i]
><7>[  434.516192] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  434.516195] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  434.516197] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  434.516199] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  434.516202] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  434.516204] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  434.568163] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  434.568167] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  434.568170] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  434.568172] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  434.568174] [drm:haswell_write_eld], ELD on pipe A
><7>[  434.568190] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 4, cursor: 6
><7>[  434.620152] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  434.672129] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  434.688952] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  434.690125] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  434.690131] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  434.690133] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  434.690136] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  434.690138] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  434.690140] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  434.690142] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  439.743995] [drm:drm_mode_addfb], [FB:91]
><7>[  439.744062] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  439.744071] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  439.744074] [drm:intel_crtc_set_config], [CRTC:3] [FB:91] #connectors=1 (x y) (0 0)
><7>[  439.744078] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  439.744081] [drm:drm_mode_debug_printmodeline], Modeline 91:"1440x480i" 60 27000 1440 1478 1602 1716 480 488 494 525 0x40 0x101a
><7>[  439.744085] [drm:drm_mode_debug_printmodeline], Modeline 92:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
><7>[  439.744090] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  439.744093] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  439.744095] [drm:drm_mode_debug_printmodeline], Modeline 92:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
><7>[  439.744100] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  439.744104] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  439.758859] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  439.777253] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 4, cursor: 6
><7>[  439.777264] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  439.777267] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><6>[  439.777270] [drm] WRPLL: using settings for 47000KHz on 46970KHz mode
><7>[  439.777272] [drm:intel_ddi_calculate_wrpll], WRPLL: 46970KHz refresh rate with p=20, n2=40 r2=23
><7>[  439.777295] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  439.777297] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  439.777300] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  439.777302] [drm:drm_mode_debug_printmodeline], Modeline 92:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
><7>[  439.779093] [drm:ironlake_update_plane], Writing base 08F1B000 00000000 0 0 4096
><7>[  439.830258] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  439.830264] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
><7>[  439.830270] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:92:1024x576]
><7>[  439.830272] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  439.830275] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  439.830277] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  439.830280] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  439.830282] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  439.830284] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  439.882242] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  439.882246] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  439.882249] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  439.882251] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  439.882254] [drm:haswell_write_eld], ELD on pipe A
><7>[  439.882271] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
><7>[  439.934221] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  439.986204] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  440.002953] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  440.004203] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  440.004209] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  440.004212] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  440.004214] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  440.004216] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  440.004218] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  440.004220] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  445.057888] [drm:drm_mode_addfb], [FB:92]
><7>[  445.057953] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  445.057962] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  445.057965] [drm:intel_crtc_set_config], [CRTC:3] [FB:92] #connectors=1 (x y) (0 0)
><7>[  445.057969] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  445.057972] [drm:drm_mode_debug_printmodeline], Modeline 92:"1024x576" 60 46970 1024 1064 1168 1312 576 577 580 597 0x0 0x6
><7>[  445.057976] [drm:drm_mode_debug_printmodeline], Modeline 93:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
><7>[  445.057981] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  445.057983] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  445.057986] [drm:drm_mode_debug_printmodeline], Modeline 93:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
><7>[  445.057991] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  445.057996] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  445.072077] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  445.089369] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 5, cursor: 6
><7>[  445.089379] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  445.089382] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  445.089385] [drm:intel_ddi_calculate_wrpll], WRPLL: 50000KHz refresh rate with p=18, n2=25 r2=15
><7>[  445.089409] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  445.089411] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  445.089413] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  445.089415] [drm:drm_mode_debug_printmodeline], Modeline 93:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
><7>[  445.090985] [drm:ironlake_update_plane], Writing base 0915B000 00000000 0 0 3200
><7>[  445.142331] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  445.142336] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 33, cursor: 6
><7>[  445.142342] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:93:800x600]
><7>[  445.142345] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  445.142347] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  445.142349] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  445.142352] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  445.142355] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  445.142357] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  445.194316] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  445.194319] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  445.194323] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  445.194325] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  445.194327] [drm:haswell_write_eld], ELD on pipe A
><7>[  445.194344] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 33, cursor: 6
><7>[  445.246300] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  445.298283] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  445.312254] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  445.312276] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  445.312281] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  445.312284] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  445.312286] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  445.312288] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  445.312291] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  445.312293] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  450.366045] [drm:drm_mode_addfb], [FB:93]
><7>[  450.366113] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  450.366122] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  450.366125] [drm:intel_crtc_set_config], [CRTC:3] [FB:93] #connectors=1 (x y) (0 0)
><7>[  450.366129] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  450.366132] [drm:drm_mode_debug_printmodeline], Modeline 93:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
><7>[  450.366136] [drm:drm_mode_debug_printmodeline], Modeline 94:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
><7>[  450.366142] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  450.366144] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  450.366147] [drm:drm_mode_debug_printmodeline], Modeline 94:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
><7>[  450.366151] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  450.366156] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  450.366694] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  450.381401] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 33, cursor: 6
><7>[  450.381412] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  450.381415] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  450.381418] [drm:intel_ddi_calculate_wrpll], WRPLL: 49500KHz refresh rate with p=16, n2=22 r2=15
><7>[  450.381441] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  450.381443] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  450.381445] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  450.381447] [drm:drm_mode_debug_printmodeline], Modeline 94:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
><7>[  450.382833] [drm:ironlake_update_plane], Writing base 09330000 00000000 0 0 3200
><7>[  450.434418] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  450.434424] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 33, cursor: 6
><7>[  450.434430] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:94:800x600]
><7>[  450.434432] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  450.434435] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  450.434436] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  450.434439] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  450.434442] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  450.434444] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  450.486399] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  450.486403] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  450.486406] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  450.486408] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  450.486411] [drm:haswell_write_eld], ELD on pipe A
><7>[  450.486428] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 33, cursor: 6
><7>[  450.538384] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  450.590366] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  450.603816] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  450.604368] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  450.604373] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  450.604376] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  450.604378] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  450.604381] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  450.604383] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  450.604385] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  455.658269] [drm:drm_mode_addfb], [FB:94]
><7>[  455.658335] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  455.658344] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  455.658347] [drm:intel_crtc_set_config], [CRTC:3] [FB:94] #connectors=1 (x y) (0 0)
><7>[  455.658351] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  455.658354] [drm:drm_mode_debug_printmodeline], Modeline 94:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
><7>[  455.658358] [drm:drm_mode_debug_printmodeline], Modeline 95:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
><7>[  455.658362] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  455.658365] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  455.658367] [drm:drm_mode_debug_printmodeline], Modeline 95:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
><7>[  455.658372] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  455.658376] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  455.668653] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  455.683494] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 33, cursor: 6
><7>[  455.683505] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  455.683508] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  455.683511] [drm:intel_ddi_calculate_wrpll], WRPLL: 40000KHz refresh rate with p=24, n2=32 r2=18
><7>[  455.683534] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  455.683537] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  455.683539] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  455.683541] [drm:drm_mode_debug_printmodeline], Modeline 95:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
><7>[  455.684971] [drm:ironlake_update_plane], Writing base 09505000 00000000 0 0 3200
><7>[  455.736499] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  455.736505] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 32, cursor: 6
><7>[  455.736511] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:95:800x600]
><7>[  455.736514] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  455.736516] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  455.736518] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  455.736521] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  455.736523] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  455.736525] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  455.788482] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  455.788486] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  455.788489] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  455.788491] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  455.788494] [drm:haswell_write_eld], ELD on pipe A
><7>[  455.788511] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 32, cursor: 6
><7>[  455.840467] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  455.892446] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  455.909139] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  455.910445] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  455.910450] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  455.910453] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  455.910455] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  455.910457] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  455.910460] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  455.910462] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  460.964288] [drm:drm_mode_addfb], [FB:95]
><7>[  460.964352] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  460.964361] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  460.964364] [drm:intel_crtc_set_config], [CRTC:3] [FB:95] #connectors=1 (x y) (0 0)
><7>[  460.964369] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  460.964371] [drm:drm_mode_debug_printmodeline], Modeline 95:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
><7>[  460.964375] [drm:drm_mode_debug_printmodeline], Modeline 96:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
><7>[  460.964380] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  460.964383] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  460.964385] [drm:drm_mode_debug_printmodeline], Modeline 96:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
><7>[  460.964389] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  460.964394] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  460.980505] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  460.997607] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 32, cursor: 6
><7>[  460.997617] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  460.997620] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  460.997623] [drm:intel_ddi_calculate_wrpll], WRPLL: 36000KHz refresh rate with p=26, n2=26 r2=15
><7>[  460.997647] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  460.997649] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  460.997651] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  460.997653] [drm:drm_mode_debug_printmodeline], Modeline 96:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
><7>[  460.999225] [drm:ironlake_update_plane], Writing base 096DA000 00000000 0 0 3200
><7>[  461.050575] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  461.050580] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 32, cursor: 6
><7>[  461.050586] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:96:800x600]
><7>[  461.050589] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  461.050591] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  461.050593] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  461.050596] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  461.050599] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  461.050601] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  461.102559] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  461.102563] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  461.102566] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  461.102568] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  461.102571] [drm:haswell_write_eld], ELD on pipe A
><7>[  461.102588] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 32, cursor: 6
><7>[  461.154541] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  461.206530] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  461.224420] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  461.224460] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  461.224465] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  461.224468] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  461.224470] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  461.224473] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  461.224475] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  461.224477] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  466.269499] [drm:drm_mode_addfb], [FB:96]
><7>[  466.269567] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  466.269576] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  466.269579] [drm:intel_crtc_set_config], [CRTC:3] [FB:96] #connectors=1 (x y) (0 0)
><7>[  466.269584] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  466.269586] [drm:drm_mode_debug_printmodeline], Modeline 96:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
><7>[  466.269609] [drm:drm_mode_debug_printmodeline], Modeline 97:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
><7>[  466.269614] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  466.269618] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  466.269623] [drm:drm_mode_debug_printmodeline], Modeline 97:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
><7>[  466.269630] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  466.269636] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  466.271470] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  466.289692] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 32, cursor: 6
><7>[  466.289703] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  466.289706] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  466.289708] [drm:intel_ddi_calculate_wrpll], WRPLL: 27000KHz refresh rate with p=30, n2=21 r2=14
><7>[  466.289732] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  466.289734] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  466.289737] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  466.289739] [drm:drm_mode_debug_printmodeline], Modeline 97:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
><7>[  466.291095] [drm:ironlake_update_plane], Writing base 098AF000 00000000 0 0 2880
><7>[  466.342661] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  466.342667] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 42, cursor: 6
><7>[  466.342672] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:97:720x576]
><7>[  466.342675] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  466.342677] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  466.342679] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  466.342682] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  466.342685] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  466.342687] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  466.394647] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  466.394651] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  466.394654] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  466.394656] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  466.394658] [drm:haswell_write_eld], ELD on pipe A
><7>[  466.394674] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 42, cursor: 6
><7>[  466.446629] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  466.498609] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  466.518676] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  466.520606] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  466.520612] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  466.520614] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  466.520617] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  466.520619] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  466.520621] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  466.520623] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  471.563665] [drm:drm_mode_addfb], [FB:97]
><7>[  471.563758] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  471.563767] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  471.563771] [drm:intel_crtc_set_config], [CRTC:3] [FB:97] #connectors=1 (x y) (0 0)
><7>[  471.563775] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  471.563778] [drm:drm_mode_debug_printmodeline], Modeline 97:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
><7>[  471.563782] [drm:drm_mode_debug_printmodeline], Modeline 98:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
><7>[  471.563787] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  471.563789] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  471.563791] [drm:drm_mode_debug_printmodeline], Modeline 98:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
><7>[  471.563796] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  471.563800] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  471.576898] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  471.597739] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 42, cursor: 6
><7>[  471.597750] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  471.597753] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><6>[  471.597756] [drm] WRPLL: using settings for 34000KHz on 33750KHz mode
><7>[  471.597758] [drm:intel_ddi_calculate_wrpll], WRPLL: 33750KHz refresh rate with p=28, n2=30 r2=17
><7>[  471.597781] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  471.597783] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  471.597785] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  471.597787] [drm:drm_mode_debug_printmodeline], Modeline 98:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
><7>[  471.598978] [drm:ironlake_update_plane], Writing base 09A44000 00000000 0 0 3392
><7>[  471.650740] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  471.650746] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 26, cursor: 6
><7>[  471.650752] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:98:848x480]
><7>[  471.650754] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  471.650757] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  471.650759] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  471.650761] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  471.650764] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  471.650766] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  471.702722] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  471.702726] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  471.702729] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  471.702732] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  471.702734] [drm:haswell_write_eld], ELD on pipe A
><7>[  471.702751] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 26, cursor: 6
><7>[  471.754708] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  471.806687] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  471.823324] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  471.824649] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  471.824654] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  471.824657] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  471.824659] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  471.824661] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  471.824664] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  471.824666] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  476.864593] [drm:drm_mode_addfb], [FB:98]
><7>[  476.864659] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  476.864668] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  476.864671] [drm:intel_crtc_set_config], [CRTC:3] [FB:98] #connectors=1 (x y) (0 0)
><7>[  476.864675] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  476.864678] [drm:drm_mode_debug_printmodeline], Modeline 98:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
><7>[  476.864682] [drm:drm_mode_debug_printmodeline], Modeline 99:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
><7>[  476.864687] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  476.864690] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  476.864692] [drm:drm_mode_debug_printmodeline], Modeline 99:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
><7>[  476.864696] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  476.864701] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  476.878969] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  476.895858] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 26, cursor: 6
><7>[  476.895868] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  476.895871] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  476.895874] [drm:intel_ddi_calculate_wrpll], WRPLL: 27000KHz refresh rate with p=30, n2=21 r2=14
><7>[  476.895898] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  476.895900] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  476.895902] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  476.895904] [drm:drm_mode_debug_printmodeline], Modeline 99:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
><7>[  476.896970] [drm:ironlake_update_plane], Writing base 09BD2000 00000000 0 0 2880
><7>[  476.948822] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  476.948828] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 42, cursor: 6
><7>[  476.948834] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:99:720x480]
><7>[  476.948837] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  476.948839] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  476.948841] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  476.948844] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  476.948847] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  476.948849] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  477.000806] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  477.000810] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  477.000814] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  477.000816] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  477.000820] [drm:haswell_write_eld], ELD on pipe A
><7>[  477.000833] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 42, cursor: 6
><7>[  477.052790] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  477.104771] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  477.121552] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  477.122741] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  477.122746] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  477.122749] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  477.122751] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  477.122753] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  477.122755] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  477.122757] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  482.160119] [drm:drm_mode_addfb], [FB:99]
><7>[  482.160182] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  482.160191] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  482.160193] [drm:intel_crtc_set_config], [CRTC:3] [FB:99] #connectors=1 (x y) (0 0)
><7>[  482.160198] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  482.160201] [drm:drm_mode_debug_printmodeline], Modeline 99:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
><7>[  482.160205] [drm:drm_mode_debug_printmodeline], Modeline 100:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
><7>[  482.160209] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  482.160211] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  482.160213] [drm:drm_mode_debug_printmodeline], Modeline 100:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
><7>[  482.160217] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  482.160221] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  482.174799] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  482.191941] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 42, cursor: 6
><7>[  482.191952] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  482.191954] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  482.191957] [drm:intel_ddi_calculate_wrpll], WRPLL: 31500KHz refresh rate with p=30, n2=28 r2=16
><7>[  482.191981] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  482.191983] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  482.191985] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  482.191987] [drm:drm_mode_debug_printmodeline], Modeline 100:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
><7>[  482.192858] [drm:ironlake_update_plane], Writing base 09D24000 00000000 0 0 2560
><7>[  482.244907] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  482.244913] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 52, cursor: 6
><7>[  482.244919] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:100:640x480]
><7>[  482.244922] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  482.244924] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  482.244926] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  482.244929] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  482.244932] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  482.244934] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  482.296890] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  482.296894] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  482.296897] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  482.296899] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  482.296902] [drm:haswell_write_eld], ELD on pipe A
><7>[  482.296919] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 52, cursor: 6
><7>[  482.348873] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  482.400853] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  482.414704] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  482.414813] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  482.414818] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  482.414821] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  482.414824] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  482.414826] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  482.414828] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  482.414830] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  487.452190] [drm:drm_mode_addfb], [FB:100]
><7>[  487.452255] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  487.452264] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  487.452267] [drm:intel_crtc_set_config], [CRTC:3] [FB:100] #connectors=1 (x y) (0 0)
><7>[  487.452271] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  487.452273] [drm:drm_mode_debug_printmodeline], Modeline 100:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
><7>[  487.452277] [drm:drm_mode_debug_printmodeline], Modeline 101:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
><7>[  487.452281] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  487.452284] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  487.452285] [drm:drm_mode_debug_printmodeline], Modeline 101:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
><7>[  487.452289] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  487.452293] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  487.453449] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  487.468030] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 52, cursor: 6
><7>[  487.468041] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  487.468044] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  487.468046] [drm:intel_ddi_calculate_wrpll], WRPLL: 31500KHz refresh rate with p=30, n2=28 r2=16
><7>[  487.468070] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  487.468072] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  487.468074] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  487.468076] [drm:drm_mode_debug_printmodeline], Modeline 101:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
><7>[  487.468992] [drm:ironlake_update_plane], Writing base 09E50000 00000000 0 0 2560
><7>[  487.520997] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  487.521002] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 52, cursor: 6
><7>[  487.521008] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:101:640x480]
><7>[  487.521011] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  487.521013] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  487.521015] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  487.521018] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  487.521021] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  487.521023] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  487.572979] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  487.572983] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  487.572987] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  487.572989] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  487.572991] [drm:haswell_write_eld], ELD on pipe A
><7>[  487.573009] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 52, cursor: 6
><7>[  487.624933] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  487.676944] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  487.690394] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  487.690911] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  487.690917] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  487.690920] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  487.690922] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  487.690924] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  487.690927] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  487.690929] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  492.728546] [drm:drm_mode_addfb], [FB:101]
><7>[  492.728616] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  492.728624] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  492.728627] [drm:intel_crtc_set_config], [CRTC:3] [FB:101] #connectors=1 (x y) (0 0)
><7>[  492.728632] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  492.728634] [drm:drm_mode_debug_printmodeline], Modeline 101:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
><7>[  492.728638] [drm:drm_mode_debug_printmodeline], Modeline 102:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
><7>[  492.728643] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  492.728646] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  492.728648] [drm:drm_mode_debug_printmodeline], Modeline 102:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
><7>[  492.728652] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  492.728657] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  492.741903] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  492.756117] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 52, cursor: 6
><7>[  492.756128] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  492.756131] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  492.756133] [drm:intel_ddi_calculate_wrpll], WRPLL: 25200KHz refresh rate with p=30, n2=21 r2=15
><7>[  492.756157] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  492.756159] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  492.756161] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  492.756163] [drm:drm_mode_debug_printmodeline], Modeline 102:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
><7>[  492.757070] [drm:ironlake_update_plane], Writing base 09F7C000 00000000 0 0 2560
><7>[  492.809085] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  492.809091] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 52, cursor: 6
><7>[  492.809097] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:102:640x480]
><7>[  492.809100] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  492.809102] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  492.809104] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  492.809107] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  492.809110] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  492.809112] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  492.861067] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  492.861071] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  492.861074] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  492.861076] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  492.861079] [drm:haswell_write_eld], ELD on pipe A
><7>[  492.861096] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 52, cursor: 6
><7>[  492.913049] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  492.965029] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  492.981808] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  492.982993] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  492.982998] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  492.983001] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  492.983003] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  492.983005] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  492.983008] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  492.983010] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  498.020598] [drm:drm_mode_addfb], [FB:102]
><7>[  498.020666] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  498.020675] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  498.020678] [drm:intel_crtc_set_config], [CRTC:3] [FB:102] #connectors=1 (x y) (0 0)
><7>[  498.020683] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  498.020685] [drm:drm_mode_debug_printmodeline], Modeline 102:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
><7>[  498.020689] [drm:drm_mode_debug_printmodeline], Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
><7>[  498.020694] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  498.020697] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  498.020699] [drm:drm_mode_debug_printmodeline], Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
><7>[  498.020704] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  498.020708] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  498.029987] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  498.048202] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 52, cursor: 6
><7>[  498.048213] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  498.048216] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  498.048218] [drm:intel_ddi_calculate_wrpll], WRPLL: 25175KHz refresh rate with p=26, n2=40 r2=33
><7>[  498.048242] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  498.048244] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  498.048246] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  498.048248] [drm:drm_mode_debug_printmodeline], Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
><7>[  498.049253] [drm:ironlake_update_plane], Writing base 0A0A8000 00000000 0 0 2560
><7>[  498.101169] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  498.101175] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 52, cursor: 6
><7>[  498.101180] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:103:640x480]
><7>[  498.101183] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  498.101186] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  498.101188] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  498.101190] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  498.101193] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  498.101195] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  498.153152] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  498.153156] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  498.153159] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  498.153161] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  498.153164] [drm:haswell_write_eld], ELD on pipe A
><7>[  498.153179] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 52, cursor: 6
><7>[  498.205132] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  498.257113] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  498.273908] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  498.275077] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  498.275082] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  498.275085] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  498.275087] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  498.275089] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  498.275092] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  498.275094] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  503.304603] [drm:drm_mode_addfb], [FB:103]
><7>[  503.304668] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  503.304677] [drm:drm_mode_setcrtc], [CONNECTOR:17:HDMI-A-2]
><7>[  503.304680] [drm:intel_crtc_set_config], [CRTC:3] [FB:103] #connectors=1 (x y) (0 0)
><7>[  503.304684] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  503.304687] [drm:drm_mode_debug_printmodeline], Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
><7>[  503.304691] [drm:drm_mode_debug_printmodeline], Modeline 104:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
><7>[  503.304695] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  503.304698] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  503.304700] [drm:drm_mode_debug_printmodeline], Modeline 104:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
><7>[  503.304705] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  503.304709] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  503.310457] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  503.328293] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 52, cursor: 6
><7>[  503.328304] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  503.328307] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  503.328309] [drm:intel_ddi_calculate_wrpll], WRPLL: 28320KHz refresh rate with p=26, n2=30 r2=22
><7>[  503.328333] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  503.328335] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  503.328337] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  503.328339] [drm:drm_mode_debug_printmodeline], Modeline 104:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
><7>[  503.329172] [drm:ironlake_update_plane], Writing base 0A1D4000 00000000 0 0 2880
><7>[  503.381258] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  503.381264] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 42, cursor: 6
><7>[  503.381270] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:104:720x400]
><7>[  503.381273] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  503.381275] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  503.381277] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  503.381280] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  503.381283] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  503.381285] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  503.433242] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  503.433246] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  503.433249] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  503.433251] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  503.433254] [drm:haswell_write_eld], ELD on pipe A
><7>[  503.433271] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 42, cursor: 6
><7>[  503.485222] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  503.537203] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  503.551586] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  503.553168] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  503.553173] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  503.553176] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  503.553178] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  503.553180] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  503.553182] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  503.553184] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  508.551550] [drm:intel_crtc_set_config], [CRTC:3] [NOFB]
><7>[  508.551558] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [NOCRTC]
><7>[  508.551561] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
><7>[  508.551563] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
><7>[  508.551566] [drm:intel_set_mode], set mode pipe masks: modeset: 0, prepare: 0, disable: 1
><7>[  508.557925] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  508.573394] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 42, cursor: 6
><7>[  508.573402] [drm:intel_ddi_put_crtc_pll], Disabling WRPLL 1
><7>[  508.573409] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  508.573412] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  508.573415] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  508.573417] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  508.573419] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  508.573421] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  508.573433] [drm:drm_mode_setcrtc], [CRTC:3]
><7>[  508.573435] [drm:drm_mode_setcrtc], Count connectors is 1 but no mode or fb set
><7>[  508.573444] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
><7>[  508.573448] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:DP-2]
><7>[  508.576057] [drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x7145003f
><7>[  508.579794] [drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x7145003f
><7>[  508.583792] [drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x7145003f
><7>[  508.585284] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:DP-2] disconnected
><7>[  508.585294] [drm:drm_mode_getconnector], [CONNECTOR:18:?]
><7>[  508.585300] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:DP-2]
><7>[  508.587818] [drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x7145003f
><7>[  508.591803] [drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x7145003f
><7>[  508.595789] [drm:intel_dp_aux_ch], dp_aux_ch timeout status 0x7145003f
><7>[  508.597279] [drm:drm_helper_probe_single_connector_modes], [CONNECTOR:18:DP-2] disconnected
><7>[  508.602441] [drm:intel_crtc_set_config], [CRTC:3] [FB:21] #connectors=1 (x y) (0 0)
><7>[  508.602446] [drm:intel_set_config_compute_mode_changes], crtc has no fb, full mode set
><7>[  508.602448] [drm:intel_set_config_compute_mode_changes], modes are different, full mode set
><7>[  508.602451] [drm:drm_mode_debug_printmodeline], Modeline 104:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
><7>[  508.602454] [drm:drm_mode_debug_printmodeline], Modeline 20:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
><7>[  508.602458] [drm:intel_modeset_stage_output_state], encoder changed, full mode switch
><7>[  508.602460] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  508.602463] [drm:intel_modeset_stage_output_state], crtc changed, full mode switch
><7>[  508.602465] [drm:intel_crtc_set_config], attempting to set mode from userspace
><7>[  508.602466] [drm:drm_mode_debug_printmodeline], Modeline 20:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
><7>[  508.602470] [drm:intel_set_mode], set mode pipe masks: modeset: 1, prepare: 1, disable: 0
><7>[  508.602475] [drm:intel_modeset_adjusted_mode], [CRTC:3]
><7>[  508.602481] [drm:intel_ddi_pll_mode_set], Using WRPLL 1 on pipe A
><7>[  508.602484] [drm:intel_ddi_calculate_wrpll], WRPLL: 148500KHz refresh rate with p=6, n2=33 r2=20
><7>[  508.602508] [drm:intel_choose_pipe_bpp_dither], forcing bpc to 8 for HDMI
><7>[  508.602509] [drm:intel_choose_pipe_bpp_dither], setting pipe bpc to 8 (max display bpc 8)
><7>[  508.602512] [drm:haswell_crtc_mode_set], Mode for pipe 0:
><7>[  508.602513] [drm:drm_mode_debug_printmodeline], Modeline 20:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
><7>[  508.602525] [drm:ironlake_update_plane], Writing base 00074000 00000000 0 0 7680
><7>[  508.602530] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 9, cursor: 6
><7>[  508.602535] [drm:intel_crtc_mode_set], [ENCODER:16:TMDS-16] set [MODE:20:1920x1080]
><7>[  508.602538] [drm:intel_ddi_mode_set], Preparing DDI mode for Haswell on port C, pipe A
><7>[  508.602540] [drm:intel_ddi_mode_set], HDMI audio on pipe A on DDI
><7>[  508.602542] [drm:intel_ddi_mode_set], HDMI audio: write eld information
><7>[  508.602545] [drm:intel_write_eld], ELD on [CONNECTOR:17:HDMI-A-2], [ENCODER:16:TMDS-16]
><7>[  508.602548] [drm:haswell_write_eld], HDMI: Haswell Audio initialize....
><7>[  508.602549] [drm:haswell_write_eld], HDMI audio: enable codec
><7>[  508.654281] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  508.654285] [drm:haswell_write_eld], HDMI audio: pin eld vld status=0x       5
><7>[  508.654288] [drm:haswell_write_eld], HDMI audio: eld vld status=0x       5
><7>[  508.654291] [drm:haswell_write_eld], HDMI audio: audio conf: 0x  70fa60
><7>[  508.654293] [drm:haswell_write_eld], ELD on pipe A
><7>[  508.654308] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 9, cursor: 6
><7>[  508.706265] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  508.758247] [drm:ironlake_wait_for_vblank], vblank wait timed out
><7>[  508.774951] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  508.776245] [drm:intel_connector_check_state], [CONNECTOR:17:HDMI-A-2]
><7>[  508.776250] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  508.776253] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  508.776255] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  508.776258] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  508.776260] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  508.776262] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  508.776265] [drm:intel_crtc_set_config], [CRTC:5] [NOFB]
><7>[  508.776268] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  508.776271] [drm:intel_crtc_set_config], [CRTC:7] [NOFB]
><7>[  508.776274] [drm:intel_modeset_stage_output_state], [CONNECTOR:17:HDMI-A-2] to [CRTC:3]
><7>[  508.776280] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 9, cursor: 6
><7>[  508.776286] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 9, cursor: 6
><7>[  508.776291] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 9, cursor: 6
><7>[  601.125025] [drm:intel_prepare_page_flip], preparing flip with no unpin work?
><7>[  601.141884] [drm:sandybridge_update_wm], FIFO watermarks For pipe A - plane 9, cursor: 6
><7>[  601.141891] [drm:intel_modeset_check_state], [ENCODER:10:DAC-10]
><7>[  601.141893] [drm:intel_modeset_check_state], [ENCODER:11:TMDS-11]
><7>[  601.141895] [drm:intel_modeset_check_state], [ENCODER:16:TMDS-16]
><7>[  601.141896] [drm:intel_modeset_check_state], [CRTC:3]
><7>[  601.141898] [drm:intel_modeset_check_state], [CRTC:5]
><7>[  601.141899] [drm:intel_modeset_check_state], [CRTC:7]
><7>[  601.142173] [drm:asle_set_backlight], bclp = 0x800000ff
><7>[  601.142348] [drm:asle_set_backlight], bclp = 0x800000ff
><7>[  601.142498] [drm:asle_set_backlight], bclp = 0x800000ff
><7>[  601.142646] [drm:asle_set_backlight], bclp = 0x800000ff
><7>[  601.142801] [drm:asle_set_backlight], bclp = 0x800000ff
><7>[  601.142949] [drm:asle_set_backlight], bclp = 0x800000ff
><7>[  601.143096] [drm:asle_set_backlight], bclp = 0x800000ff
><7>[  601.143243] [drm:asle_set_backlight], bclp = 0x800000ff
><7>[  601.143389] [drm:asle_set_backlight], bclp = 0x800000ff
><7>[  601.143535] [drm:asle_set_backlight], bclp = 0x800000ff

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Attachments on bug 58497: 71785 | 79219 | 79221

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