Attachment 78408 Details for Bug 63702 – Possible fix

[patch] Possible fix

0001-radeonsi-cleanup-disabling-tiling-for-UVD-v2.patch (text/plain), 2.60 KB, created by Christian König on 2013-04-24 08:11:12 UTC

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Creator: Christian König

Created: 2013-04-24 08:11:12 UTC

Size: 2.60 KB

patch

obsolete

>From 67a6a1a24ced419f2f27f9c4f6c2eb4c1703d581 Mon Sep 17 00:00:00 2001
>From: =?UTF-8?q?Christian=20K=C3=B6nig?= <christian.koenig@amd.com>
>Date: Sat, 20 Apr 2013 13:19:33 +0200
>Subject: [PATCH] radeonsi: cleanup disabling tiling for UVD v2
>MIME-Version: 1.0
>Content-Type: text/plain; charset=UTF-8
>Content-Transfer-Encoding: 8bit
>To: mesa-dev@lists.freedesktop.org
>
>Should fix: https://bugs.freedesktop.org/show_bug.cgi?id=63702
>
>v2: add a comment that this is just a workaround
>
>Signed-off-by: Christian KÃ¶nig <christian.koenig@amd.com>
>---
> src/gallium/drivers/radeonsi/radeonsi_uvd.c |    7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
>diff --git a/src/gallium/drivers/radeonsi/radeonsi_uvd.c b/src/gallium/drivers/radeonsi/radeonsi_uvd.c
>index d49c088..311bae7 100644
>--- a/src/gallium/drivers/radeonsi/radeonsi_uvd.c
>+++ b/src/gallium/drivers/radeonsi/radeonsi_uvd.c
>@@ -76,6 +76,8 @@ struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe
> 	template.height = align(tmpl->height / depth, VL_MACROBLOCK_HEIGHT);
> 
> 	vl_vide_buffer_template(&templ, &template, resource_formats[0], depth, PIPE_USAGE_STATIC, 0);
>+	/* TODO: Setting the transfer flag is only a workaround till we get tilling working */
>+	templ.flags = R600_RESOURCE_FLAG_TRANSFER;
> 	resources[0] = (struct r600_resource_texture *)
> 		pipe->screen->resource_create(pipe->screen, &templ);
> 	if (!resources[0])
>@@ -83,6 +85,7 @@ struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe
> 
> 	if (resource_formats[1] != PIPE_FORMAT_NONE) {
> 		vl_vide_buffer_template(&templ, &template, resource_formats[1], depth, PIPE_USAGE_STATIC, 1);
>+		templ.flags = R600_RESOURCE_FLAG_TRANSFER;
> 		resources[1] = (struct r600_resource_texture *)
> 			pipe->screen->resource_create(pipe->screen, &templ);
> 		if (!resources[1])
>@@ -91,6 +94,7 @@ struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe
> 
> 	if (resource_formats[2] != PIPE_FORMAT_NONE) {
> 		vl_vide_buffer_template(&templ, &template, resource_formats[2], depth, PIPE_USAGE_STATIC, 2);
>+		templ.flags = R600_RESOURCE_FLAG_TRANSFER;
> 		resources[2] = (struct r600_resource_texture *)
> 			pipe->screen->resource_create(pipe->screen, &templ);
> 		if (!resources[2])
>@@ -114,9 +118,6 @@ struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe
> 		/* recreate the CS handle */
> 		resources[i]->resource.cs_buf = ctx->ws->buffer_get_cs_handle(
> 			resources[i]->resource.buf);
>-
>-		/* TODO: tiling used to work with UVD on SI */
>-		resources[i]->surface.level[0].mode = RADEON_SURF_MODE_LINEAR_ALIGNED;
> 	}
> 
> 	template.height *= depth;
>-- 
>1.7.9.5
>

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