Attachment 98659 Details for Bug 78418 – dmesg

dmesg

kms_fbc_crc.dmesg (text/plain), 125.35 KB, created by Guo Jinxian on 2014-05-08 03:42:13 UTC

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Creator: Guo Jinxian

Created: 2014-05-08 03:42:13 UTC

Size: 125.35 KB

patch

obsolete

>[  368.969461] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  368.986909] [drm:drm_mode_setcrtc] [CRTC:5]
>[  368.986913] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  368.986916] [drm:intel_crtc_set_config] [CRTC:5] [FB:43] #connectors=1 (x y) (0 0)
>[  368.986919] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=0, fb_changed=1
>[  368.986922] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  368.996321] [drm:ironlake_update_primary_plane] Writing base 0107C000 00000000 0 0 8192
>[  369.003896] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  369.003898] [drm:intel_update_fbc] disabling active FBC for update
>[  369.003900] [drm:ironlake_disable_fbc] disabled FBC
>[  369.003903] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  369.053866] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  369.319177] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  369.335847] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  369.385791] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  369.402463] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  369.719438] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  369.752192] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  369.769345] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  369.769351] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  369.769355] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  369.769358] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1]
>[  369.769361] [drm:intel_dp_detect] [CONNECTOR:14:eDP-1]
>[  369.769525] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  369.769683] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  369.769692] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  369.769695] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1] probed modes :
>[  369.769699] [drm:drm_mode_debug_printmodeline] Modeline 15:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  369.769703] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  369.769710] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  369.769714] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  369.769735] [drm:pipe_crc_set_source] collecting CRCs for pipe B, pf
>[  369.769739] [drm:pipe_crc_set_source] stopping CRCs for pipe B
>[  369.821280] ------------[ cut here ]------------
>[  369.821298] WARNING: CPU: 0 PID: 4293 at drivers/gpu/drm/i915/intel_display.c:768 display_crc_ctl_write+0x575/0x772 [i915]()
>[  369.821300] vblank wait timed out
>[  369.821301] Modules linked in: ip6table_filter ip6_tables ipv6 iptable_filter ip_tables ebtable_nat ebtables x_tables dm_mod snd_hda_codec_hdmi iTCO_wdt iTCO_vendor_support ppdev pcspkr i2c_i801 lpc_ich snd_hda_intel mfd_core snd_hda_controller snd_hda_codec snd_hwdep snd_pcm snd_timer snd soundcore battery parport_pc parport ac acpi_cpufreq i915 video button drm_kms_helper drm
>[  369.821328] CPU: 0 PID: 4293 Comm: kms_fbc_crc Tainted: G        W     3.15.0-rc3_drm-intel-next-queued_bf67a6_20140507+ #2386
>[  369.821330]  0000000000000000 0000000000000009 ffffffff817233c0 ffff8801452c7e28
>[  369.821334]  ffffffff8103517a dead000000200200 ffffffffa00711fb ffffffff831d9100
>[  369.821337]  ffff880002ca0000 ffff880149c0f800 0000000000000001 ffff880002ca2d20
>[  369.821340] Call Trace:
>[  369.821346]  [<ffffffff817233c0>] ? dump_stack+0x41/0x51
>[  369.821351]  [<ffffffff8103517a>] ? warn_slowpath_common+0x73/0x8b
>[  369.821363]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  369.821366]  [<ffffffff8103522a>] ? warn_slowpath_fmt+0x45/0x4a
>[  369.821382]  [<ffffffffa0095dc8>] ? intel_wait_for_vblank+0x77/0x1db [i915]
>[  369.821393]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  369.821398]  [<ffffffff810e0b64>] ? vfs_write+0xba/0x176
>[  369.821401]  [<ffffffff810e0f1c>] ? SyS_write+0x41/0x84
>[  369.821406]  [<ffffffff8172dba2>] ? system_call_fastpath+0x16/0x1b
>[  369.821408] ---[ end trace bf41fd17b08a7348 ]---
>[  369.821421] [drm:drm_mode_addfb2] [FB:45]
>[  369.831504] [drm:drm_mode_addfb2] [FB:46]
>[  369.841510] [drm:drm_mode_setcrtc] [CRTC:8]
>[  369.841515] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  369.841518] [drm:intel_crtc_set_config] [CRTC:8] [FB:46] #connectors=1 (x y) (0 0)
>[  369.841521] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  369.841524] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=1, fb_changed=0
>[  369.841526] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:8]
>[  369.841528] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  369.841530] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  369.841532] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  369.841535] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 1
>[  369.841539] [drm:connected_sink_compute_bpp] [CONNECTOR:14:eDP-1] checking for sink bpp constrains
>[  369.841543] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  369.841550] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  369.841552] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  369.841555] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  369.841558] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe B
>[  369.841559] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  369.841561] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  369.841564] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  369.841567] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  369.841569] [drm:intel_dump_pipe_config] requested mode:
>[  369.841573] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  369.841574] [drm:intel_dump_pipe_config] adjusted mode:
>[  369.841577] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  369.841581] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  369.841582] [drm:intel_dump_pipe_config] port clock: 270000
>[  369.841584] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  369.841587] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  369.841589] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  369.841591] [drm:intel_dump_pipe_config] ips: 0
>[  369.841593] [drm:intel_dump_pipe_config] double wide: 0
>[  369.841599] [drm:ironlake_disable_fbc] disabled FBC
>[  369.869247] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  369.869254] [drm:intel_edp_backlight_off] 
>[  369.887385] [drm:intel_edp_panel_off] Turn eDP power off
>[  370.070103] [drm:wait_panel_off] Wait for panel power off time
>[  370.070107] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  370.125055] [drm:wait_panel_status] Wait complete
>[  370.125063] [drm:intel_update_fbc] no output, disabling
>[  370.134763] [drm:ironlake_update_primary_plane] Writing base 0407C000 00000000 0 0 8192
>[  370.134773] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  370.134776] [drm:intel_crtc_mode_set] [ENCODER:13:TMDS-13] set [MODE:0:1920x1080]
>[  370.134779] [drm:intel_ddi_mode_set] Preparing DDI mode on port A, pipe B
>[  370.134781] [drm:intel_edp_panel_on] Turn eDP power on
>[  370.134784] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  370.324383] usb 1-2: USB disconnect, device number 9
>[  370.670655] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  370.670661] [drm:wait_panel_status] Wait complete
>[  370.670666] [drm:wait_panel_on] Wait for panel power on
>[  370.670670] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  370.879489] [drm:wait_panel_status] Wait complete
>[  370.879494] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  370.879501] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  370.880551] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  370.880992] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  370.881425] [drm:intel_dp_start_link_train] clock recovery OK
>[  370.882168] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  370.882369] [drm:intel_edp_backlight_on] 
>[  370.882375] [drm:intel_panel_enable_backlight] pipe B
>[  370.882381] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  370.882384] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  370.899472] [drm:intel_update_fbc] plane not A, disabling compression
>[  370.899478] [drm:intel_connector_check_state] [CONNECTOR:14:eDP-1]
>[  370.899483] [drm:check_encoder_state] [ENCODER:13:TMDS-13]
>[  370.899486] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  370.899488] [drm:check_encoder_state] [ENCODER:24:TMDS-24]
>[  370.899491] [drm:check_crtc_state] [CRTC:5]
>[  370.899494] [drm:check_crtc_state] [CRTC:8]
>[  370.899502] [drm:check_crtc_state] [CRTC:11]
>[  370.899513] [drm:edp_panel_vdd_off_sync] Turning eDP VDD off
>[  370.899519] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  371.199428] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  371.199435] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  371.199439] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  371.199442] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1]
>[  371.199445] [drm:intel_dp_detect] [CONNECTOR:14:eDP-1]
>[  371.199450] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  371.199457] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  371.199618] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  371.199776] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  371.199786] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  371.199790] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1] probed modes :
>[  371.199794] [drm:drm_mode_debug_printmodeline] Modeline 15:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  371.199798] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  371.199806] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  371.199810] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  371.199834] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  371.199839] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  371.251207] ------------[ cut here ]------------
>[  371.251227] WARNING: CPU: 0 PID: 4293 at drivers/gpu/drm/i915/intel_display.c:768 display_crc_ctl_write+0x575/0x772 [i915]()
>[  371.251228] vblank wait timed out
>[  371.251230] Modules linked in: ip6table_filter ip6_tables ipv6 iptable_filter ip_tables ebtable_nat ebtables x_tables dm_mod snd_hda_codec_hdmi iTCO_wdt iTCO_vendor_support ppdev pcspkr i2c_i801 lpc_ich snd_hda_intel mfd_core snd_hda_controller snd_hda_codec snd_hwdep snd_pcm snd_timer snd soundcore battery parport_pc parport ac acpi_cpufreq i915 video button drm_kms_helper drm
>[  371.251257] CPU: 0 PID: 4293 Comm: kms_fbc_crc Tainted: G        W     3.15.0-rc3_drm-intel-next-queued_bf67a6_20140507+ #2386
>[  371.251259]  0000000000000000 0000000000000009 ffffffff817233c0 ffff8801452c7e28
>[  371.251263]  ffffffff8103517a dead000000200200 ffffffffa00711fb ffffffff831d9100
>[  371.251266]  ffff880002ca0000 ffff880149c0f800 0000000000000000 ffff880002ca2ce8
>[  371.251270] Call Trace:
>[  371.251276]  [<ffffffff817233c0>] ? dump_stack+0x41/0x51
>[  371.251281]  [<ffffffff8103517a>] ? warn_slowpath_common+0x73/0x8b
>[  371.251293]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  371.251296]  [<ffffffff8103522a>] ? warn_slowpath_fmt+0x45/0x4a
>[  371.251312]  [<ffffffffa0095dc8>] ? intel_wait_for_vblank+0x77/0x1db [i915]
>[  371.251323]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  371.251328]  [<ffffffff810e0b64>] ? vfs_write+0xba/0x176
>[  371.251331]  [<ffffffff810e0f1c>] ? SyS_write+0x41/0x84
>[  371.251336]  [<ffffffff8172dba2>] ? system_call_fastpath+0x16/0x1b
>[  371.251338] ---[ end trace bf41fd17b08a7349 ]---
>[  371.251357] [drm:drm_mode_addfb2] [FB:47]
>[  371.261530] [drm:drm_mode_addfb2] [FB:48]
>[  371.271552] [drm:drm_mode_setcrtc] [CRTC:5]
>[  371.271558] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  371.271561] [drm:intel_crtc_set_config] [CRTC:5] [FB:48] #connectors=1 (x y) (0 0)
>[  371.271565] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  371.271567] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  371.271570] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  371.271572] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  371.271574] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  371.271576] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  371.271579] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[  371.271582] [drm:connected_sink_compute_bpp] [CONNECTOR:14:eDP-1] checking for sink bpp constrains
>[  371.271586] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  371.271594] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  371.271596] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  371.271600] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  371.271602] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  371.271604] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  371.271605] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  371.271608] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  371.271611] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  371.271613] [drm:intel_dump_pipe_config] requested mode:
>[  371.271617] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  371.271618] [drm:intel_dump_pipe_config] adjusted mode:
>[  371.271621] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  371.271625] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  371.271626] [drm:intel_dump_pipe_config] port clock: 270000
>[  371.271628] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  371.271631] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  371.271633] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  371.271635] [drm:intel_dump_pipe_config] ips: 1
>[  371.271636] [drm:intel_dump_pipe_config] double wide: 0
>[  371.283186] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  371.283193] [drm:intel_edp_backlight_off] 
>[  371.299325] [drm:intel_edp_panel_off] Turn eDP power off
>[  371.484038] [drm:wait_panel_off] Wait for panel power off time
>[  371.484042] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  371.538993] [drm:wait_panel_status] Wait complete
>[  371.539001] [drm:intel_update_fbc] no output, disabling
>[  371.548708] [drm:ironlake_update_primary_plane] Writing base 0607C000 00000000 0 0 8192
>[  371.548714] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  371.548718] [drm:intel_crtc_mode_set] [ENCODER:13:TMDS-13] set [MODE:0:1920x1080]
>[  371.548720] [drm:intel_ddi_mode_set] Preparing DDI mode on port A, pipe A
>[  371.548723] [drm:intel_edp_panel_on] Turn eDP power on
>[  371.548726] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  371.838784] usb 1-2: new low-speed USB device number 10 using xhci_hcd
>[  372.005976] usb 1-2: New USB device found, idVendor=046d, idProduct=c06a
>[  372.005979] usb 1-2: New USB device strings: Mfr=1, Product=2, SerialNumber=0
>[  372.005982] usb 1-2: Product: USB Optical Mouse
>[  372.005984] usb 1-2: Manufacturer: Logitech
>[  372.006098] usb 1-2: ep 0x81 - rounding interval to 64 microframes, ep desc says 80 microframes
>[  372.008229] input: Logitech USB Optical Mouse as /devices/pci0000:00/0000:00:14.0/usb1/1-2/1-2:1.0/0003:046D:C06A.0008/input/input14
>[  372.008453] hid-generic 0003:046D:C06A.0008: input,hidraw1: USB HID v1.11 Mouse [Logitech USB Optical Mouse] on usb-0000:00:14.0-2/input0
>[  372.084595] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  372.084601] [drm:wait_panel_status] Wait complete
>[  372.084606] [drm:wait_panel_on] Wait for panel power on
>[  372.084610] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  372.293429] [drm:wait_panel_status] Wait complete
>[  372.293437] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  372.293444] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  372.294503] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  372.294945] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  372.295377] [drm:intel_dp_start_link_train] clock recovery OK
>[  372.296121] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  372.296325] [drm:intel_edp_backlight_on] 
>[  372.296331] [drm:intel_panel_enable_backlight] pipe A
>[  372.296337] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  372.296340] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  372.315411] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  372.315418] [drm:intel_connector_check_state] [CONNECTOR:14:eDP-1]
>[  372.315423] [drm:check_encoder_state] [ENCODER:13:TMDS-13]
>[  372.315426] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  372.315428] [drm:check_encoder_state] [ENCODER:24:TMDS-24]
>[  372.315430] [drm:check_crtc_state] [CRTC:5]
>[  372.315439] [drm:check_crtc_state] [CRTC:8]
>[  372.315442] [drm:check_crtc_state] [CRTC:11]
>[  372.365382] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  372.429113] [drm:gen8_irq_handler] *ERROR* Pipe A FIFO underrun
>[  372.629393] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  372.662713] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  372.680147] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[  372.680151] [drm:i915_gem_context_create_ioctl] HW context 2 created
>[  372.680318] [drm:drm_mode_setcrtc] [CRTC:5]
>[  372.680324] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  372.680327] [drm:intel_crtc_set_config] [CRTC:5] [FB:47] #connectors=1 (x y) (0 0)
>[  372.680331] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=0, fb_changed=1
>[  372.680334] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  372.689887] [drm:ironlake_update_primary_plane] Writing base 0507C000 00000000 0 0 8192
>[  372.697125] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  372.697128] [drm:intel_update_fbc] disabling active FBC for update
>[  372.697130] [drm:ironlake_disable_fbc] disabled FBC
>[  372.697132] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  372.747095] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  373.012430] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  373.029101] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  373.079043] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  373.095715] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  373.412670] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  373.445444] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  373.462575] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[  373.462577] [drm:i915_gem_context_destroy_ioctl] HW context 2 destroyed
>[  373.462583] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  373.462589] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  373.462594] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  373.462598] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1]
>[  373.462601] [drm:intel_dp_detect] [CONNECTOR:14:eDP-1]
>[  373.462766] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  373.462925] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  373.462936] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  373.462940] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1] probed modes :
>[  373.462944] [drm:drm_mode_debug_printmodeline] Modeline 15:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  373.462947] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  373.462955] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  373.462959] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  373.462980] [drm:pipe_crc_set_source] collecting CRCs for pipe B, pf
>[  373.462984] [drm:pipe_crc_set_source] stopping CRCs for pipe B
>[  373.514508] ------------[ cut here ]------------
>[  373.514527] WARNING: CPU: 0 PID: 4293 at drivers/gpu/drm/i915/intel_display.c:768 display_crc_ctl_write+0x575/0x772 [i915]()
>[  373.514529] vblank wait timed out
>[  373.514531] Modules linked in: ip6table_filter ip6_tables ipv6 iptable_filter ip_tables ebtable_nat ebtables x_tables dm_mod snd_hda_codec_hdmi iTCO_wdt iTCO_vendor_support ppdev pcspkr i2c_i801 lpc_ich snd_hda_intel mfd_core snd_hda_controller snd_hda_codec snd_hwdep snd_pcm snd_timer snd soundcore battery parport_pc parport ac acpi_cpufreq i915 video button drm_kms_helper drm
>[  373.514557] CPU: 0 PID: 4293 Comm: kms_fbc_crc Tainted: G        W     3.15.0-rc3_drm-intel-next-queued_bf67a6_20140507+ #2386
>[  373.514559]  0000000000000000 0000000000000009 ffffffff817233c0 ffff8801452c7e28
>[  373.514563]  ffffffff8103517a dead000000200200 ffffffffa00711fb ffffffff831d9100
>[  373.514566]  ffff880002ca0000 ffff880149c0f800 0000000000000001 ffff880002ca2d20
>[  373.514570] Call Trace:
>[  373.514577]  [<ffffffff817233c0>] ? dump_stack+0x41/0x51
>[  373.514581]  [<ffffffff8103517a>] ? warn_slowpath_common+0x73/0x8b
>[  373.514592]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  373.514596]  [<ffffffff8103522a>] ? warn_slowpath_fmt+0x45/0x4a
>[  373.514612]  [<ffffffffa0095dc8>] ? intel_wait_for_vblank+0x77/0x1db [i915]
>[  373.514622]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  373.514627]  [<ffffffff810e0b64>] ? vfs_write+0xba/0x176
>[  373.514631]  [<ffffffff810e0f1c>] ? SyS_write+0x41/0x84
>[  373.514636]  [<ffffffff8172dba2>] ? system_call_fastpath+0x16/0x1b
>[  373.514638] ---[ end trace bf41fd17b08a734a ]---
>[  373.514651] [drm:drm_mode_addfb2] [FB:49]
>[  373.524798] [drm:drm_mode_addfb2] [FB:50]
>[  373.534867] [drm:drm_mode_setcrtc] [CRTC:8]
>[  373.534872] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  373.534876] [drm:intel_crtc_set_config] [CRTC:8] [FB:50] #connectors=1 (x y) (0 0)
>[  373.534879] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  373.534882] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=1, fb_changed=0
>[  373.534885] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:8]
>[  373.534886] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  373.534889] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  373.534890] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  373.534894] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 1
>[  373.534897] [drm:connected_sink_compute_bpp] [CONNECTOR:14:eDP-1] checking for sink bpp constrains
>[  373.534901] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  373.534908] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  373.534911] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  373.534914] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  373.534916] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe B
>[  373.534918] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  373.534920] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  373.534923] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  373.534925] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  373.534927] [drm:intel_dump_pipe_config] requested mode:
>[  373.534931] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  373.534932] [drm:intel_dump_pipe_config] adjusted mode:
>[  373.534936] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  373.534939] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  373.534941] [drm:intel_dump_pipe_config] port clock: 270000
>[  373.534943] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  373.534945] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  373.534947] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  373.534949] [drm:intel_dump_pipe_config] ips: 0
>[  373.534951] [drm:intel_dump_pipe_config] double wide: 0
>[  373.534958] [drm:ironlake_disable_fbc] disabled FBC
>[  373.562476] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  373.562483] [drm:intel_edp_backlight_off] 
>[  373.580614] [drm:intel_edp_panel_off] Turn eDP power off
>[  373.763330] [drm:wait_panel_off] Wait for panel power off time
>[  373.763335] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  373.818284] [drm:wait_panel_status] Wait complete
>[  373.818292] [drm:intel_update_fbc] no output, disabling
>[  373.827978] [drm:ironlake_update_primary_plane] Writing base 0707C000 00000000 0 0 8192
>[  373.827984] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  373.827988] [drm:intel_crtc_mode_set] [ENCODER:13:TMDS-13] set [MODE:0:1920x1080]
>[  373.827991] [drm:intel_ddi_mode_set] Preparing DDI mode on port A, pipe B
>[  373.827993] [drm:intel_edp_panel_on] Turn eDP power on
>[  373.827997] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  374.363880] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control abcd0000
>[  374.374867] [drm:wait_panel_status] Wait complete
>[  374.374871] [drm:wait_panel_on] Wait for panel power on
>[  374.374875] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  374.583710] [drm:wait_panel_status] Wait complete
>[  374.583719] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  374.583726] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  374.584780] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  374.585222] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  374.585653] [drm:intel_dp_start_link_train] clock recovery OK
>[  374.586396] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  374.586598] [drm:intel_edp_backlight_on] 
>[  374.586604] [drm:intel_panel_enable_backlight] pipe B
>[  374.586609] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  374.586612] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  374.603693] [drm:intel_update_fbc] plane not A, disabling compression
>[  374.603698] [drm:intel_connector_check_state] [CONNECTOR:14:eDP-1]
>[  374.603702] [drm:check_encoder_state] [ENCODER:13:TMDS-13]
>[  374.603705] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  374.603707] [drm:check_encoder_state] [ENCODER:24:TMDS-24]
>[  374.603709] [drm:check_crtc_state] [CRTC:5]
>[  374.603712] [drm:check_crtc_state] [CRTC:8]
>[  374.603720] [drm:check_crtc_state] [CRTC:11]
>[  374.603730] [drm:edp_panel_vdd_off_sync] Turning eDP VDD off
>[  374.603737] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  374.903664] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  374.903672] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  374.903677] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  374.903680] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1]
>[  374.903683] [drm:intel_dp_detect] [CONNECTOR:14:eDP-1]
>[  374.903687] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  374.903694] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  374.903855] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  374.904014] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  374.904022] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  374.904026] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1] probed modes :
>[  374.904030] [drm:drm_mode_debug_printmodeline] Modeline 15:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  374.904034] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  374.904041] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  374.904045] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  374.904068] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  374.904072] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  374.955427] ------------[ cut here ]------------
>[  374.955446] WARNING: CPU: 0 PID: 4293 at drivers/gpu/drm/i915/intel_display.c:768 display_crc_ctl_write+0x575/0x772 [i915]()
>[  374.955448] vblank wait timed out
>[  374.955449] Modules linked in: ip6table_filter ip6_tables ipv6 iptable_filter ip_tables ebtable_nat ebtables x_tables dm_mod snd_hda_codec_hdmi iTCO_wdt iTCO_vendor_support ppdev pcspkr i2c_i801 lpc_ich snd_hda_intel mfd_core snd_hda_controller snd_hda_codec snd_hwdep snd_pcm snd_timer snd soundcore battery parport_pc parport ac acpi_cpufreq i915 video button drm_kms_helper drm
>[  374.955478] CPU: 0 PID: 4293 Comm: kms_fbc_crc Tainted: G        W     3.15.0-rc3_drm-intel-next-queued_bf67a6_20140507+ #2386
>[  374.955480]  0000000000000000 0000000000000009 ffffffff817233c0 ffff8801452c7e28
>[  374.955483]  ffffffff8103517a dead000000200200 ffffffffa00711fb ffffffff831d9100
>[  374.955486]  ffff880002ca0000 ffff880149c0f800 0000000000000000 ffff880002ca2ce8
>[  374.955490] Call Trace:
>[  374.955496]  [<ffffffff817233c0>] ? dump_stack+0x41/0x51
>[  374.955501]  [<ffffffff8103517a>] ? warn_slowpath_common+0x73/0x8b
>[  374.955512]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  374.955516]  [<ffffffff8103522a>] ? warn_slowpath_fmt+0x45/0x4a
>[  374.955532]  [<ffffffffa0095dc8>] ? intel_wait_for_vblank+0x77/0x1db [i915]
>[  374.955543]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  374.955548]  [<ffffffff810e0b64>] ? vfs_write+0xba/0x176
>[  374.955551]  [<ffffffff810e0f1c>] ? SyS_write+0x41/0x84
>[  374.955556]  [<ffffffff8172dba2>] ? system_call_fastpath+0x16/0x1b
>[  374.955558] ---[ end trace bf41fd17b08a734b ]---
>[  374.955572] [drm:drm_mode_addfb2] [FB:51]
>[  374.965695] [drm:drm_mode_addfb2] [FB:52]
>[  374.975700] [drm:drm_mode_setcrtc] [CRTC:5]
>[  374.975705] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  374.975708] [drm:intel_crtc_set_config] [CRTC:5] [FB:52] #connectors=1 (x y) (0 0)
>[  374.975711] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  374.975714] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  374.975716] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  374.975718] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  374.975720] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  374.975722] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  374.975726] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[  374.975729] [drm:connected_sink_compute_bpp] [CONNECTOR:14:eDP-1] checking for sink bpp constrains
>[  374.975733] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  374.975740] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  374.975742] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  374.975745] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  374.975747] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  374.975749] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  374.975751] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  374.975754] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  374.975757] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  374.975758] [drm:intel_dump_pipe_config] requested mode:
>[  374.975762] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  374.975764] [drm:intel_dump_pipe_config] adjusted mode:
>[  374.975767] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  374.975770] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  374.975772] [drm:intel_dump_pipe_config] port clock: 270000
>[  374.975774] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  374.975776] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  374.975778] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  374.975780] [drm:intel_dump_pipe_config] ips: 1
>[  374.975782] [drm:intel_dump_pipe_config] double wide: 0
>[  374.987406] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  374.987412] [drm:intel_edp_backlight_off] 
>[  375.003544] [drm:intel_edp_panel_off] Turn eDP power off
>[  375.188261] [drm:wait_panel_off] Wait for panel power off time
>[  375.188267] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  375.243215] [drm:wait_panel_status] Wait complete
>[  375.243223] [drm:intel_update_fbc] no output, disabling
>[  375.252762] [drm:ironlake_update_primary_plane] Writing base 0A07C000 00000000 0 0 8192
>[  375.252769] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  375.252772] [drm:intel_crtc_mode_set] [ENCODER:13:TMDS-13] set [MODE:0:1920x1080]
>[  375.252775] [drm:intel_ddi_mode_set] Preparing DDI mode on port A, pipe A
>[  375.252778] [drm:intel_edp_panel_on] Turn eDP power on
>[  375.252782] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  375.788812] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  375.788815] [drm:wait_panel_status] Wait complete
>[  375.788818] [drm:wait_panel_on] Wait for panel power on
>[  375.788822] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  375.997648] [drm:wait_panel_status] Wait complete
>[  375.997652] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  375.997659] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  375.998712] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  375.999153] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  375.999585] [drm:intel_dp_start_link_train] clock recovery OK
>[  376.000328] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  376.000531] [drm:intel_edp_backlight_on] 
>[  376.000536] [drm:intel_panel_enable_backlight] pipe A
>[  376.000542] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  376.000545] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  376.019631] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  376.019637] [drm:intel_connector_check_state] [CONNECTOR:14:eDP-1]
>[  376.019641] [drm:check_encoder_state] [ENCODER:13:TMDS-13]
>[  376.019644] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  376.019646] [drm:check_encoder_state] [ENCODER:24:TMDS-24]
>[  376.019649] [drm:check_crtc_state] [CRTC:5]
>[  376.019657] [drm:check_crtc_state] [CRTC:8]
>[  376.019660] [drm:check_crtc_state] [CRTC:11]
>[  376.069601] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  376.133320] [drm:gen8_irq_handler] *ERROR* Pipe A FIFO underrun
>[  376.333601] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  376.366921] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  376.384358] [drm:drm_mode_setcrtc] [CRTC:5]
>[  376.384362] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  376.384365] [drm:intel_crtc_set_config] [CRTC:5] [FB:51] #connectors=1 (x y) (0 0)
>[  376.384368] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=0, fb_changed=1
>[  376.384371] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  376.393653] [drm:ironlake_update_primary_plane] Writing base 0907C000 00000000 0 0 8192
>[  376.401345] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  376.401347] [drm:intel_update_fbc] disabling active FBC for update
>[  376.401349] [drm:ironlake_disable_fbc] disabled FBC
>[  376.401351] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  376.451314] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  376.716637] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  376.733307] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  376.751127] [drm:ironlake_disable_fbc] disabled FBC
>[  376.766600] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  376.816040] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  377.083021] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  377.099695] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  377.416663] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  377.449422] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  377.466570] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  377.466577] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  377.466581] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  377.466584] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1]
>[  377.466588] [drm:intel_dp_detect] [CONNECTOR:14:eDP-1]
>[  377.466754] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  377.466914] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  377.466923] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  377.466926] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1] probed modes :
>[  377.466930] [drm:drm_mode_debug_printmodeline] Modeline 15:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  377.466934] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  377.466940] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  377.466944] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  377.466965] [drm:pipe_crc_set_source] collecting CRCs for pipe B, pf
>[  377.466969] [drm:pipe_crc_set_source] stopping CRCs for pipe B
>[  377.518504] ------------[ cut here ]------------
>[  377.518523] WARNING: CPU: 0 PID: 4293 at drivers/gpu/drm/i915/intel_display.c:768 display_crc_ctl_write+0x575/0x772 [i915]()
>[  377.518525] vblank wait timed out
>[  377.518526] Modules linked in: ip6table_filter ip6_tables ipv6 iptable_filter ip_tables ebtable_nat ebtables x_tables dm_mod snd_hda_codec_hdmi iTCO_wdt iTCO_vendor_support ppdev pcspkr i2c_i801 lpc_ich snd_hda_intel mfd_core snd_hda_controller snd_hda_codec snd_hwdep snd_pcm snd_timer snd soundcore battery parport_pc parport ac acpi_cpufreq i915 video button drm_kms_helper drm
>[  377.518554] CPU: 0 PID: 4293 Comm: kms_fbc_crc Tainted: G        W     3.15.0-rc3_drm-intel-next-queued_bf67a6_20140507+ #2386
>[  377.518556]  0000000000000000 0000000000000009 ffffffff817233c0 ffff8801452c7e28
>[  377.518560]  ffffffff8103517a dead000000200200 ffffffffa00711fb ffffffff831d9100
>[  377.518563]  ffff880002ca0000 ffff880149c0f800 0000000000000001 ffff880002ca2d20
>[  377.518566] Call Trace:
>[  377.518572]  [<ffffffff817233c0>] ? dump_stack+0x41/0x51
>[  377.518577]  [<ffffffff8103517a>] ? warn_slowpath_common+0x73/0x8b
>[  377.518588]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  377.518592]  [<ffffffff8103522a>] ? warn_slowpath_fmt+0x45/0x4a
>[  377.518607]  [<ffffffffa0095dc8>] ? intel_wait_for_vblank+0x77/0x1db [i915]
>[  377.518618]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  377.518623]  [<ffffffff810e0b64>] ? vfs_write+0xba/0x176
>[  377.518627]  [<ffffffff810e0f1c>] ? SyS_write+0x41/0x84
>[  377.518632]  [<ffffffff8172dba2>] ? system_call_fastpath+0x16/0x1b
>[  377.518634] ---[ end trace bf41fd17b08a734c ]---
>[  377.518649] [drm:drm_mode_addfb2] [FB:53]
>[  377.528745] [drm:drm_mode_addfb2] [FB:54]
>[  377.538761] [drm:drm_mode_setcrtc] [CRTC:8]
>[  377.538765] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  377.538769] [drm:intel_crtc_set_config] [CRTC:8] [FB:54] #connectors=1 (x y) (0 0)
>[  377.538772] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  377.538774] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=1, fb_changed=0
>[  377.538777] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:8]
>[  377.538779] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  377.538781] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  377.538783] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  377.538786] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 1
>[  377.538790] [drm:connected_sink_compute_bpp] [CONNECTOR:14:eDP-1] checking for sink bpp constrains
>[  377.538794] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  377.538801] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  377.538803] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  377.538806] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  377.538808] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe B
>[  377.538810] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  377.538812] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  377.538815] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  377.538818] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  377.538819] [drm:intel_dump_pipe_config] requested mode:
>[  377.538823] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  377.538825] [drm:intel_dump_pipe_config] adjusted mode:
>[  377.538828] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  377.538831] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  377.538833] [drm:intel_dump_pipe_config] port clock: 270000
>[  377.538835] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  377.538838] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  377.538840] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  377.538842] [drm:intel_dump_pipe_config] ips: 0
>[  377.538843] [drm:intel_dump_pipe_config] double wide: 0
>[  377.538850] [drm:ironlake_disable_fbc] disabled FBC
>[  377.566471] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  377.566478] [drm:intel_edp_backlight_off] 
>[  377.584609] [drm:intel_edp_panel_off] Turn eDP power off
>[  377.767324] [drm:wait_panel_off] Wait for panel power off time
>[  377.767329] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  377.822279] [drm:wait_panel_status] Wait complete
>[  377.822287] [drm:intel_update_fbc] no output, disabling
>[  377.831983] [drm:ironlake_update_primary_plane] Writing base 0B07C000 00000000 0 0 8192
>[  377.831990] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  377.831993] [drm:intel_crtc_mode_set] [ENCODER:13:TMDS-13] set [MODE:0:1920x1080]
>[  377.831995] [drm:intel_ddi_mode_set] Preparing DDI mode on port A, pipe B
>[  377.831998] [drm:intel_edp_panel_on] Turn eDP power on
>[  377.832001] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  378.367875] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  378.367878] [drm:wait_panel_status] Wait complete
>[  378.367882] [drm:wait_panel_on] Wait for panel power on
>[  378.367886] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  378.576713] [drm:wait_panel_status] Wait complete
>[  378.576717] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  378.576724] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  378.577769] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  378.578210] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  378.578640] [drm:intel_dp_start_link_train] clock recovery OK
>[  378.579383] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  378.579584] [drm:intel_edp_backlight_on] 
>[  378.579590] [drm:intel_panel_enable_backlight] pipe B
>[  378.579596] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  378.579599] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  378.596696] [drm:intel_update_fbc] plane not A, disabling compression
>[  378.596701] [drm:intel_connector_check_state] [CONNECTOR:14:eDP-1]
>[  378.596705] [drm:check_encoder_state] [ENCODER:13:TMDS-13]
>[  378.596708] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  378.596710] [drm:check_encoder_state] [ENCODER:24:TMDS-24]
>[  378.596713] [drm:check_crtc_state] [CRTC:5]
>[  378.596715] [drm:check_crtc_state] [CRTC:8]
>[  378.596723] [drm:check_crtc_state] [CRTC:11]
>[  378.596733] [drm:edp_panel_vdd_off_sync] Turning eDP VDD off
>[  378.596739] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  378.896663] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  378.896669] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  378.896673] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  378.896676] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1]
>[  378.896679] [drm:intel_dp_detect] [CONNECTOR:14:eDP-1]
>[  378.896683] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  378.896690] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  378.896851] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  378.897010] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  378.897019] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  378.897022] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1] probed modes :
>[  378.897026] [drm:drm_mode_debug_printmodeline] Modeline 15:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  378.897030] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  378.897037] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  378.897042] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  378.897063] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  378.897067] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  378.948431] ------------[ cut here ]------------
>[  378.948450] WARNING: CPU: 0 PID: 4293 at drivers/gpu/drm/i915/intel_display.c:768 display_crc_ctl_write+0x575/0x772 [i915]()
>[  378.948452] vblank wait timed out
>[  378.948453] Modules linked in: ip6table_filter ip6_tables ipv6 iptable_filter ip_tables ebtable_nat ebtables x_tables dm_mod snd_hda_codec_hdmi iTCO_wdt iTCO_vendor_support ppdev pcspkr i2c_i801 lpc_ich snd_hda_intel mfd_core snd_hda_controller snd_hda_codec snd_hwdep snd_pcm snd_timer snd soundcore battery parport_pc parport ac acpi_cpufreq i915 video button drm_kms_helper drm
>[  378.948480] CPU: 0 PID: 4293 Comm: kms_fbc_crc Tainted: G        W     3.15.0-rc3_drm-intel-next-queued_bf67a6_20140507+ #2386
>[  378.948482]  0000000000000000 0000000000000009 ffffffff817233c0 ffff8801452c7e28
>[  378.948486]  ffffffff8103517a dead000000200200 ffffffffa00711fb ffffffff831d9100
>[  378.948489]  ffff880002ca0000 ffff880149c0f800 0000000000000000 ffff880002ca2ce8
>[  378.948492] Call Trace:
>[  378.948499]  [<ffffffff817233c0>] ? dump_stack+0x41/0x51
>[  378.948503]  [<ffffffff8103517a>] ? warn_slowpath_common+0x73/0x8b
>[  378.948515]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  378.948518]  [<ffffffff8103522a>] ? warn_slowpath_fmt+0x45/0x4a
>[  378.948534]  [<ffffffffa0095dc8>] ? intel_wait_for_vblank+0x77/0x1db [i915]
>[  378.948545]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  378.948549]  [<ffffffff810e0b64>] ? vfs_write+0xba/0x176
>[  378.948553]  [<ffffffff810e0f1c>] ? SyS_write+0x41/0x84
>[  378.948558]  [<ffffffff8172dba2>] ? system_call_fastpath+0x16/0x1b
>[  378.948560] ---[ end trace bf41fd17b08a734d ]---
>[  378.948575] [drm:drm_mode_addfb2] [FB:55]
>[  378.958689] [drm:drm_mode_addfb2] [FB:56]
>[  378.968686] [drm:drm_mode_setcrtc] [CRTC:5]
>[  378.968692] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  378.968695] [drm:intel_crtc_set_config] [CRTC:5] [FB:56] #connectors=1 (x y) (0 0)
>[  378.968698] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  378.968701] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  378.968704] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  378.968705] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  378.968708] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  378.968709] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  378.968713] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[  378.968716] [drm:connected_sink_compute_bpp] [CONNECTOR:14:eDP-1] checking for sink bpp constrains
>[  378.968720] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  378.968727] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  378.968729] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  378.968732] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  378.968734] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  378.968736] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  378.968738] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  378.968741] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  378.968744] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  378.968745] [drm:intel_dump_pipe_config] requested mode:
>[  378.968749] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  378.968751] [drm:intel_dump_pipe_config] adjusted mode:
>[  378.968754] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  378.968757] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  378.968759] [drm:intel_dump_pipe_config] port clock: 270000
>[  378.968761] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  378.968763] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  378.968766] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  378.968767] [drm:intel_dump_pipe_config] ips: 1
>[  378.968769] [drm:intel_dump_pipe_config] double wide: 0
>[  378.980409] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  378.980416] [drm:intel_edp_backlight_off] 
>[  378.996548] [drm:intel_edp_panel_off] Turn eDP power off
>[  379.181265] [drm:wait_panel_off] Wait for panel power off time
>[  379.181271] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  379.236218] [drm:wait_panel_status] Wait complete
>[  379.236226] [drm:intel_update_fbc] no output, disabling
>[  379.245929] [drm:ironlake_update_primary_plane] Writing base 0E07D000 00000000 0 0 8192
>[  379.245936] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  379.245939] [drm:intel_crtc_mode_set] [ENCODER:13:TMDS-13] set [MODE:0:1920x1080]
>[  379.245941] [drm:intel_ddi_mode_set] Preparing DDI mode on port A, pipe A
>[  379.245945] [drm:intel_edp_panel_on] Turn eDP power on
>[  379.245947] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  379.781820] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  379.781826] [drm:wait_panel_status] Wait complete
>[  379.781830] [drm:wait_panel_on] Wait for panel power on
>[  379.781834] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  379.990652] [drm:wait_panel_status] Wait complete
>[  379.990659] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  379.990667] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  379.991724] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  379.992164] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  379.992594] [drm:intel_dp_start_link_train] clock recovery OK
>[  379.993337] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  379.993538] [drm:intel_edp_backlight_on] 
>[  379.993544] [drm:intel_panel_enable_backlight] pipe A
>[  379.993549] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  379.993552] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  380.012634] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  380.012640] [drm:intel_connector_check_state] [CONNECTOR:14:eDP-1]
>[  380.012644] [drm:check_encoder_state] [ENCODER:13:TMDS-13]
>[  380.012646] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  380.012649] [drm:check_encoder_state] [ENCODER:24:TMDS-24]
>[  380.012651] [drm:check_crtc_state] [CRTC:5]
>[  380.012659] [drm:check_crtc_state] [CRTC:8]
>[  380.012661] [drm:check_crtc_state] [CRTC:11]
>[  380.062607] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  380.126329] [drm:gen8_irq_handler] *ERROR* Pipe A FIFO underrun
>[  380.326608] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  380.359929] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  380.377362] [drm:drm_mode_setcrtc] [CRTC:5]
>[  380.377366] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  380.377369] [drm:intel_crtc_set_config] [CRTC:5] [FB:55] #connectors=1 (x y) (0 0)
>[  380.377372] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=0, fb_changed=1
>[  380.377375] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  380.386777] [drm:ironlake_update_primary_plane] Writing base 0D07D000 00000000 0 0 8192
>[  380.394348] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  380.394350] [drm:intel_update_fbc] disabling active FBC for update
>[  380.394352] [drm:ironlake_disable_fbc] disabled FBC
>[  380.394355] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  380.444318] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  380.709645] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  380.726316] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  380.744130] [drm:ironlake_disable_fbc] disabled FBC
>[  380.759611] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  380.809046] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  381.076029] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  381.092701] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  381.409664] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  381.442430] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  381.459573] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  381.459580] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  381.459585] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  381.459588] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1]
>[  381.459591] [drm:intel_dp_detect] [CONNECTOR:14:eDP-1]
>[  381.459756] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  381.459915] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  381.459923] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  381.459927] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1] probed modes :
>[  381.459931] [drm:drm_mode_debug_printmodeline] Modeline 15:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  381.459935] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  381.459941] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  381.459945] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  381.459966] [drm:pipe_crc_set_source] collecting CRCs for pipe B, pf
>[  381.459970] [drm:pipe_crc_set_source] stopping CRCs for pipe B
>[  381.511507] ------------[ cut here ]------------
>[  381.511527] WARNING: CPU: 0 PID: 4293 at drivers/gpu/drm/i915/intel_display.c:768 display_crc_ctl_write+0x575/0x772 [i915]()
>[  381.511529] vblank wait timed out
>[  381.511530] Modules linked in: ip6table_filter ip6_tables ipv6 iptable_filter ip_tables ebtable_nat ebtables x_tables dm_mod snd_hda_codec_hdmi iTCO_wdt iTCO_vendor_support ppdev pcspkr i2c_i801 lpc_ich snd_hda_intel mfd_core snd_hda_controller snd_hda_codec snd_hwdep snd_pcm snd_timer snd soundcore battery parport_pc parport ac acpi_cpufreq i915 video button drm_kms_helper drm
>[  381.511557] CPU: 0 PID: 4293 Comm: kms_fbc_crc Tainted: G        W     3.15.0-rc3_drm-intel-next-queued_bf67a6_20140507+ #2386
>[  381.511559]  0000000000000000 0000000000000009 ffffffff817233c0 ffff8801452c7e28
>[  381.511563]  ffffffff8103517a dead000000200200 ffffffffa00711fb ffffffff831d9100
>[  381.511566]  ffff880002ca0000 ffff880149c0f800 0000000000000001 ffff880002ca2d20
>[  381.511570] Call Trace:
>[  381.511578]  [<ffffffff817233c0>] ? dump_stack+0x41/0x51
>[  381.511582]  [<ffffffff8103517a>] ? warn_slowpath_common+0x73/0x8b
>[  381.511594]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  381.511597]  [<ffffffff8103522a>] ? warn_slowpath_fmt+0x45/0x4a
>[  381.511613]  [<ffffffffa0095dc8>] ? intel_wait_for_vblank+0x77/0x1db [i915]
>[  381.511624]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  381.511629]  [<ffffffff810e0b64>] ? vfs_write+0xba/0x176
>[  381.511633]  [<ffffffff810e0f1c>] ? SyS_write+0x41/0x84
>[  381.511638]  [<ffffffff8172dba2>] ? system_call_fastpath+0x16/0x1b
>[  381.511640] ---[ end trace bf41fd17b08a734e ]---
>[  381.511653] [drm:drm_mode_addfb2] [FB:57]
>[  381.521728] [drm:drm_mode_addfb2] [FB:58]
>[  381.531787] [drm:drm_mode_setcrtc] [CRTC:8]
>[  381.531792] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  381.531796] [drm:intel_crtc_set_config] [CRTC:8] [FB:58] #connectors=1 (x y) (0 0)
>[  381.531799] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  381.531801] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=1, fb_changed=0
>[  381.531804] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:8]
>[  381.531806] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  381.531808] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  381.531810] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  381.531813] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 1
>[  381.531816] [drm:connected_sink_compute_bpp] [CONNECTOR:14:eDP-1] checking for sink bpp constrains
>[  381.531820] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  381.531827] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  381.531830] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  381.531833] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  381.531835] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe B
>[  381.531837] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  381.531839] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  381.531841] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  381.531844] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  381.531846] [drm:intel_dump_pipe_config] requested mode:
>[  381.531850] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  381.531851] [drm:intel_dump_pipe_config] adjusted mode:
>[  381.531855] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  381.531858] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  381.531860] [drm:intel_dump_pipe_config] port clock: 270000
>[  381.531862] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  381.531864] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  381.531866] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  381.531868] [drm:intel_dump_pipe_config] ips: 0
>[  381.531869] [drm:intel_dump_pipe_config] double wide: 0
>[  381.531875] [drm:ironlake_disable_fbc] disabled FBC
>[  381.559475] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  381.559482] [drm:intel_edp_backlight_off] 
>[  381.577612] [drm:intel_edp_panel_off] Turn eDP power off
>[  381.760329] [drm:wait_panel_off] Wait for panel power off time
>[  381.760333] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  381.815283] [drm:wait_panel_status] Wait complete
>[  381.815291] [drm:intel_update_fbc] no output, disabling
>[  381.824983] [drm:ironlake_update_primary_plane] Writing base 0307C000 00000000 0 0 8192
>[  381.824990] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  381.824993] [drm:intel_crtc_mode_set] [ENCODER:13:TMDS-13] set [MODE:0:1920x1080]
>[  381.824996] [drm:intel_ddi_mode_set] Preparing DDI mode on port A, pipe B
>[  381.824998] [drm:intel_edp_panel_on] Turn eDP power on
>[  381.825002] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  382.360879] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  382.360882] [drm:wait_panel_status] Wait complete
>[  382.360886] [drm:wait_panel_on] Wait for panel power on
>[  382.360890] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  382.569716] [drm:wait_panel_status] Wait complete
>[  382.569720] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  382.569727] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  382.570774] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  382.571215] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  382.571646] [drm:intel_dp_start_link_train] clock recovery OK
>[  382.572390] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  382.572590] [drm:intel_edp_backlight_on] 
>[  382.572595] [drm:intel_panel_enable_backlight] pipe B
>[  382.572601] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  382.572604] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  382.589700] [drm:intel_update_fbc] plane not A, disabling compression
>[  382.589705] [drm:intel_connector_check_state] [CONNECTOR:14:eDP-1]
>[  382.589709] [drm:check_encoder_state] [ENCODER:13:TMDS-13]
>[  382.589711] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  382.589714] [drm:check_encoder_state] [ENCODER:24:TMDS-24]
>[  382.589716] [drm:check_crtc_state] [CRTC:5]
>[  382.589719] [drm:check_crtc_state] [CRTC:8]
>[  382.589727] [drm:check_crtc_state] [CRTC:11]
>[  382.589737] [drm:edp_panel_vdd_off_sync] Turning eDP VDD off
>[  382.589743] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  382.889655] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  382.889664] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  382.889668] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  382.889671] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1]
>[  382.889674] [drm:intel_dp_detect] [CONNECTOR:14:eDP-1]
>[  382.889679] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  382.889686] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  382.889849] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  382.890008] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  382.890017] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  382.890021] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1] probed modes :
>[  382.890024] [drm:drm_mode_debug_printmodeline] Modeline 15:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  382.890028] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  382.890036] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  382.890041] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  382.890062] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  382.890067] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  382.941435] ------------[ cut here ]------------
>[  382.941455] WARNING: CPU: 0 PID: 4293 at drivers/gpu/drm/i915/intel_display.c:768 display_crc_ctl_write+0x575/0x772 [i915]()
>[  382.941457] vblank wait timed out
>[  382.941459] Modules linked in: ip6table_filter ip6_tables ipv6 iptable_filter ip_tables ebtable_nat ebtables x_tables dm_mod snd_hda_codec_hdmi iTCO_wdt iTCO_vendor_support ppdev pcspkr i2c_i801 lpc_ich snd_hda_intel mfd_core snd_hda_controller snd_hda_codec snd_hwdep snd_pcm snd_timer snd soundcore battery parport_pc parport ac acpi_cpufreq i915 video button drm_kms_helper drm
>[  382.941486] CPU: 0 PID: 4293 Comm: kms_fbc_crc Tainted: G        W     3.15.0-rc3_drm-intel-next-queued_bf67a6_20140507+ #2386
>[  382.941488]  0000000000000000 0000000000000009 ffffffff817233c0 ffff8801452c7e28
>[  382.941491]  ffffffff8103517a dead000000200200 ffffffffa00711fb ffffffff831d9100
>[  382.941495]  ffff880002ca0000 ffff880149c0f800 0000000000000000 ffff880002ca2ce8
>[  382.941498] Call Trace:
>[  382.941504]  [<ffffffff817233c0>] ? dump_stack+0x41/0x51
>[  382.941511]  [<ffffffff8103517a>] ? warn_slowpath_common+0x73/0x8b
>[  382.941522]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  382.941526]  [<ffffffff8103522a>] ? warn_slowpath_fmt+0x45/0x4a
>[  382.941541]  [<ffffffffa0095dc8>] ? intel_wait_for_vblank+0x77/0x1db [i915]
>[  382.941552]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  382.941557]  [<ffffffff810e0b64>] ? vfs_write+0xba/0x176
>[  382.941560]  [<ffffffff810e0f1c>] ? SyS_write+0x41/0x84
>[  382.941565]  [<ffffffff8172dba2>] ? system_call_fastpath+0x16/0x1b
>[  382.941567] ---[ end trace bf41fd17b08a734f ]---
>[  382.941583] [drm:drm_mode_addfb2] [FB:59]
>[  382.951671] [drm:drm_mode_addfb2] [FB:60]
>[  382.961675] [drm:drm_mode_setcrtc] [CRTC:5]
>[  382.961680] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  382.961683] [drm:intel_crtc_set_config] [CRTC:5] [FB:60] #connectors=1 (x y) (0 0)
>[  382.961687] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  382.961690] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  382.961693] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  382.961695] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  382.961697] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  382.961699] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  382.961702] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[  382.961705] [drm:connected_sink_compute_bpp] [CONNECTOR:14:eDP-1] checking for sink bpp constrains
>[  382.961709] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  382.961716] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  382.961718] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  382.961721] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  382.961724] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  382.961725] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  382.961727] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  382.961730] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  382.961733] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  382.961734] [drm:intel_dump_pipe_config] requested mode:
>[  382.961738] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  382.961740] [drm:intel_dump_pipe_config] adjusted mode:
>[  382.961743] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  382.961746] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  382.961748] [drm:intel_dump_pipe_config] port clock: 270000
>[  382.961750] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  382.961752] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  382.961754] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  382.961756] [drm:intel_dump_pipe_config] ips: 1
>[  382.961758] [drm:intel_dump_pipe_config] double wide: 0
>[  382.973413] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  382.973420] [drm:intel_edp_backlight_off] 
>[  382.989552] [drm:intel_edp_panel_off] Turn eDP power off
>[  383.174267] [drm:wait_panel_off] Wait for panel power off time
>[  383.174271] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  383.229222] [drm:wait_panel_status] Wait complete
>[  383.229229] [drm:intel_update_fbc] no output, disabling
>[  383.238938] [drm:ironlake_update_primary_plane] Writing base 0107C000 00000000 0 0 8192
>[  383.238944] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  383.238948] [drm:intel_crtc_mode_set] [ENCODER:13:TMDS-13] set [MODE:0:1920x1080]
>[  383.238950] [drm:intel_ddi_mode_set] Preparing DDI mode on port A, pipe A
>[  383.238953] [drm:intel_edp_panel_on] Turn eDP power on
>[  383.238957] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  383.774818] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  383.774821] [drm:wait_panel_status] Wait complete
>[  383.774825] [drm:wait_panel_on] Wait for panel power on
>[  383.774829] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  383.983655] [drm:wait_panel_status] Wait complete
>[  383.983659] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  383.983666] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  383.984715] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  383.985157] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  383.985588] [drm:intel_dp_start_link_train] clock recovery OK
>[  383.986332] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  383.986533] [drm:intel_edp_backlight_on] 
>[  383.986539] [drm:intel_panel_enable_backlight] pipe A
>[  383.986544] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  383.986548] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  384.005638] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  384.005644] [drm:intel_connector_check_state] [CONNECTOR:14:eDP-1]
>[  384.005648] [drm:check_encoder_state] [ENCODER:13:TMDS-13]
>[  384.005651] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  384.005653] [drm:check_encoder_state] [ENCODER:24:TMDS-24]
>[  384.005655] [drm:check_crtc_state] [CRTC:5]
>[  384.005663] [drm:check_crtc_state] [CRTC:8]
>[  384.005666] [drm:check_crtc_state] [CRTC:11]
>[  384.055610] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  384.119323] [drm:gen8_irq_handler] *ERROR* Pipe A FIFO underrun
>[  384.319604] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  384.352924] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  384.370365] [drm:drm_mode_setcrtc] [CRTC:5]
>[  384.370369] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  384.370372] [drm:intel_crtc_set_config] [CRTC:5] [FB:59] #connectors=1 (x y) (0 0)
>[  384.370375] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=0, fb_changed=1
>[  384.370378] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  384.379778] [drm:ironlake_update_primary_plane] Writing base 0407C000 00000000 0 0 8192
>[  384.387351] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  384.387354] [drm:intel_update_fbc] disabling active FBC for update
>[  384.387356] [drm:ironlake_disable_fbc] disabled FBC
>[  384.387358] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  384.437321] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  384.702640] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  384.719310] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  384.737133] [drm:ironlake_disable_fbc] disabled FBC
>[  384.752602] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  384.802046] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  385.069024] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  385.085696] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  385.402670] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  385.435425] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  385.452578] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  385.452585] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  385.452590] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  385.452593] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1]
>[  385.452596] [drm:intel_dp_detect] [CONNECTOR:14:eDP-1]
>[  385.452760] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  385.452919] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  385.452928] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  385.452932] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1] probed modes :
>[  385.452936] [drm:drm_mode_debug_printmodeline] Modeline 15:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  385.452940] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  385.452946] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  385.452951] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  385.452972] [drm:pipe_crc_set_source] collecting CRCs for pipe B, pf
>[  385.452976] [drm:pipe_crc_set_source] stopping CRCs for pipe B
>[  385.504511] ------------[ cut here ]------------
>[  385.504530] WARNING: CPU: 0 PID: 4293 at drivers/gpu/drm/i915/intel_display.c:768 display_crc_ctl_write+0x575/0x772 [i915]()
>[  385.504531] vblank wait timed out
>[  385.504533] Modules linked in: ip6table_filter ip6_tables ipv6 iptable_filter ip_tables ebtable_nat ebtables x_tables dm_mod snd_hda_codec_hdmi iTCO_wdt iTCO_vendor_support ppdev pcspkr i2c_i801 lpc_ich snd_hda_intel mfd_core snd_hda_controller snd_hda_codec snd_hwdep snd_pcm snd_timer snd soundcore battery parport_pc parport ac acpi_cpufreq i915 video button drm_kms_helper drm
>[  385.504560] CPU: 0 PID: 4293 Comm: kms_fbc_crc Tainted: G        W     3.15.0-rc3_drm-intel-next-queued_bf67a6_20140507+ #2386
>[  385.504562]  0000000000000000 0000000000000009 ffffffff817233c0 ffff8801452c7e28
>[  385.504566]  ffffffff8103517a dead000000200200 ffffffffa00711fb ffffffff831d9100
>[  385.504569]  ffff880002ca0000 ffff880149c0f800 0000000000000001 ffff880002ca2d20
>[  385.504573] Call Trace:
>[  385.504579]  [<ffffffff817233c0>] ? dump_stack+0x41/0x51
>[  385.504584]  [<ffffffff8103517a>] ? warn_slowpath_common+0x73/0x8b
>[  385.504595]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  385.504598]  [<ffffffff8103522a>] ? warn_slowpath_fmt+0x45/0x4a
>[  385.504614]  [<ffffffffa0095dc8>] ? intel_wait_for_vblank+0x77/0x1db [i915]
>[  385.504624]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  385.504630]  [<ffffffff810e0b64>] ? vfs_write+0xba/0x176
>[  385.504633]  [<ffffffff810e0f1c>] ? SyS_write+0x41/0x84
>[  385.504638]  [<ffffffff8172dba2>] ? system_call_fastpath+0x16/0x1b
>[  385.504640] ---[ end trace bf41fd17b08a7350 ]---
>[  385.504653] [drm:drm_mode_addfb2] [FB:61]
>[  385.514736] [drm:drm_mode_addfb2] [FB:62]
>[  385.524787] [drm:drm_mode_setcrtc] [CRTC:8]
>[  385.524792] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  385.524796] [drm:intel_crtc_set_config] [CRTC:8] [FB:62] #connectors=1 (x y) (0 0)
>[  385.524799] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  385.524801] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=1, fb_changed=0
>[  385.524804] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:8]
>[  385.524806] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  385.524808] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  385.524810] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  385.524813] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 1
>[  385.524816] [drm:connected_sink_compute_bpp] [CONNECTOR:14:eDP-1] checking for sink bpp constrains
>[  385.524820] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  385.524827] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  385.524829] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  385.524832] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  385.524835] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe B
>[  385.524836] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  385.524838] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  385.524841] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  385.524844] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  385.524846] [drm:intel_dump_pipe_config] requested mode:
>[  385.524849] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  385.524851] [drm:intel_dump_pipe_config] adjusted mode:
>[  385.524854] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  385.524857] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  385.524859] [drm:intel_dump_pipe_config] port clock: 270000
>[  385.524861] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  385.524863] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  385.524866] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  385.524867] [drm:intel_dump_pipe_config] ips: 0
>[  385.524869] [drm:intel_dump_pipe_config] double wide: 0
>[  385.524875] [drm:ironlake_disable_fbc] disabled FBC
>[  385.552478] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  385.552485] [drm:intel_edp_backlight_off] 
>[  385.570616] [drm:intel_edp_panel_off] Turn eDP power off
>[  385.753333] [drm:wait_panel_off] Wait for panel power off time
>[  385.753337] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  385.808287] [drm:wait_panel_status] Wait complete
>[  385.808295] [drm:intel_update_fbc] no output, disabling
>[  385.817963] [drm:ironlake_update_primary_plane] Writing base 0807C000 00000000 0 0 8192
>[  385.817973] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  385.817977] [drm:intel_crtc_mode_set] [ENCODER:13:TMDS-13] set [MODE:0:1920x1080]
>[  385.817979] [drm:intel_ddi_mode_set] Preparing DDI mode on port A, pipe B
>[  385.817981] [drm:intel_edp_panel_on] Turn eDP power on
>[  385.817985] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  386.353883] [drm:wait_panel_status] mask b800000f value 00000000 status 08000001 control abcd0000
>[  386.364870] [drm:wait_panel_status] Wait complete
>[  386.364874] [drm:wait_panel_on] Wait for panel power on
>[  386.364878] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  386.573712] [drm:wait_panel_status] Wait complete
>[  386.573716] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  386.573722] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  386.574773] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  386.575214] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  386.575645] [drm:intel_dp_start_link_train] clock recovery OK
>[  386.576389] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  386.576590] [drm:intel_edp_backlight_on] 
>[  386.576596] [drm:intel_panel_enable_backlight] pipe B
>[  386.576601] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  386.576605] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  386.593695] [drm:intel_update_fbc] plane not A, disabling compression
>[  386.593699] [drm:intel_connector_check_state] [CONNECTOR:14:eDP-1]
>[  386.593704] [drm:check_encoder_state] [ENCODER:13:TMDS-13]
>[  386.593706] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  386.593709] [drm:check_encoder_state] [ENCODER:24:TMDS-24]
>[  386.593711] [drm:check_crtc_state] [CRTC:5]
>[  386.593714] [drm:check_crtc_state] [CRTC:8]
>[  386.593722] [drm:check_crtc_state] [CRTC:11]
>[  386.593731] [drm:edp_panel_vdd_off_sync] Turning eDP VDD off
>[  386.593737] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  386.893658] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  386.893666] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  386.893671] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  386.893673] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1]
>[  386.893676] [drm:intel_dp_detect] [CONNECTOR:14:eDP-1]
>[  386.893681] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  386.893687] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  386.893849] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  386.894007] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  386.894016] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  386.894020] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1] probed modes :
>[  386.894024] [drm:drm_mode_debug_printmodeline] Modeline 15:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  386.894028] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  386.894035] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  386.894039] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  386.894061] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  386.894066] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  386.945429] ------------[ cut here ]------------
>[  386.945448] WARNING: CPU: 0 PID: 4293 at drivers/gpu/drm/i915/intel_display.c:768 display_crc_ctl_write+0x575/0x772 [i915]()
>[  386.945450] vblank wait timed out
>[  386.945451] Modules linked in: ip6table_filter ip6_tables ipv6 iptable_filter ip_tables ebtable_nat ebtables x_tables dm_mod snd_hda_codec_hdmi iTCO_wdt iTCO_vendor_support ppdev pcspkr i2c_i801 lpc_ich snd_hda_intel mfd_core snd_hda_controller snd_hda_codec snd_hwdep snd_pcm snd_timer snd soundcore battery parport_pc parport ac acpi_cpufreq i915 video button drm_kms_helper drm
>[  386.945479] CPU: 0 PID: 4293 Comm: kms_fbc_crc Tainted: G        W     3.15.0-rc3_drm-intel-next-queued_bf67a6_20140507+ #2386
>[  386.945480]  0000000000000000 0000000000000009 ffffffff817233c0 ffff8801452c7e28
>[  386.945484]  ffffffff8103517a dead000000200200 ffffffffa00711fb ffffffff831d9100
>[  386.945487]  ffff880002ca0000 ffff880149c0f800 0000000000000000 ffff880002ca2ce8
>[  386.945491] Call Trace:
>[  386.945497]  [<ffffffff817233c0>] ? dump_stack+0x41/0x51
>[  386.945502]  [<ffffffff8103517a>] ? warn_slowpath_common+0x73/0x8b
>[  386.945514]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  386.945517]  [<ffffffff8103522a>] ? warn_slowpath_fmt+0x45/0x4a
>[  386.945533]  [<ffffffffa0095dc8>] ? intel_wait_for_vblank+0x77/0x1db [i915]
>[  386.945544]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  386.945549]  [<ffffffff810e0b64>] ? vfs_write+0xba/0x176
>[  386.945553]  [<ffffffff810e0f1c>] ? SyS_write+0x41/0x84
>[  386.945557]  [<ffffffff8172dba2>] ? system_call_fastpath+0x16/0x1b
>[  386.945560] ---[ end trace bf41fd17b08a7351 ]---
>[  386.945573] [drm:drm_mode_addfb2] [FB:63]
>[  386.955643] [drm:drm_mode_addfb2] [FB:64]
>[  386.965647] [drm:drm_mode_setcrtc] [CRTC:5]
>[  386.965652] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  386.965656] [drm:intel_crtc_set_config] [CRTC:5] [FB:64] #connectors=1 (x y) (0 0)
>[  386.965659] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  386.965661] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  386.965664] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  386.965666] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  386.965668] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  386.965670] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  386.965673] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[  386.965676] [drm:connected_sink_compute_bpp] [CONNECTOR:14:eDP-1] checking for sink bpp constrains
>[  386.965680] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  386.965689] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  386.965691] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  386.965694] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  386.965696] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  386.965698] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  386.965700] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  386.965703] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  386.965706] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  386.965707] [drm:intel_dump_pipe_config] requested mode:
>[  386.965711] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  386.965713] [drm:intel_dump_pipe_config] adjusted mode:
>[  386.965716] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  386.965719] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  386.965721] [drm:intel_dump_pipe_config] port clock: 270000
>[  386.965723] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  386.965725] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  386.965728] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  386.965729] [drm:intel_dump_pipe_config] ips: 1
>[  386.965731] [drm:intel_dump_pipe_config] double wide: 0
>[  386.977408] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  386.977414] [drm:intel_edp_backlight_off] 
>[  386.993547] [drm:intel_edp_panel_off] Turn eDP power off
>[  387.178262] [drm:wait_panel_off] Wait for panel power off time
>[  387.178267] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  387.233217] [drm:wait_panel_status] Wait complete
>[  387.233225] [drm:intel_update_fbc] no output, disabling
>[  387.242921] [drm:ironlake_update_primary_plane] Writing base 0507C000 00000000 0 0 8192
>[  387.242927] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  387.242931] [drm:intel_crtc_mode_set] [ENCODER:13:TMDS-13] set [MODE:0:1920x1080]
>[  387.242933] [drm:intel_ddi_mode_set] Preparing DDI mode on port A, pipe A
>[  387.242936] [drm:intel_edp_panel_on] Turn eDP power on
>[  387.242939] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  387.778815] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  387.778818] [drm:wait_panel_status] Wait complete
>[  387.778822] [drm:wait_panel_on] Wait for panel power on
>[  387.778826] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  387.987650] [drm:wait_panel_status] Wait complete
>[  387.987654] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  387.987661] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  387.988710] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  387.989151] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  387.989582] [drm:intel_dp_start_link_train] clock recovery OK
>[  387.990326] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  387.990527] [drm:intel_edp_backlight_on] 
>[  387.990533] [drm:intel_panel_enable_backlight] pipe A
>[  387.990538] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  387.990541] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  388.009633] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  388.009639] [drm:intel_connector_check_state] [CONNECTOR:14:eDP-1]
>[  388.009643] [drm:check_encoder_state] [ENCODER:13:TMDS-13]
>[  388.009646] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  388.009648] [drm:check_encoder_state] [ENCODER:24:TMDS-24]
>[  388.009651] [drm:check_crtc_state] [CRTC:5]
>[  388.009658] [drm:check_crtc_state] [CRTC:8]
>[  388.009661] [drm:check_crtc_state] [CRTC:11]
>[  388.059604] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  388.123317] [drm:gen8_irq_handler] *ERROR* Pipe A FIFO underrun
>[  388.323597] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  388.356917] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  388.374361] [drm:drm_mode_setcrtc] [CRTC:5]
>[  388.374365] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  388.374368] [drm:intel_crtc_set_config] [CRTC:5] [FB:63] #connectors=1 (x y) (0 0)
>[  388.374371] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=0, fb_changed=1
>[  388.374374] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  388.383769] [drm:ironlake_update_primary_plane] Writing base 0707C000 00000000 0 0 8192
>[  388.391347] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  388.391349] [drm:intel_update_fbc] disabling active FBC for update
>[  388.391352] [drm:ironlake_disable_fbc] disabled FBC
>[  388.391354] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  388.441317] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  388.706634] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  388.723304] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  388.741133] [drm:ironlake_disable_fbc] disabled FBC
>[  388.756597] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  388.806043] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  389.073018] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  389.089690] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  389.406666] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  389.439419] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  389.456575] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  389.456582] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  389.456588] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  389.456591] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1]
>[  389.456594] [drm:intel_dp_detect] [CONNECTOR:14:eDP-1]
>[  389.456758] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  389.456917] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  389.456926] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  389.456930] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1] probed modes :
>[  389.456934] [drm:drm_mode_debug_printmodeline] Modeline 15:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  389.456938] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  389.456945] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  389.456950] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  389.456972] [drm:pipe_crc_set_source] collecting CRCs for pipe B, pf
>[  389.456976] [drm:pipe_crc_set_source] stopping CRCs for pipe B
>[  389.508506] ------------[ cut here ]------------
>[  389.508526] WARNING: CPU: 0 PID: 4293 at drivers/gpu/drm/i915/intel_display.c:768 display_crc_ctl_write+0x575/0x772 [i915]()
>[  389.508527] vblank wait timed out
>[  389.508529] Modules linked in: ip6table_filter ip6_tables ipv6 iptable_filter ip_tables ebtable_nat ebtables x_tables dm_mod snd_hda_codec_hdmi iTCO_wdt iTCO_vendor_support ppdev pcspkr i2c_i801 lpc_ich snd_hda_intel mfd_core snd_hda_controller snd_hda_codec snd_hwdep snd_pcm snd_timer snd soundcore battery parport_pc parport ac acpi_cpufreq i915 video button drm_kms_helper drm
>[  389.508556] CPU: 0 PID: 4293 Comm: kms_fbc_crc Tainted: G        W     3.15.0-rc3_drm-intel-next-queued_bf67a6_20140507+ #2386
>[  389.508558]  0000000000000000 0000000000000009 ffffffff817233c0 ffff8801452c7e28
>[  389.508562]  ffffffff8103517a dead000000200200 ffffffffa00711fb ffffffff831d9100
>[  389.508565]  ffff880002ca0000 ffff880149c0f800 0000000000000001 ffff880002ca2d20
>[  389.508569] Call Trace:
>[  389.508575]  [<ffffffff817233c0>] ? dump_stack+0x41/0x51
>[  389.508579]  [<ffffffff8103517a>] ? warn_slowpath_common+0x73/0x8b
>[  389.508591]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  389.508595]  [<ffffffff8103522a>] ? warn_slowpath_fmt+0x45/0x4a
>[  389.508611]  [<ffffffffa0095dc8>] ? intel_wait_for_vblank+0x77/0x1db [i915]
>[  389.508622]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  389.508628]  [<ffffffff810e0b64>] ? vfs_write+0xba/0x176
>[  389.508632]  [<ffffffff810e0f1c>] ? SyS_write+0x41/0x84
>[  389.508637]  [<ffffffff8172dba2>] ? system_call_fastpath+0x16/0x1b
>[  389.508639] ---[ end trace bf41fd17b08a7352 ]---
>[  389.508652] [drm:drm_mode_addfb2] [FB:65]
>[  389.518730] [drm:drm_mode_addfb2] [FB:66]
>[  389.528731] [drm:drm_mode_setcrtc] [CRTC:8]
>[  389.528736] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  389.528739] [drm:intel_crtc_set_config] [CRTC:8] [FB:66] #connectors=1 (x y) (0 0)
>[  389.528743] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  389.528745] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=1, fb_changed=0
>[  389.528748] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:8]
>[  389.528750] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  389.528752] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  389.528754] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  389.528757] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 1
>[  389.528760] [drm:connected_sink_compute_bpp] [CONNECTOR:14:eDP-1] checking for sink bpp constrains
>[  389.528764] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  389.528771] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  389.528773] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  389.528777] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  389.528779] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe B
>[  389.528781] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  389.528783] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  389.528786] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  389.528788] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  389.528790] [drm:intel_dump_pipe_config] requested mode:
>[  389.528794] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  389.528796] [drm:intel_dump_pipe_config] adjusted mode:
>[  389.528799] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  389.528802] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  389.528804] [drm:intel_dump_pipe_config] port clock: 270000
>[  389.528806] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  389.528808] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  389.528810] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  389.528812] [drm:intel_dump_pipe_config] ips: 0
>[  389.528814] [drm:intel_dump_pipe_config] double wide: 0
>[  389.528821] [drm:ironlake_disable_fbc] disabled FBC
>[  389.556474] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  389.556480] [drm:intel_edp_backlight_off] 
>[  389.574611] [drm:intel_edp_panel_off] Turn eDP power off
>[  389.757328] [drm:wait_panel_off] Wait for panel power off time
>[  389.757332] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  389.812282] [drm:wait_panel_status] Wait complete
>[  389.812290] [drm:intel_update_fbc] no output, disabling
>[  389.821983] [drm:ironlake_update_primary_plane] Writing base 0A07C000 00000000 0 0 8192
>[  389.821990] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  389.821994] [drm:intel_crtc_mode_set] [ENCODER:13:TMDS-13] set [MODE:0:1920x1080]
>[  389.821996] [drm:intel_ddi_mode_set] Preparing DDI mode on port A, pipe B
>[  389.821999] [drm:intel_edp_panel_on] Turn eDP power on
>[  389.822001] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  390.357877] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  390.357880] [drm:wait_panel_status] Wait complete
>[  390.357884] [drm:wait_panel_on] Wait for panel power on
>[  390.357888] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  390.566715] [drm:wait_panel_status] Wait complete
>[  390.566719] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  390.566726] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  390.567773] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  390.568213] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  390.568645] [drm:intel_dp_start_link_train] clock recovery OK
>[  390.569388] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  390.569590] [drm:intel_edp_backlight_on] 
>[  390.569595] [drm:intel_panel_enable_backlight] pipe B
>[  390.569601] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  390.569604] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  390.586699] [drm:intel_update_fbc] plane not A, disabling compression
>[  390.586703] [drm:intel_connector_check_state] [CONNECTOR:14:eDP-1]
>[  390.586707] [drm:check_encoder_state] [ENCODER:13:TMDS-13]
>[  390.586710] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  390.586712] [drm:check_encoder_state] [ENCODER:24:TMDS-24]
>[  390.586715] [drm:check_crtc_state] [CRTC:5]
>[  390.586717] [drm:check_crtc_state] [CRTC:8]
>[  390.586725] [drm:check_crtc_state] [CRTC:11]
>[  390.586735] [drm:edp_panel_vdd_off_sync] Turning eDP VDD off
>[  390.586741] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  390.886665] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  390.886673] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  390.886677] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  390.886680] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1]
>[  390.886683] [drm:intel_dp_detect] [CONNECTOR:14:eDP-1]
>[  390.886687] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  390.886694] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f
>[  390.886858] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  390.887016] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  390.887025] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  390.887029] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1] probed modes :
>[  390.887032] [drm:drm_mode_debug_printmodeline] Modeline 15:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  390.887036] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  390.887044] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  390.887049] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  390.887071] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  390.887076] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  390.938433] ------------[ cut here ]------------
>[  390.938454] WARNING: CPU: 0 PID: 4293 at drivers/gpu/drm/i915/intel_display.c:768 display_crc_ctl_write+0x575/0x772 [i915]()
>[  390.938455] vblank wait timed out
>[  390.938457] Modules linked in: ip6table_filter ip6_tables ipv6 iptable_filter ip_tables ebtable_nat ebtables x_tables dm_mod snd_hda_codec_hdmi iTCO_wdt iTCO_vendor_support ppdev pcspkr i2c_i801 lpc_ich snd_hda_intel mfd_core snd_hda_controller snd_hda_codec snd_hwdep snd_pcm snd_timer snd soundcore battery parport_pc parport ac acpi_cpufreq i915 video button drm_kms_helper drm
>[  390.938484] CPU: 0 PID: 4293 Comm: kms_fbc_crc Tainted: G        W     3.15.0-rc3_drm-intel-next-queued_bf67a6_20140507+ #2386
>[  390.938486]  0000000000000000 0000000000000009 ffffffff817233c0 ffff8801452c7e28
>[  390.938489]  ffffffff8103517a dead000000200200 ffffffffa00711fb ffffffff831d9100
>[  390.938493]  ffff880002ca0000 ffff880149c0f800 0000000000000000 ffff880002ca2ce8
>[  390.938496] Call Trace:
>[  390.938503]  [<ffffffff817233c0>] ? dump_stack+0x41/0x51
>[  390.938507]  [<ffffffff8103517a>] ? warn_slowpath_common+0x73/0x8b
>[  390.938519]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  390.938523]  [<ffffffff8103522a>] ? warn_slowpath_fmt+0x45/0x4a
>[  390.938538]  [<ffffffffa0095dc8>] ? intel_wait_for_vblank+0x77/0x1db [i915]
>[  390.938549]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  390.938554]  [<ffffffff810e0b64>] ? vfs_write+0xba/0x176
>[  390.938558]  [<ffffffff810e0f1c>] ? SyS_write+0x41/0x84
>[  390.938562]  [<ffffffff8172dba2>] ? system_call_fastpath+0x16/0x1b
>[  390.938564] ---[ end trace bf41fd17b08a7353 ]---
>[  390.938578] [drm:drm_mode_addfb2] [FB:67]
>[  390.948705] [drm:drm_mode_addfb2] [FB:68]
>[  390.958709] [drm:drm_mode_setcrtc] [CRTC:5]
>[  390.958714] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  390.958717] [drm:intel_crtc_set_config] [CRTC:5] [FB:68] #connectors=1 (x y) (0 0)
>[  390.958720] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  390.958723] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  390.958726] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  390.958728] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  390.958730] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  390.958732] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  390.958735] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[  390.958738] [drm:connected_sink_compute_bpp] [CONNECTOR:14:eDP-1] checking for sink bpp constrains
>[  390.958742] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  390.958751] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  390.958753] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  390.958756] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  390.958758] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  390.958760] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  390.958762] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  390.958764] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  390.958767] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  390.958769] [drm:intel_dump_pipe_config] requested mode:
>[  390.958773] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  390.958774] [drm:intel_dump_pipe_config] adjusted mode:
>[  390.958777] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  390.958781] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  390.958782] [drm:intel_dump_pipe_config] port clock: 270000
>[  390.958784] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  390.958787] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  390.958789] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  390.958791] [drm:intel_dump_pipe_config] ips: 1
>[  390.958792] [drm:intel_dump_pipe_config] double wide: 0
>[  390.970412] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  390.970419] [drm:intel_edp_backlight_off] 
>[  390.986551] [drm:intel_edp_panel_off] Turn eDP power off
>[  391.171268] [drm:wait_panel_off] Wait for panel power off time
>[  391.171273] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  391.226220] [drm:wait_panel_status] Wait complete
>[  391.226228] [drm:intel_update_fbc] no output, disabling
>[  391.235931] [drm:ironlake_update_primary_plane] Writing base 0B07C000 00000000 0 0 8192
>[  391.235938] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  391.235941] [drm:intel_crtc_mode_set] [ENCODER:13:TMDS-13] set [MODE:0:1920x1080]
>[  391.235943] [drm:intel_ddi_mode_set] Preparing DDI mode on port A, pipe A
>[  391.235946] [drm:intel_edp_panel_on] Turn eDP power on
>[  391.235950] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  391.771817] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  391.771820] [drm:wait_panel_status] Wait complete
>[  391.771824] [drm:wait_panel_on] Wait for panel power on
>[  391.771828] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  391.980654] [drm:wait_panel_status] Wait complete
>[  391.980658] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  391.980665] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  391.981713] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  391.982155] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  391.982586] [drm:intel_dp_start_link_train] clock recovery OK
>[  391.983328] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  391.983530] [drm:intel_edp_backlight_on] 
>[  391.983535] [drm:intel_panel_enable_backlight] pipe A
>[  391.983541] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  391.983544] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  392.002637] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  392.002642] [drm:intel_connector_check_state] [CONNECTOR:14:eDP-1]
>[  392.002647] [drm:check_encoder_state] [ENCODER:13:TMDS-13]
>[  392.002649] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  392.002652] [drm:check_encoder_state] [ENCODER:24:TMDS-24]
>[  392.002654] [drm:check_crtc_state] [CRTC:5]
>[  392.002662] [drm:check_crtc_state] [CRTC:8]
>[  392.002665] [drm:check_crtc_state] [CRTC:11]
>[  392.052608] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  392.116320] [drm:gen8_irq_handler] *ERROR* Pipe A FIFO underrun
>[  392.316600] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  392.349920] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  392.367369] [drm:i915_gem_context_create_ioctl] HW context 1 created
>[  392.367373] [drm:i915_gem_context_create_ioctl] HW context 2 created
>[  392.367531] [drm:drm_mode_setcrtc] [CRTC:5]
>[  392.367535] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  392.367538] [drm:intel_crtc_set_config] [CRTC:5] [FB:67] #connectors=1 (x y) (0 0)
>[  392.367541] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=0, fb_changed=1
>[  392.367544] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  392.377230] [drm:ironlake_update_primary_plane] Writing base 0C07C000 00000000 0 0 8192
>[  392.384350] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  392.384353] [drm:intel_update_fbc] disabling active FBC for update
>[  392.384355] [drm:ironlake_disable_fbc] disabled FBC
>[  392.384357] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  392.434320] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  392.699637] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  392.716306] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  392.734133] [drm:ironlake_disable_fbc] disabled FBC
>[  392.749599] [drm:i915_setup_compression] reserved 16777216 bytes of contiguous stolen space for FBC
>[  392.799047] [drm:gen7_enable_fbc] enabled fbc on plane A
>[  393.066021] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  393.082693] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  393.399670] [drm:pipe_crc_set_source] collecting CRCs for pipe A, pf
>[  393.432422] [drm:pipe_crc_set_source] stopping CRCs for pipe A
>[  393.449577] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed
>[  393.449579] [drm:i915_gem_context_destroy_ioctl] HW context 2 destroyed
>[  393.449587] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  393.449595] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  393.449600] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  393.449603] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1]
>[  393.449607] [drm:intel_dp_detect] [CONNECTOR:14:eDP-1]
>[  393.449769] [drm:intel_dp_probe_oui] Sink OUI: 001cf8
>[  393.449926] [drm:intel_dp_probe_oui] Branch OUI: 000000
>[  393.449935] [drm:drm_edid_to_eld] ELD: no CEA Extension found
>[  393.449939] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:14:eDP-1] probed modes :
>[  393.449943] [drm:drm_mode_debug_printmodeline] Modeline 15:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  393.449947] [drm:drm_mode_getconnector] [CONNECTOR:14:?]
>[  393.449955] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  393.449960] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[4] ENCODERS[3]
>[  393.449983] [drm:pipe_crc_set_source] collecting CRCs for pipe B, pf
>[  393.449987] [drm:pipe_crc_set_source] stopping CRCs for pipe B
>[  393.501510] ------------[ cut here ]------------
>[  393.501533] WARNING: CPU: 1 PID: 4293 at drivers/gpu/drm/i915/intel_display.c:768 display_crc_ctl_write+0x575/0x772 [i915]()
>[  393.501535] vblank wait timed out
>[  393.501537] Modules linked in: ip6table_filter ip6_tables ipv6 iptable_filter ip_tables ebtable_nat ebtables x_tables dm_mod snd_hda_codec_hdmi iTCO_wdt iTCO_vendor_support ppdev pcspkr i2c_i801 lpc_ich snd_hda_intel mfd_core snd_hda_controller snd_hda_codec snd_hwdep snd_pcm snd_timer snd soundcore battery parport_pc parport ac acpi_cpufreq i915 video button drm_kms_helper drm
>[  393.501564] CPU: 1 PID: 4293 Comm: kms_fbc_crc Tainted: G        W     3.15.0-rc3_drm-intel-next-queued_bf67a6_20140507+ #2386
>[  393.501567]  0000000000000000 0000000000000009 ffffffff817233c0 ffff8801452c7e28
>[  393.501571]  ffffffff8103517a dead000000200200 ffffffffa00711fb ffff88014a36c000
>[  393.501574]  ffff880002ca0000 ffff880149c0f800 0000000000000001 ffff880002ca2d20
>[  393.501577] Call Trace:
>[  393.501585]  [<ffffffff817233c0>] ? dump_stack+0x41/0x51
>[  393.501589]  [<ffffffff8103517a>] ? warn_slowpath_common+0x73/0x8b
>[  393.501601]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  393.501604]  [<ffffffff8103522a>] ? warn_slowpath_fmt+0x45/0x4a
>[  393.501619]  [<ffffffffa0095dc8>] ? intel_wait_for_vblank+0x77/0x1db [i915]
>[  393.501636]  [<ffffffffa00711fb>] ? display_crc_ctl_write+0x575/0x772 [i915]
>[  393.501641]  [<ffffffff810e0b64>] ? vfs_write+0xba/0x176
>[  393.501645]  [<ffffffff810e0f1c>] ? SyS_write+0x41/0x84
>[  393.501649]  [<ffffffff8172dba2>] ? system_call_fastpath+0x16/0x1b
>[  393.501652] ---[ end trace bf41fd17b08a7354 ]---
>[  393.501670] [drm:drm_mode_addfb2] [FB:69]
>[  393.512471] [drm:drm_mode_addfb2] [FB:70]
>[  393.522929] [drm:drm_mode_setcrtc] [CRTC:8]
>[  393.522936] [drm:drm_mode_setcrtc] [CONNECTOR:14:eDP-1]
>[  393.522940] [drm:intel_crtc_set_config] [CRTC:8] [FB:70] #connectors=1 (x y) (0 0)
>[  393.522943] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  393.522946] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=1, fb_changed=0
>[  393.522949] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:8]
>[  393.522950] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  393.522953] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  393.522955] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  393.522958] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 1
>[  393.522961] [drm:connected_sink_compute_bpp] [CONNECTOR:14:eDP-1] checking for sink bpp constrains
>[  393.522965] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  393.522977] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  393.522979] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  393.522983] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  393.522985] [drm:intel_dump_pipe_config] [CRTC:8][modeset] config for pipe B
>[  393.522987] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  393.522989] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  393.522992] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  393.522994] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  393.522996] [drm:intel_dump_pipe_config] requested mode:
>[  393.523000] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  393.523002] [drm:intel_dump_pipe_config] adjusted mode:
>[  393.523005] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  393.523008] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  393.523010] [drm:intel_dump_pipe_config] port clock: 270000
>[  393.523012] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  393.523014] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  393.523016] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  393.523018] [drm:intel_dump_pipe_config] ips: 0
>[  393.523020] [drm:intel_dump_pipe_config] double wide: 0
>[  393.523027] [drm:ironlake_disable_fbc] disabled FBC
>[  393.550476] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  393.550484] [drm:intel_edp_backlight_off] 
>[  393.566617] [drm:intel_edp_panel_off] Turn eDP power off
>[  393.751331] [drm:wait_panel_off] Wait for panel power off time
>[  393.751336] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  393.806285] [drm:wait_panel_status] Wait complete
>[  393.806293] [drm:intel_update_fbc] no output, disabling
>[  393.816874] [drm:ironlake_update_primary_plane] Writing base 0E07D000 00000000 0 0 8192
>[  393.816880] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  393.816884] [drm:intel_crtc_mode_set] [ENCODER:13:TMDS-13] set [MODE:0:1920x1080]
>[  393.816886] [drm:intel_ddi_mode_set] Preparing DDI mode on port A, pipe B
>[  393.816889] [drm:intel_edp_panel_on] Turn eDP power on
>[  393.816893] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  394.351880] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  394.351883] [drm:wait_panel_status] Wait complete
>[  394.351887] [drm:wait_panel_on] Wait for panel power on
>[  394.351891] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  394.560718] [drm:wait_panel_status] Wait complete
>[  394.560722] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  394.560729] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  394.561775] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  394.562216] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  394.562647] [drm:intel_dp_start_link_train] clock recovery OK
>[  394.563390] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  394.563591] [drm:intel_edp_backlight_on] 
>[  394.563597] [drm:intel_panel_enable_backlight] pipe B
>[  394.563603] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  394.563606] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  394.580701] [drm:intel_update_fbc] plane not A, disabling compression
>[  394.580706] [drm:intel_connector_check_state] [CONNECTOR:14:eDP-1]
>[  394.580710] [drm:check_encoder_state] [ENCODER:13:TMDS-13]
>[  394.580713] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  394.580715] [drm:check_encoder_state] [ENCODER:24:TMDS-24]
>[  394.580718] [drm:check_crtc_state] [CRTC:5]
>[  394.580720] [drm:check_crtc_state] [CRTC:8]
>[  394.580729] [drm:check_crtc_state] [CRTC:11]
>[  394.580739] [drm:edp_panel_vdd_off_sync] Turning eDP VDD off
>[  394.580745] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007
>[  394.880737] [drm:intel_crtc_cursor_set] cursor off
>[  394.880740] [drm:intel_crtc_set_config] [CRTC:5] [FB:28] #connectors=1 (x y) (0 0)
>[  394.880742] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set
>[  394.880744] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=1, fb_changed=0
>[  394.880746] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  394.880747] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch
>[  394.880748] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch
>[  394.880749] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch
>[  394.880751] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 2
>[  394.880753] [drm:connected_sink_compute_bpp] [CONNECTOR:14:eDP-1] checking for sink bpp constrains
>[  394.880756] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138780KHz
>[  394.880762] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 24
>[  394.880763] [drm:intel_dp_compute_config] DP link bw required 333072 available 432000
>[  394.880765] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0
>[  394.880766] [drm:intel_dump_pipe_config] [CRTC:5][modeset] config for pipe A
>[  394.880767] [drm:intel_dump_pipe_config] cpu_transcoder: D
>[  394.880768] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0
>[  394.880770] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[  394.880772] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 6467616, gmch_n: 8388608, link_m: 269484, link_n: 524288, tu: 64
>[  394.880773] [drm:intel_dump_pipe_config] requested mode:
>[  394.880776] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  394.880777] [drm:intel_dump_pipe_config] adjusted mode:
>[  394.880779] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138780 1920 1966 1996 2080 1080 1082 1086 1112 0x48 0xa
>[  394.880782] [drm:intel_dump_crtc_timings] crtc timings: 138780 1920 1966 1996 2080 1080 1082 1086 1112, type: 0x48 flags: 0xa
>[  394.880782] [drm:intel_dump_pipe_config] port clock: 270000
>[  394.880784] [drm:intel_dump_pipe_config] pipe src size: 1920x1080
>[  394.880785] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[  394.880786] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[  394.880787] [drm:intel_dump_pipe_config] ips: 1
>[  394.880788] [drm:intel_dump_pipe_config] double wide: 0
>[  394.898465] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
>[  394.898471] [drm:intel_edp_backlight_off] 
>[  394.914457] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  394.914464] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  394.914614] [drm:intel_edp_panel_off] Turn eDP power off
>[  395.099318] [drm:wait_panel_off] Wait for panel power off time
>[  395.099322] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000
>[  395.154272] [drm:wait_panel_status] Wait complete
>[  395.154277] [drm:intel_update_fbc] no output, disabling
>[  395.154292] [drm:ironlake_update_primary_plane] Writing base 00880000 00000000 0 0 7680
>[  395.154296] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  395.154299] [drm:intel_crtc_mode_set] [ENCODER:13:TMDS-13] set [MODE:0:1920x1080]
>[  395.154300] [drm:intel_ddi_mode_set] Preparing DDI mode on port A, pipe A
>[  395.154301] [drm:intel_edp_panel_on] Turn eDP power on
>[  395.154304] [drm:wait_panel_power_cycle] Wait for panel power cycle
>[  395.699866] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000
>[  395.699867] [drm:wait_panel_status] Wait complete
>[  395.699870] [drm:wait_panel_on] Wait for panel power on
>[  395.699874] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003
>[  395.908706] [drm:wait_panel_status] Wait complete
>[  395.908709] [drm:_edp_panel_vdd_on] Turning eDP VDD on
>[  395.908715] [drm:_edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b
>[  395.909761] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  395.910201] [drm:intel_dp_set_signal_levels] Using signal levels 00000000
>[  395.910635] [drm:intel_dp_start_link_train] clock recovery OK
>[  395.911376] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful
>[  395.911576] [drm:intel_edp_backlight_on] 
>[  395.911581] [drm:intel_panel_enable_backlight] pipe A
>[  395.911585] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937
>[  395.911587] [drm:intel_edp_psr_match_conditions] PSR disable by flag
>[  395.930688] [drm:intel_update_fbc] framebuffer not tiled or fenced, disabling compression
>[  395.930691] [drm:intel_connector_check_state] [CONNECTOR:14:eDP-1]
>[  395.930694] [drm:check_encoder_state] [ENCODER:13:TMDS-13]
>[  395.930696] [drm:check_encoder_state] [ENCODER:21:TMDS-21]
>[  395.930697] [drm:check_encoder_state] [ENCODER:24:TMDS-24]
>[  395.930698] [drm:check_crtc_state] [CRTC:5]
>[  395.930705] [drm:check_crtc_state] [CRTC:8]
>[  395.930707] [drm:check_crtc_state] [CRTC:11]
>[  395.930709] [drm:intel_crtc_cursor_set] cursor off
>[  395.930710] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[  395.930712] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[  395.930714] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  395.930715] [drm:intel_crtc_cursor_set] cursor off
>[  395.930716] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[  395.930718] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=0, fb_changed=0
>[  395.930719] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  395.960398] [drm:intel_crtc_cursor_set] cursor off
>[  395.960404] [drm:intel_crtc_set_config] [CRTC:5] [FB:28] #connectors=1 (x y) (0 0)
>[  395.960409] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:5], mode_changed=0, fb_changed=0
>[  395.960412] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  395.960415] [drm:intel_crtc_cursor_set] cursor off
>[  395.960417] [drm:intel_crtc_set_config] [CRTC:8] [NOFB]
>[  395.960419] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:8], mode_changed=0, fb_changed=0
>[  395.960422] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  395.960424] [drm:intel_crtc_cursor_set] cursor off
>[  395.960426] [drm:intel_crtc_set_config] [CRTC:11] [NOFB]
>[  395.960428] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:11], mode_changed=0, fb_changed=0
>[  395.960430] [drm:intel_modeset_stage_output_state] [CONNECTOR:14:eDP-1] to [CRTC:5]
>[  397.565467] [drm:edp_panel_vdd_off_sync] Turning eDP VDD off
>[  397.565477] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007

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