Summary: | [BAT] igt@drv_module_reload@* - dmesg-warn - *ERROR* Gen9 Plane WM* latency not provided | ||
---|---|---|---|
Product: | DRI | Reporter: | Marta Löfstedt <marta.lofstedt> |
Component: | DRM/Intel | Assignee: | Intel GFX Bugs mailing list <intel-gfx-bugs> |
Status: | CLOSED NOTOURBUG | QA Contact: | Intel GFX Bugs mailing list <intel-gfx-bugs> |
Severity: | normal | ||
Priority: | high | CC: | intel-gfx-bugs |
Version: | DRI git | ||
Hardware: | Other | ||
OS: | All | ||
Whiteboard: | ReadyForDev | ||
i915 platform: | CNL | i915 features: | display/Other |
Description
Marta Löfstedt
2018-03-08 10:41:09 UTC
Also seen on CNL-psr: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3970/fi-cnl-psr/igt@drv_module_reload@basic-reload.html [ 511.704013] Setting dangerous option enable_psr - tainting kernel [ 511.704018] Setting dangerous option inject_load_failure - tainting kernel [ 511.995575] Setting dangerous option enable_psr - tainting kernel [ 512.013060] [drm] GuC: No firmware known for this platform! [ 512.013063] [drm] HuC: No firmware known for this platform! [ 512.041181] [drm:intel_print_wm_latency [i915]] *ERROR* Gen9 Plane WM1 latency not provided [ 512.041279] [drm:intel_print_wm_latency [i915]] *ERROR* Gen9 Plane WM2 latency not provided [ 512.041372] [drm:intel_print_wm_latency [i915]] *ERROR* Gen9 Plane WM3 latency not provided [ 512.041503] [drm:intel_print_wm_latency [i915]] *ERROR* Gen9 Plane WM4 latency not provided [ 512.041602] [drm:intel_print_wm_latency [i915]] *ERROR* Gen9 Plane WM5 latency not provided [ 512.041701] [drm:intel_print_wm_latency [i915]] *ERROR* Gen9 Plane WM6 latency not provided [ 512.041800] [drm:intel_print_wm_latency [i915]] *ERROR* Gen9 Plane WM7 latency not provided [ 513.333580] Setting dangerous option reset - tainting kernel Document some information: this looks like BIOS/PCode issue, Error is while we are reading latencies values from PCODE (In reply to Jani Saarinen from comment #2) > Document some information: > this looks like BIOS/PCode issue, Error is while we are reading latencies > values from PCODE Right, not our bug then! Also seen on all CNL self tests: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4559/fi-cnl-psr/igt@drv_selftest@live_hangcheck.html https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4559/fi-cnl-psr/igt@drv_selftest@live_guc.html https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4559/fi-cnl-psr/igt@drv_selftest@live_execlists.html https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_4559/fi-cnl-psr/igt@drv_selftest@live_hangcheck.html ... |
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