Summary: | [CI][DRMTIP] igt@gem_eio@unwedge-stress - fail - Failed assertion: elapsed < 250e6 | ||
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Product: | DRI | Reporter: | Martin Peres <martin.peres> |
Component: | DRM/Intel | Assignee: | Intel GFX Bugs mailing list <intel-gfx-bugs> |
Status: | CLOSED NOTOURBUG | QA Contact: | Intel GFX Bugs mailing list <intel-gfx-bugs> |
Severity: | normal | ||
Priority: | medium | CC: | intel-gfx-bugs |
Version: | XOrg git | ||
Hardware: | Other | ||
OS: | All | ||
Whiteboard: | ReadyForDev | ||
i915 platform: | CFL | i915 features: | GEM/Other |
Description
Martin Peres
2018-12-31 15:06:17 UTC
The CI Bug Log issue associated to this bug has been updated. ### New filters associated * CFL: igt@gem_eio@unwedge-stress - fail - Failed assertion: elapsed < 250e6 - https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_174/fi-cfl-8109u/igt@gem_eio@unwedge-stress.html The 250ms was a number plucked out of thin air. To perform a device reset takes around 10us, so I considered 250ms to have plenty of safety margin built in. In many ways, not being able to reset and restore control within a frame is a failure. So... I don't think I want to raise the timeout (with the exception of say pre-Ironlake where the display engine needs a couple of modesets) and keep looking for a likely root cause behind the occasional delay. In this particular case, the delay corresponds to a pcieport error and a very slow timer interrupt. The CI Bug Log issue associated to this bug has been archived. New failures matching the above filters will not be associated to this bug anymore. |
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