Bug 110905

Summary: Fragment shader compilation broken with SIMD32
Product: Mesa Reporter: Eero Tamminen <eero.t.tamminen>
Component: Drivers/DRI/i965Assignee: Intel 3D Bugs Mailing List <intel-3d-bugs>
Status: VERIFIED DUPLICATE QA Contact: Intel 3D Bugs Mailing List <intel-3d-bugs>
Severity: normal    
Priority: medium CC: danylo.piliaiev
Version: gitKeywords: regression
Hardware: Other   
OS: All   
Whiteboard:
i915 platform: i915 features:

Description Eero Tamminen 2019-06-12 13:23:03 UTC 
Setup:
* GEN9 HW
* Latest Mesa from git

Test-case:
1. Run something with SIMD32 fragment shaders
   $ INTEL_DEBUG=do32 glxgears

Expected outcome:
* Everything works fine, like it did earlier, and it does with SIMD16

Actual outcome:
---------------------------------------------
glxgears: src/intel/compiler/brw_fs.cpp:1726: void fs_visitor::assign_urb_setup(): Assertion `inst->src[i].offset < REG_SIZE / 2' failed.
Aborted (core dumped)
---------------------------------------------

This has broken somewhere between:
* 2019-04-22 e983a975c6843c307380d7caa083eee89e02bd3c: gallivm: disable NEON instructions if they are not supported
* 2019-04-23 951d60f8cdc886adff09201ff65002e3ee1a4c61: radeonsi: delay adding BOs at the beginning of IBs until the first draw

(Not sure what severity this should have. SIMD32 is important performance feature, e.g. on BXT it improves perf in one test-case by ~35%, and on average several percents with suitable heuristic.)
Comment 1 Danylo 2019-06-12 13:30:35 UTC 
Looks like a duplicate of https://bugs.freedesktop.org/show_bug.cgi?id=110507

I took a look at it some time ago but failed.
Comment 2 Eero Tamminen 2019-06-12 13:33:19 UTC 

*** This bug has been marked as a duplicate of bug 110507 ***

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