| Summary: | compilation failure :#error "SSE4.1 instruction set not enabled" | ||
|---|---|---|---|
| Product: | Mesa | Reporter: | set.mailinglist |
| Component: | Mesa core | Assignee: | mesa-dev |
| Status: | RESOLVED FIXED | QA Contact: | |
| Severity: | normal | ||
| Priority: | medium | CC: | david, mattst88, set.mailinglist |
| Version: | git | ||
| Hardware: | x86-64 (AMD64) | ||
| OS: | Linux (All) | ||
| Whiteboard: | |||
| i915 platform: | i915 features: | ||
|
Description
set.mailinglist
2013-11-12 19:08:50 UTC
You don't need to set your CFLAGS to explicitly disable >SSE3 if your CPU doesn't support it. -march=native does the right thing. Explicitly disabling things is the wrong thing to do. Take a look at the output of "gcc -march=native -Q --help=target" on your system. Unless it says -msse4.1 is on, you don't need this. As a Gentoo developer and the author of the patch that your CFLAGS are breaking: knock it off! :) I put those -mno-sse's in there because the initial failing stanza included -msse4.1 in the gcc invocation. The problem seems to be the -mno-ssse3 I had to put in sometime in the past for an older gcc-- because without it some media packages crashed. I knew it was wrong at the time, but it had been benign thus far. Thankyou for your response. This problem is valid, gcc version 4.8.2 # gcc -march=native -E -v - </dev/null 2>&1 | grep cc1 /usr/libexec/gcc/x86_64-pc-linux-gnu/4.8.2/cc1 -E -quiet -v - -march=k8-sse3 -mcx16 -msahf -mno-movbe -mno-aes -mno-pclmul -mno-popcnt -mno-abm -mno-lwp -mno-fma -mno-fma4 -mno-xop -mno-bmi -mno-bmi2 -mno-tbm -mno-avx -mno-avx2 -mno-sse4.2 -mno-sse4.1 -mno-lzcnt -mno-rtm -mno-hle -mno-rdrnd -mno-f16c -mno-fsgsbase -mno-rdseed -mprfchw -mno-adx -mfxsr -mno-xsave -mno-xsaveopt --param l1-cache-size=64 --param l1-cache-line-size=64 --param l2-cache-size=256 -mtune=k8 These are my CFLAGS. Athlon TK-55 can't use SSE4+. In file included from main/streaming-load-memcpy.c:31:0: /usr/lib/gcc/x86_64-pc-linux-gnu/4.8.2/include/smmintrin.h:31:3: error: #error "SSE4.1 instruction set not enabled" # error "SSE4.1 instruction set not enabled" Why there isn't ifdef, when SSE4.1 is not available? I can workaround it, but these CFLAGS are fully valid for my CPU. Thank you P.S. because SW is builded on one central machine, I have to use these flags manually, so -march=native isn't solution. Sigh. Patch sent. Patch [1] tested on amd64, with both SSE4.1 enabled and -mno-sse4.1. Both passed correctly without additional tweaking. Thank you Matt Tested-by: David Heidelberger <david.heidelberger@ixit.cz> [1] http://lists.freedesktop.org/archives/mesa-dev/2014-March/055362.html Pushed and marked for 10.0 and 10.1 branches. |
Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.