Bug 71547 - compilation failure :#error "SSE4.1 instruction set not enabled"
Summary: compilation failure :#error "SSE4.1 instruction set not enabled"
Status: RESOLVED FIXED
Alias: None
Product: Mesa
Classification: Unclassified
Component: Mesa core (show other bugs)
Version: git
Hardware: x86-64 (AMD64) Linux (All)
: medium normal
Assignee: mesa-dev
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Reported: 2013-11-12 19:08 UTC by set.mailinglist
Modified: 2014-03-06 23:54 UTC (History)
3 users (show)

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Description set.mailinglist 2013-11-12 19:08:50 UTC
This athlon does not support anything greater than sse3. This is on a gentoo box, using a ebuild, which succeeded building mesa-git 6 days ago.

libtool: compile:  x86_64-pc-linux-gnu-gcc -m32 -DPACKAGE_NAME=\"Mesa\" -DPACKAGE_TARNAME=\"mesa\" -DPACKAGE_VERSION=\"10.0.0-devel\" "-DPACKAGE_STRING=\"Mesa 10.0.0-devel\"" "-DPACKAGE_BUGREPORT=\"https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa\"" -DPACKAGE_URL=\"\" -DPACKAGE=\"mesa\" -DVERSION=\"10.0.0-devel\" -DSTDC_HEADERS=1 -DHAVE_SYS_TYPES_H=1 -DHAVE_SYS_STAT_H=1 -DHAVE_STDLIB_H=1 -DHAVE_STRING_H=1 -DHAVE_MEMORY_H=1 -DHAVE_STRINGS_H=1 -DHAVE_INTTYPES_H=1 -DHAVE_STDINT_H=1 -DHAVE_UNISTD_H=1 -DHAVE_DLFCN_H=1 -DLT_OBJDIR=\".libs/\" -DHAVE_CLOCK_GETTIME=1 -DHAVE_PTHREAD=1 -I. -D_GNU_SOURCE -DHAVE_PTHREAD -DTEXTURE_FLOAT_ENABLED -DUSE_X86_ASM -DUSE_MMX_ASM -DUSE_3DNOW_ASM -DUSE_SSE_ASM -DHAVE_DLOPEN -DHAVE_POSIX_MEMALIGN -DGLX_INDIRECT_RENDERING -DGLX_DIRECT_RENDERING -DGLX_USE_TLS -DHAVE_PTHREAD -DUSE_EXTERNAL_DXTN_LIB=1 -DHAVE_ALIAS -DHAVE_DRI3 -DHAVE_MINCORE -DHAVE_LIBUDEV -DHAVE_LLVM=0x0304 -I../../include -I../../src/glsl -I../../src/glsl -I../../src/glsl/glcpp -I../../src/mesa -I../../src/mesa -I../../src/mesa/main -I../../src/mesa/main -I../../src/mapi -I../../src/mapi -I../../src/gallium/include -I../../src/gallium/auxiliary -I./x86 -I./x86 -I/usr/include -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -fvisibility=hidden -march=native -O2 -pipe -mno-ssse3 -mno-sse4 -mno-sse4.1 -mno-sse4.2 -mno-sse4a -flto -fuse-linker-plugin -fno-lto -Wall -std=c99 -Werror=implicit-function-declaration -Werror=missing-prototypes -fno-strict-aliasing -fno-builtin-memcmp -c main/api_arrayelt.c  -fPIC -DPIC -o .libs/api_arrayelt.o
In file included from main/streaming-load-memcpy.c:31:0:
/usr/lib/gcc/x86_64-pc-linux-gnu/4.8.1/include/smmintrin.h:31:3: error: #error "SSE4.1 instruction set not enabled"
Comment 1 Matt Turner 2013-11-13 02:17:59 UTC
You don't need to set your CFLAGS to explicitly disable >SSE3 if your CPU doesn't support it. -march=native does the right thing. Explicitly disabling things is the wrong thing to do.

Take a look at the output of "gcc -march=native -Q --help=target" on your system. Unless it says -msse4.1 is on, you don't need this.

As a Gentoo developer and the author of the patch that your CFLAGS are breaking: knock it off! :)
Comment 2 set.mailinglist 2013-11-13 05:29:01 UTC
I put those -mno-sse's in there because the initial failing stanza included -msse4.1 in the gcc invocation. The problem seems to be the -mno-ssse3 I had to put in sometime in the past for an older gcc-- because without it some media packages crashed. I knew it was wrong at the time, but it had been benign thus far. Thankyou for your response.
Comment 3 David Heidelberg (okias) 2014-03-05 04:36:58 UTC
This problem is valid,

gcc version 4.8.2 
# gcc -march=native -E -v - </dev/null 2>&1 | grep cc1
 /usr/libexec/gcc/x86_64-pc-linux-gnu/4.8.2/cc1 -E -quiet -v - -march=k8-sse3 -mcx16 -msahf -mno-movbe -mno-aes -mno-pclmul -mno-popcnt -mno-abm -mno-lwp -mno-fma -mno-fma4 -mno-xop -mno-bmi -mno-bmi2 -mno-tbm -mno-avx -mno-avx2 -mno-sse4.2 -mno-sse4.1 -mno-lzcnt -mno-rtm -mno-hle -mno-rdrnd -mno-f16c -mno-fsgsbase -mno-rdseed -mprfchw -mno-adx -mfxsr -mno-xsave -mno-xsaveopt --param l1-cache-size=64 --param l1-cache-line-size=64 --param l2-cache-size=256 -mtune=k8

These are my CFLAGS. Athlon TK-55 can't use SSE4+.

In file included from main/streaming-load-memcpy.c:31:0:
/usr/lib/gcc/x86_64-pc-linux-gnu/4.8.2/include/smmintrin.h:31:3: error: #error "SSE4.1 instruction set not enabled"
 # error "SSE4.1 instruction set not enabled"

Why there isn't ifdef, when SSE4.1 is not available?

I can workaround it, but these CFLAGS are fully valid for my CPU.

Thank you
Comment 4 David Heidelberg (okias) 2014-03-05 04:39:04 UTC
P.S. because SW is builded on one central machine, I have to use these flags manually, so -march=native isn't solution.
Comment 5 Matt Turner 2014-03-05 05:12:58 UTC
Sigh. Patch sent.
Comment 6 David Heidelberg (okias) 2014-03-05 11:39:42 UTC
Patch [1] tested on amd64, with both SSE4.1 enabled and -mno-sse4.1.

Both passed correctly without additional tweaking.

Thank you Matt

Tested-by: David Heidelberger <david.heidelberger@ixit.cz>

[1] http://lists.freedesktop.org/archives/mesa-dev/2014-March/055362.html
Comment 7 Matt Turner 2014-03-06 23:54:23 UTC
Pushed and marked for 10.0 and 10.1 branches.


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