Bug 97204

That's a classic IVB. It only has 2 PLL, but 3 pipes. In order to use the third pipe, it must exactly match the frequency of one of the other two.

Hi Chris,
Sorry, not sure if I got it. So it's not a bug?
The frequency you told is the same that can be set via xrand stuff ?
Thanks

Created attachment 125537 [details] [review]
[PATCH] drm/i915: Allow PCH DPLL sharing regardless of  DPLL_SDVO_HIGH_SPEED

This patch will allow DPLL sharing between VGA and HDMI. However it won't help you unless you make both VGA and HDMI use the same exact mode. In your log I see the modes were slightly different. So you'll need make sure that happens, and then hope that both monitors will sync with the same mode.

(In reply to Ville Syrjala from comment #3)
> Created attachment 125537 [details] [review] [review]
> [PATCH] drm/i915: Allow PCH DPLL sharing regardless of  DPLL_SDVO_HIGH_SPEED
> 
> This patch will allow DPLL sharing between VGA and HDMI. However it won't
> help you unless you make both VGA and HDMI use the same exact mode. In your
> log I see the modes were slightly different. So you'll need make sure that
> happens, and then hope that both monitors will sync with the same mode.

Thanks. I'll test it and give you feedback about it soon. :)

(In reply to Ville Syrjala from comment #3)
> Created attachment 125537 [details] [review] [review]
> [PATCH] drm/i915: Allow PCH DPLL sharing regardless of  DPLL_SDVO_HIGH_SPEED
> 
> This patch will allow DPLL sharing between VGA and HDMI. However it won't
> help you unless you make both VGA and HDMI use the same exact mode. In your
> log I see the modes were slightly different. So you'll need make sure that
> happens, and then hope that both monitors will sync with the same mode.

Which kernel tree should I use to apply your patch? tried with the mainline one and got this error:

drivers/gpu/drm/i915/intel_display.c: In function ‘ironlake_compute_dpll’:
drivers/gpu/drm/i915/intel_display.c:8903:6: error: implicit declaration of function ‘intel_crtc_has_type’ [-Werror=implicit-function-declaration]
      intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG))
      ^~~~~~~~~~~~~~~~~~~

Created attachment 125546 [details] [review]
[PATCH] drm/i915: Allow PCH DPLL sharing regardless of DPLL_SDVO_HIGH_SPEED (linux 4.4.16)

It worked. Just modified your patch to be able to apply in my kernel (v4.4.14 LTS), using "intel_pipe_has_type" instead of "intel_crtc_has_type". Is that correct?

+       if (INTEL_INFO(dev_priv)->num_pipes == 3 &&
+           intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_ANALOG))
+               dpll |= DPLL_SDVO_HIGH_SPEED;
+

(In reply to Nick Yamane from comment #6)
> Created attachment 125546 [details] [review] [review]
> [PATCH] drm/i915: Allow PCH DPLL sharing regardless of DPLL_SDVO_HIGH_SPEED
> (linux 4.4.16)
> 
> It worked. Just modified your patch to be able to apply in my kernel
> (v4.4.14 LTS), using "intel_pipe_has_type" instead of "intel_crtc_has_type".
> Is that correct?
> 
> +       if (INTEL_INFO(dev_priv)->num_pipes == 3 &&
> +           intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_ANALOG))
> +               dpll |= DPLL_SDVO_HIGH_SPEED;
> +

Almost correct. intel_pipe_will_have_type(crtc_state, INTEL_OUTPUT_ANALOG)
is what should be used on 4.4. Can you double check with that?

Actually can you also attach a dmesg (w/ drm.debug=0xe) with the patch applied? I'd like to see that it really enables three pipes. In theory it might just setup a clone between HDMI and VGA and use just one pipe for both). That may happen if you don't specify a unique x/y position for each output, and the outputs are using the same mode.

(In reply to Ville Syrjala from comment #7)
> (In reply to Nick Yamane from comment #6)
> > Created attachment 125546 [details] [review] [review] [review]
> > [PATCH] drm/i915: Allow PCH DPLL sharing regardless of DPLL_SDVO_HIGH_SPEED
> > (linux 4.4.16)
> > 
> > It worked. Just modified your patch to be able to apply in my kernel
> > (v4.4.14 LTS), using "intel_pipe_has_type" instead of "intel_crtc_has_type".
> > Is that correct?
> > 
> > +       if (INTEL_INFO(dev_priv)->num_pipes == 3 &&
> > +           intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_ANALOG))
> > +               dpll |= DPLL_SDVO_HIGH_SPEED;
> > +
> 
> Almost correct. intel_pipe_will_have_type(crtc_state, INTEL_OUTPUT_ANALOG)
> is what should be used on 4.4. Can you double check with that?
> 
> Actually can you also attach a dmesg (w/ drm.debug=0xe) with the patch
> applied? I'd like to see that it really enables three pipes. In theory it
> might just setup a clone between HDMI and VGA and use just one pipe for
> both). That may happen if you don't specify a unique x/y position for each
> output, and the outputs are using the same mode.

Ping?

Hello, sorry for the delay. I'm out of office right now, but I've applied the patch some weeks ago, it worked but if I can recall I experienced some issues. Anyway, I'll try to test it again later today and will post the logs here. Btw, the patch has already landed somewhere upstream? Or I still need to apply it manually and compile i915 module by myself?
Thanks

Created attachment 126714 [details]
dmesg output with patch applied and drm.debug=0xe

Hi Ville Syrjala,

Just tested here, with your patch applied to my 4.7.4 kernel (on Arch Linux) running Awesome WM, and it's working quite well for now. Attached my dmesg log with drm.debug=0xe as you asked.

Thanks for your great help! Hope it's working as you expected.

Adding reference to submitted patch: https://patchwork.freedesktop.org/series/12918/

Fix pushed

commit 7d7f8633a82763577727762ff3ac1df3017cb8fe
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date:   Mon Sep 26 11:30:46 2016 +0300

    drm/i915: Allow PCH DPLL sharing regardless of DPLL_SDVO_HIGH_SPEED