Bug 101233 - [BAT][CTG] (gem_tiled_fence_blits:3343) Failed assertion: linear[i] == start_val
Summary: [BAT][CTG] (gem_tiled_fence_blits:3343) Failed assertion: linear[i] == start_val
Status: CLOSED FIXED
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: DRI git
Hardware: Other All
: high critical
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard: ReadyForDev
Keywords:
Depends on:
Blocks:
 
Reported: 2017-05-30 14:23 UTC by Martin Peres
Modified: 2017-07-05 09:47 UTC (History)
1 user (show)

See Also:
i915 platform: GM45
i915 features: GEM/Other


Attachments

Description Martin Peres 2017-05-30 14:23:50 UTC
Ever since we swapped fi-ctg-l9400 for another one (https://bugs.freedesktop.org/show_bug.cgi?id=101089), we started randomly hitting an assert when running igt@gem_tiled_fence_blits@basic:

(gem_tiled_fence_blits:3343) CRITICAL: Test assertion failure function check_bo, file gem_tiled_fence_blits.c:96:
(gem_tiled_fence_blits:3343) CRITICAL: Failed assertion: linear[i] == start_val
(gem_tiled_fence_blits:3343) CRITICAL: Expected 0x0008ec80, found 0x0008ec90 at offset 0x0003b200
Subtest basic failed.
**** DEBUG ****
(gem_tiled_fence_blits:3343) INFO: Using 3 1MiB buffers
(gem_tiled_fence_blits:3343) CRITICAL: Test assertion failure function check_bo, file gem_tiled_fence_blits.c:96:
(gem_tiled_fence_blits:3343) CRITICAL: Failed assertion: linear[i] == start_val
(gem_tiled_fence_blits:3343) CRITICAL: Expected 0x0008ec80, found 0x0008ec90 at offset 0x0003b200
****  END  ****

Statistics: Failure rate 2/5 run(s) (40%)

Full logs: https://intel-gfx-ci.01.org/CI/CI_DRM_2672/fi-ctg-l9400/igt@gem_tiled_fence_blits@basic.html
Comment 1 Chris Wilson 2017-05-30 16:01:07 UTC
Single bit failure. I would start by doing a memtest86 for 48 hours or so and check the RAM is error free.
Comment 2 Martin Peres 2017-06-01 13:55:12 UTC
Results of the memcheck: After a little bit less than 2 days, still no errors.

Meanwhile, out of the 4 runs that were made on this machine, we got consistent errors. So, the bug may be in the hardware, but not in the memory.
Comment 3 Chris Wilson 2017-06-01 15:24:14 UTC
Drat, RAM was replaceable. Hmm, do you have a complete list of verification failures like this? I want to check the pattern between tiled/gpu/gtt etc.
Comment 4 Martin Peres 2017-06-01 15:43:53 UTC
(In reply to Chris Wilson from comment #3)
> Drat, RAM was replaceable. Hmm, do you have a complete list of verification
> failures like this? I want to check the pattern between tiled/gpu/gtt etc.

Not so sure what you are asking. Here are is all the info I have: https://intel-gfx-ci.01.org/CI/fi-ctg-l9400.html (the last 4 runs are on the new machine).
Comment 5 Martin Peres 2017-07-05 09:47:43 UTC
Closing the bug since it used to be very reproducable, but completely stopped being so for more than a month.


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